From 6886209cc08d914d777e7cdc95aff33b8955680d Mon Sep 17 00:00:00 2001 From: gaoxu Date: Wed, 22 Oct 2025 10:11:18 +0800 Subject: [PATCH] fix(adc): fix ESP32 ADC continuous loss sample times --- components/esp_adc/adc_continuous.c | 4 ++++ components/hal/esp32/include/hal/adc_ll.h | 7 +++++-- components/hal/esp32c3/include/hal/adc_ll.h | 2 +- components/hal/esp32c6/include/hal/adc_ll.h | 2 +- components/hal/esp32h2/include/hal/adc_ll.h | 2 +- components/hal/esp32p4/include/hal/adc_ll.h | 2 +- components/hal/esp32s2/include/hal/adc_ll.h | 2 +- components/hal/esp32s3/include/hal/adc_ll.h | 2 +- 8 files changed, 15 insertions(+), 8 deletions(-) diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c index efcf0ed8e8..cfbbf2e6ee 100644 --- a/components/esp_adc/adc_continuous.c +++ b/components/esp_adc/adc_continuous.c @@ -335,6 +335,10 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle) adc_hal_digi_connect(true); adc_hal_digi_enable(true); +#if ADC_LL_DEFAULT_CONV_LIMIT_EN + adc_ll_digi_convert_limit_enable(false); +#endif + return ESP_OK; } diff --git a/components/hal/esp32/include/hal/adc_ll.h b/components/hal/esp32/include/hal/adc_ll.h index 80f997b448..1827cbf100 100644 --- a/components/hal/esp32/include/hal/adc_ll.h +++ b/components/hal/esp32/include/hal/adc_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,6 +7,7 @@ #pragma once #include +#include "esp_rom_sys.h" #include "hal/adc_types.h" #include "hal/misc.h" #include "hal/assert.h" @@ -47,7 +48,7 @@ extern "C" { //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0` #define ADC_LL_DEFAULT_CONV_LIMIT_EN 1 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) @@ -157,6 +158,8 @@ static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num) */ static inline void adc_ll_digi_convert_limit_enable(bool enable) { + //ESP32 has a hardware limitaton, meas_num_limit can only be cleared after ADC enters sample phase(10~15us after start) + esp_rom_delay_us(60); SYSCON.saradc_ctrl2.meas_num_limit = enable; } diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/hal/esp32c3/include/hal/adc_ll.h index 5d0d3ec523..01986b56d9 100644 --- a/components/hal/esp32c3/include/hal/adc_ll.h +++ b/components/hal/esp32c3/include/hal/adc_ll.h @@ -60,7 +60,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /** * Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automatically cleared, diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h index 2eb4a06edb..438c48de7a 100644 --- a/components/hal/esp32c6/include/hal/adc_ll.h +++ b/components/hal/esp32c6/include/hal/adc_ll.h @@ -60,7 +60,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 #define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32C6 supported to manage power mode /*--------------------------------------------------------------- diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index eb4177fbfd..118ed48301 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -61,7 +61,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 #define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32H2 supported to manage power mode /*--------------------------------------------------------------- diff --git a/components/hal/esp32p4/include/hal/adc_ll.h b/components/hal/esp32p4/include/hal/adc_ll.h index 0ccefdae6c..090a0a19b3 100644 --- a/components/hal/esp32p4/include/hal/adc_ll.h +++ b/components/hal/esp32p4/include/hal/adc_ll.h @@ -57,7 +57,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 #define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32P4 supported to manage power mode /*--------------------------------------------------------------- diff --git a/components/hal/esp32s2/include/hal/adc_ll.h b/components/hal/esp32s2/include/hal/adc_ll.h index 7bbc67711a..595ebb7773 100644 --- a/components/hal/esp32s2/include/hal/adc_ll.h +++ b/components/hal/esp32s2/include/hal/adc_ll.h @@ -60,7 +60,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) diff --git a/components/hal/esp32s3/include/hal/adc_ll.h b/components/hal/esp32s3/include/hal/adc_ll.h index 9205cdc5fd..b8b476bf9b 100644 --- a/components/hal/esp32s3/include/hal/adc_ll.h +++ b/components/hal/esp32s3/include/hal/adc_ll.h @@ -62,7 +62,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect)