From 17d0bf1810d36115aaa37356a77bc8b50d343ad7 Mon Sep 17 00:00:00 2001 From: hebinglin Date: Thu, 19 Mar 2026 21:52:50 +0800 Subject: [PATCH] fix(esp_hw_support): fix mem_mask set issue --- components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h | 6 +++--- components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h index 8f455d38b5..bc4747517a 100644 --- a/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32h21/include/hal/pmu_ll.h @@ -369,9 +369,9 @@ FORCE_INLINE_ATTR void pmu_ll_lp_set_bias_xpd(pmu_dev_t *hw, pmu_lp_mode_t mode, FORCE_INLINE_ATTR void pmu_ll_hp_set_memory_power_on_mask(pmu_dev_t *hw, uint32_t mem_mask) { - hw->power.mem_mask.mem0_mask = mem_mask & BIT(0); - hw->power.mem_mask.mem1_mask = mem_mask & BIT(1); - hw->power.mem_mask.mem2_mask = mem_mask & BIT(2); + hw->power.mem_mask.mem0_mask = (mem_mask & BIT(0)) ? 1 : 0; + hw->power.mem_mask.mem1_mask = (mem_mask & BIT(1)) ? 1 : 0; + hw->power.mem_mask.mem2_mask = (mem_mask & BIT(2)) ? 1 : 0; } FORCE_INLINE_ATTR void pmu_ll_hp_set_vdd_flash_tiel_enable(pmu_dev_t *hw, bool enable) diff --git a/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h b/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h index b6085cba6c..f4a96deffe 100644 --- a/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h +++ b/components/esp_hal_pmu/esp32h4/include/hal/pmu_ll.h @@ -573,9 +573,9 @@ FORCE_INLINE_ATTR void pmu_ll_hp_set_memory_power_up(pmu_dev_t *hw, uint32_t fpu FORCE_INLINE_ATTR void pmu_ll_hp_set_memory_power_on_mask(pmu_dev_t *hw, uint32_t mem_mask) { - hw->power.mem_mask.mem0_mask = mem_mask & BIT(0); - hw->power.mem_mask.mem1_mask = mem_mask & BIT(1); - hw->power.mem_mask.mem2_mask = mem_mask & BIT(2); + hw->power.mem_mask.mem0_mask = (mem_mask & BIT(0)) ? 1 : 0; + hw->power.mem_mask.mem1_mask = (mem_mask & BIT(1)) ? 1 : 0; + hw->power.mem_mask.mem2_mask = (mem_mask & BIT(2)) ? 1 : 0; } FORCE_INLINE_ATTR void pmu_ll_hp_set_memory_power_off_mask(pmu_dev_t *hw, uint32_t mem0_pd_mask, uint32_t mem1_pd_mask, uint32_t mem2_pd_mask)