From 70140bd0fc6dfc345b0e1ef13de399e9cee397a1 Mon Sep 17 00:00:00 2001 From: wanckl Date: Tue, 6 Jan 2026 17:22:43 +0800 Subject: [PATCH 1/2] fix(driver_spi): master set idle pin level for all data pin --- .../include/esp_private/spi_common_internal.h | 8 +++----- components/esp_driver_spi/src/gpspi/spi_master.c | 2 +- components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h | 11 +++++++---- .../esp_hal_gpspi/esp32c61/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h | 11 +++++++---- .../esp_hal_gpspi/esp32h21/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h | 9 +++++---- components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h | 11 +++++++---- components/esp_hal_gpspi/include/hal/spi_hal.h | 4 ++-- components/esp_hal_gpspi/spi_hal.c | 4 ++-- 15 files changed, 83 insertions(+), 54 deletions(-) diff --git a/components/esp_driver_spi/include/esp_private/spi_common_internal.h b/components/esp_driver_spi/include/esp_private/spi_common_internal.h index e604254ed8..83ffb43de8 100644 --- a/components/esp_driver_spi/include/esp_private/spi_common_internal.h +++ b/components/esp_driver_spi/include/esp_private/spi_common_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -9,16 +9,14 @@ #pragma once #include +#include "esp_pm.h" #include "driver/spi_common.h" #include "hal/spi_types.h" #include "hal/dma_types.h" #include "soc/ext_mem_defs.h" //for SOC_NON_CACHEABLE_OFFSET #include "esp_private/spi_dma.h" -#include "esp_pm.h" -#include "esp_private/spi_share_hw_ctrl.h" -#if SOC_GDMA_SUPPORTED #include "esp_private/gdma.h" -#endif +#include "esp_private/spi_share_hw_ctrl.h" #ifdef __cplusplus extern "C" diff --git a/components/esp_driver_spi/src/gpspi/spi_master.c b/components/esp_driver_spi/src/gpspi/spi_master.c index d034c90967..b9e655ff29 100644 --- a/components/esp_driver_spi/src/gpspi/spi_master.c +++ b/components/esp_driver_spi/src/gpspi/spi_master.c @@ -337,7 +337,7 @@ static esp_err_t spi_master_init_driver(spi_host_device_t host_id) } spi_hal_init(&host->hal, host_id); - spi_hal_config_io_default_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); + spi_hal_set_data_pin_idle_level(&host->hal, bus_attr->bus_cfg.data_io_default_level); if (host_id != SPI1_HOST) { //SPI1 attributes are already initialized at start up. diff --git a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h index 4b6218ab0e..9304a96c42 100644 --- a/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -246,13 +246,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h index 354619793f..ff45716121 100644 --- a/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -251,13 +251,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h index 240fc01366..51c43be5f4 100644 --- a/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -900,13 +900,16 @@ static inline void spi_ll_master_set_cs_setup(spi_dev_t *hw, uint8_t setup) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /*------------------------------------------------------------------------------ diff --git a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h index 522f82f8bc..9abd1590bc 100644 --- a/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -236,13 +236,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h index 8e8a4a5665..dd857b183f 100644 --- a/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h index e8e11c98a5..b2d4fb9f6b 100644 --- a/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -237,13 +237,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h index 6911464a2f..a850b44931 100644 --- a/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -225,13 +225,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h index 930a0bf2a9..a8477871a1 100644 --- a/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -284,13 +284,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h index 30b689bd81..a3b65fbb13 100644 --- a/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -931,13 +931,16 @@ static inline void spi_ll_set_mosi_delay(spi_dev_t *hw, int delay_mode, int dela } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h index 165a25f790..8159861503 100644 --- a/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -270,13 +270,14 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; } /** diff --git a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h index 3d1ac3e56c..b40a1e27c0 100644 --- a/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h +++ b/components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,16 @@ static inline void spi_ll_slave_hd_init(spi_dev_t *hw) } /** - * Determine and unify the default level of mosi line when bus free + * Determine and unify the default level of data line when bus idle * * @param hw Beginning address of the peripheral registers. */ -static inline void spi_ll_set_mosi_free_level(spi_dev_t *hw, bool level) +static inline void spi_ll_set_data_pin_idle_level(spi_dev_t *hw, bool level) { - hw->ctrl.d_pol = level; //set default level for MOSI only on IDLE state + hw->ctrl.d_pol = level; + hw->ctrl.q_pol = level; + hw->ctrl.wp_pol = level; + hw->ctrl.hold_pol = level; } /** diff --git a/components/esp_hal_gpspi/include/hal/spi_hal.h b/components/esp_hal_gpspi/include/hal/spi_hal.h index 7479f82a2d..4561c4f34e 100644 --- a/components/esp_hal_gpspi/include/hal/spi_hal.h +++ b/components/esp_hal_gpspi/include/hal/spi_hal.h @@ -163,12 +163,12 @@ typedef struct { void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id); /** - * Config default output IO level when don't have transaction + * Config default output data IO level when bus idle * * @param hal Context of the HAL layer. * @param level IO level to config */ -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level); +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level); /** * Deinit the peripheral (and the context if needed). diff --git a/components/esp_hal_gpspi/spi_hal.c b/components/esp_hal_gpspi/spi_hal.c index f49feca0e7..92c71085f6 100644 --- a/components/esp_hal_gpspi/spi_hal.c +++ b/components/esp_hal_gpspi/spi_hal.c @@ -27,11 +27,11 @@ void spi_hal_init(spi_hal_context_t *hal, uint32_t host_id) spi_ll_apply_config(hw); } -void spi_hal_config_io_default_level(spi_hal_context_t *hal, bool level) +void spi_hal_set_data_pin_idle_level(spi_hal_context_t *hal, bool level) { #if SPI_LL_MOSI_FREE_LEVEL // Config default output data line level when don't have transaction - spi_ll_set_mosi_free_level(hal->hw, level); + spi_ll_set_data_pin_idle_level(hal->hw, level); spi_ll_apply_config(hal->hw); #endif } From 2261e92dd6c711d7900eb534585572e44970e967 Mon Sep 17 00:00:00 2001 From: wanckl Date: Tue, 6 Jan 2026 17:28:10 +0800 Subject: [PATCH 2/2] fix(driver_i2s): fix pdm mode ll header file --- .../esp_hal_i2s/esp32c5/include/hal/i2s_ll.h | 28 +++++++++---------- .../esp_hal_i2s/esp32c61/include/hal/i2s_ll.h | 28 +++++++++---------- 2 files changed, 28 insertions(+), 28 deletions(-) diff --git a/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h index 009f59a51e..e6fe191108 100644 --- a/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -792,6 +792,19 @@ static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pcm2pdm_en) hw->tx_pcm2pdm_conf.pcm2pdm_conv_en = pcm2pdm_en; } +/** + * @brief Enable I2S RX PDM mode + * + * @param hw Peripheral I2S hardware instance address. + * @param pdm2pcm_en Set true to enable RX PDM to PCM filter + */ +static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm2pcm_en) +{ + (void)pdm2pcm_en; + hw->rx_conf.rx_pdm_en = true; + hw->rx_conf.rx_tdm_en = false; +} + /** * @brief Set I2S TX PDM prescale * @@ -951,19 +964,6 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw) return hw->tx_pcm2pdm_conf1.tx_pdm_fs; } -/** - * @brief Enable RX PDM mode. - * - * @param hw Peripheral I2S hardware instance address. - * @param pdm_enable Set true to RX enable PDM mode (ignored) - */ -static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm_enable) -{ - (void)pdm_enable; - hw->rx_conf.rx_pdm_en = 0; - hw->rx_conf.rx_tdm_en = 1; -} - /** * @brief Configura TX a/u-law decompress or compress * diff --git a/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h index f4caa7c133..55f52fb346 100644 --- a/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -793,6 +793,19 @@ static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pcm2pdm_en) hw->tx_pcm2pdm_conf.pcm2pdm_conv_en = pcm2pdm_en; } +/** + * @brief Enable I2S RX PDM mode + * + * @param hw Peripheral I2S hardware instance address. + * @param pdm2pcm_en Set true to enable RX PDM to PCM filter + */ +static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm2pcm_en) +{ + (void)pdm2pcm_en; + hw->rx_conf.rx_pdm_en = true; + hw->rx_conf.rx_tdm_en = false; +} + /** * @brief Set I2S TX PDM prescale * @@ -952,19 +965,6 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw) return hw->tx_pcm2pdm_conf1.tx_pdm_fs; } -/** - * @brief Enable RX PDM mode. - * - * @param hw Peripheral I2S hardware instance address. - * @param pdm2pcm Set true to RX enable PDM mode (ignored) - */ -static inline void i2s_ll_rx_enable_pdm(i2s_dev_t *hw, bool pdm2pcm) -{ - (void)pdm2pcm; - hw->rx_conf.rx_pdm_en = 0; - hw->rx_conf.rx_tdm_en = 1; -} - /** * @brief Configura TX a/u-law decompress or compress *