diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c index d6a85d246a..939e696a86 100644 --- a/components/esp_adc/adc_continuous.c +++ b/components/esp_adc/adc_continuous.c @@ -374,6 +374,10 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle) //start conversion adc_hal_digi_start(&handle->hal, handle->rx_dma_buf); +#if ADC_LL_DEFAULT_CONV_LIMIT_EN + adc_ll_digi_convert_limit_enable(false); +#endif + return ESP_OK; } diff --git a/components/hal/esp32/include/hal/adc_ll.h b/components/hal/esp32/include/hal/adc_ll.h index 08e93a0c6d..8999ce688b 100644 --- a/components/hal/esp32/include/hal/adc_ll.h +++ b/components/hal/esp32/include/hal/adc_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,6 +7,7 @@ #pragma once #include +#include "esp_rom_sys.h" #include "hal/adc_types.h" #include "hal/misc.h" #include "hal/assert.h" @@ -44,7 +45,7 @@ extern "C" { //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0` #define ADC_LL_DEFAULT_CONV_LIMIT_EN 1 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) @@ -154,6 +155,8 @@ static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num) */ static inline void adc_ll_digi_convert_limit_enable(bool enable) { + //ESP32 has a hardware limitaton, meas_num_limit can only be cleared after ADC enters sample phase(10~15us after start) + esp_rom_delay_us(60); SYSCON.saradc_ctrl2.meas_num_limit = enable; } diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/hal/esp32c3/include/hal/adc_ll.h index 4fb9a95b47..b28165273a 100644 --- a/components/hal/esp32c3/include/hal/adc_ll.h +++ b/components/hal/esp32c3/include/hal/adc_ll.h @@ -54,7 +54,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /** * Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automatically cleared, diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h index b85703f959..a37425c824 100644 --- a/components/hal/esp32c6/include/hal/adc_ll.h +++ b/components/hal/esp32c6/include/hal/adc_ll.h @@ -57,7 +57,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index 285674cb33..90ded462d9 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -57,7 +57,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) diff --git a/components/hal/esp32s2/include/hal/adc_ll.h b/components/hal/esp32s2/include/hal/adc_ll.h index 556abf7514..1514fc28a2 100644 --- a/components/hal/esp32s2/include/hal/adc_ll.h +++ b/components/hal/esp32s2/include/hal/adc_ll.h @@ -51,7 +51,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect) diff --git a/components/hal/esp32s3/include/hal/adc_ll.h b/components/hal/esp32s3/include/hal/adc_ll.h index 5cdf6a3f0d..46c42b8f50 100644 --- a/components/hal/esp32s3/include/hal/adc_ll.h +++ b/components/hal/esp32s3/include/hal/adc_ll.h @@ -51,7 +51,7 @@ extern "C" { #define ADC_LL_CLKM_DIV_B_DEFAULT 1 #define ADC_LL_CLKM_DIV_A_DEFAULT 0 #define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 -#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255 /*--------------------------------------------------------------- PWDET (Power Detect)