diff --git a/components/hal/esp32/include/hal/rtc_io_ll.h b/components/hal/esp32/include/hal/rtc_io_ll.h
index 3c7e722da3..2120709ae2 100644
--- a/components/hal/esp32/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32/include/hal/rtc_io_ll.h
@@ -77,7 +77,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    RTCIO.enable_w1ts.w1ts = (1U << rtcio_num);
+    RTCIO.enable_w1ts.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TS_S));
 }
 
 /**
@@ -87,7 +87,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    RTCIO.enable_w1tc.w1tc = (1U << rtcio_num);
+    RTCIO.enable_w1tc.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TC_S));
 }
 
 /**
@@ -99,9 +99,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        RTCIO.out_w1ts.w1ts = (1U << rtcio_num);
+        RTCIO.out_w1ts.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TS_S));
     } else {
-        RTCIO.out_w1tc.w1tc = (1U << rtcio_num);
+        RTCIO.out_w1tc.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TC_S));
     }
 }
 
diff --git a/components/hal/esp32c5/include/hal/rtc_io_ll.h b/components/hal/esp32c5/include/hal/rtc_io_ll.h
index 5e31fc7f12..4b5f40cd31 100644
--- a/components/hal/esp32c5/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c5/include/hal/rtc_io_ll.h
@@ -115,7 +115,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1ts, out_enable_w1ts, BIT(rtcio_num));
+    LP_GPIO.enable_w1ts.val = BIT(rtcio_num);
 }
 
 /**
@@ -125,7 +125,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1tc, out_enable_w1tc, BIT(rtcio_num));
+    LP_GPIO.enable_w1tc.val = BIT(rtcio_num);
 }
 
 /**
@@ -137,9 +137,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1ts, out_data_w1ts, BIT(rtcio_num));
+        LP_GPIO.out_w1ts.val = BIT(rtcio_num);
     } else {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1tc, out_data_w1tc, BIT(rtcio_num));
+        LP_GPIO.out_w1tc.val = BIT(rtcio_num);
     }
 }
 
@@ -450,7 +450,7 @@ static inline  uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline  void rtcio_ll_clear_interrupt_status(void)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.status_w1tc, status_intr_w1tc, 0xff);
+    LP_GPIO.status_w1tc.val = 0xFF;
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32c6/include/hal/rtc_io_ll.h b/components/hal/esp32c6/include/hal/rtc_io_ll.h
index d17fbb1250..8d4669a7f9 100644
--- a/components/hal/esp32c6/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c6/include/hal/rtc_io_ll.h
@@ -114,7 +114,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_enable_w1ts, enable_w1ts, BIT(rtcio_num));
+    LP_IO.out_enable_w1ts.val = BIT(rtcio_num);
 }
 
 /**
@@ -124,7 +124,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_enable_w1tc, enable_w1tc, BIT(rtcio_num));
+    LP_IO.out_enable_w1tc.val = BIT(rtcio_num);
 }
 
 /**
@@ -136,9 +136,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_w1ts, BIT(rtcio_num));
+        LP_IO.out_data_w1ts.val = BIT(rtcio_num);
     } else {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_w1tc, BIT(rtcio_num));
+        LP_IO.out_data_w1tc.val = BIT(rtcio_num);
     }
 }
 
@@ -457,7 +457,7 @@ static inline  uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline  void rtcio_ll_clear_interrupt_status(void)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.status_w1tc, status_intr_w1tc, 0xff);
+    LP_IO.status_w1tc.val = 0xFF;
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32c61/include/hal/rtc_io_ll.h b/components/hal/esp32c61/include/hal/rtc_io_ll.h
index 4d5c85cb07..5ecc4b2e86 100644
--- a/components/hal/esp32c61/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c61/include/hal/rtc_io_ll.h
@@ -115,7 +115,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    LP_GPIO.enable_w1ts.enable_w1ts = BIT(rtcio_num);
+    LP_GPIO.enable_w1ts.val = BIT(rtcio_num);
 }
 
 /**
@@ -125,7 +125,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    LP_GPIO.enable_w1tc.enable_w1tc = BIT(rtcio_num);
+    LP_GPIO.enable_w1tc.val = BIT(rtcio_num);
 }
 
 /**
@@ -137,9 +137,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        LP_GPIO.out_w1ts.out_w1ts = BIT(rtcio_num);
+        LP_GPIO.out_w1ts.val = BIT(rtcio_num);
     } else {
-        LP_GPIO.out_w1tc.out_w1tc = BIT(rtcio_num);
+        LP_GPIO.out_w1tc.val = BIT(rtcio_num);
     }
 }
 
@@ -450,7 +450,7 @@ static inline uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline void rtcio_ll_clear_interrupt_status(void)
 {
-    LP_GPIO.status_w1tc.status_w1tc = 0x7F;
+    LP_GPIO.status_w1tc.val = 0x7F;
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32p4/include/hal/rtc_io_ll.h b/components/hal/esp32p4/include/hal/rtc_io_ll.h
index 3ff8eaa3ba..976564330e 100644
--- a/components/hal/esp32p4/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32p4/include/hal/rtc_io_ll.h
@@ -148,7 +148,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1ts, reg_gpio_enable_data_w1ts, BIT(rtcio_num));
+    LP_GPIO.enable_w1ts.val = BIT(rtcio_num);
 }
 
 /**
@@ -158,7 +158,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.enable_w1tc, reg_gpio_enable_data_w1tc, BIT(rtcio_num));
+    LP_GPIO.enable_w1tc.val = BIT(rtcio_num);
     // Ensure no other output signal is routed via LP_GPIO matrix to this pin
     LP_GPIO.func_out_sel_cfg[rtcio_num].func_out_sel = SIG_LP_GPIO_OUT_IDX;
 }
@@ -172,9 +172,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1ts, reg_gpio_out_data_w1ts, BIT(rtcio_num));
+        LP_GPIO.out_w1ts.val = BIT(rtcio_num);
     } else {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.out_w1tc, reg_gpio_out_data_w1tc, BIT(rtcio_num));
+        LP_GPIO.out_w1tc.val = BIT(rtcio_num);
     }
 }
 
@@ -485,7 +485,7 @@ static inline uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline  void rtcio_ll_clear_interrupt_status(void)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_GPIO.status_w1tc, reg_gpio_status_data_w1tc, 0xFFFF);
+    LP_GPIO.status_w1tc.val = 0xFFFF;
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32s2/include/hal/rtc_io_ll.h b/components/hal/esp32s2/include/hal/rtc_io_ll.h
index 647a69da79..2e4fc94ff7 100644
--- a/components/hal/esp32s2/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s2/include/hal/rtc_io_ll.h
@@ -89,7 +89,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    RTCIO.enable_w1ts.w1ts = (1U << rtcio_num);
+    RTCIO.enable_w1ts.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TS_S));
 }
 
 /**
@@ -99,7 +99,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    RTCIO.enable_w1tc.w1tc = (1U << rtcio_num);
+    RTCIO.enable_w1tc.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TC_S));
 }
 
 /**
@@ -111,9 +111,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        RTCIO.out_w1ts.w1ts = (1U << rtcio_num);
+        RTCIO.out_w1ts.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TS_S));
     } else {
-        RTCIO.out_w1tc.w1tc = (1U << rtcio_num);
+        RTCIO.out_w1tc.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TC_S));
     }
 }
 
diff --git a/components/hal/esp32s3/include/hal/rtc_io_ll.h b/components/hal/esp32s3/include/hal/rtc_io_ll.h
index a5cd10b502..89258d0fd1 100644
--- a/components/hal/esp32s3/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s3/include/hal/rtc_io_ll.h
@@ -98,7 +98,7 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
  */
 static inline void rtcio_ll_output_enable(int rtcio_num)
 {
-    RTCIO.enable_w1ts.w1ts = (1U << rtcio_num);
+    RTCIO.enable_w1ts.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TS_S));
 }
 
 /**
@@ -108,7 +108,7 @@ static inline void rtcio_ll_output_enable(int rtcio_num)
  */
 static inline void rtcio_ll_output_disable(int rtcio_num)
 {
-    RTCIO.enable_w1tc.w1tc = (1U << rtcio_num);
+    RTCIO.enable_w1tc.val = (1U << (rtcio_num + RTC_GPIO_ENABLE_W1TC_S));
 }
 
 /**
@@ -120,9 +120,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        RTCIO.out_w1ts.w1ts = (1U << rtcio_num);
+        RTCIO.out_w1ts.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TS_S));
     } else {
-        RTCIO.out_w1tc.w1tc = (1U << rtcio_num);
+        RTCIO.out_w1tc.val = (1U << (rtcio_num + RTC_GPIO_OUT_DATA_W1TC_S));
     }
 }