diff --git a/components/esp_phy/src/phy_common.c b/components/esp_phy/src/phy_common.c index 48607d49e2..0b30d9564d 100644 --- a/components/esp_phy/src/phy_common.c +++ b/components/esp_phy/src/phy_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -22,9 +22,13 @@ #include "hal/temperature_sensor_ll.h" #endif -#ifndef ANT_SEL0_IDX -#define ANT_SEL0_IDX PAD_MODEM_ANT_SEL0_IDX -#endif +/* Per-target ANT_SELn_IDX indices are not always consecutive; do not use ANT_SEL0_IDX + n. */ +static const uint32_t s_phy_ant_sel_sig_idx[4] = { + ANT_SEL0_IDX, + ANT_SEL1_IDX, + ANT_SEL2_IDX, + ANT_SEL3_IDX, +}; static const char* TAG = "phy_comm"; @@ -200,7 +204,7 @@ esp_err_t esp_phy_set_ant_gpio(esp_phy_ant_gpio_config_t *config) for (int i = 0; i < 4; i++) { if (config->gpio_cfg[i].gpio_select == 1) { phy_ant_set_gpio_output(config->gpio_cfg[i].gpio_num); - esp_rom_gpio_connect_out_signal(config->gpio_cfg[i].gpio_num, ANT_SEL0_IDX + i, 0, 0); + esp_rom_gpio_connect_out_signal(config->gpio_cfg[i].gpio_num, s_phy_ant_sel_sig_idx[i], 0, 0); } } diff --git a/components/soc/esp32s31/include/soc/gpio_sig_map.h b/components/soc/esp32s31/include/soc/gpio_sig_map.h index d24ea6caa6..e0b5c32519 100644 --- a/components/soc/esp32s31/include/soc/gpio_sig_map.h +++ b/components/soc/esp32s31/include/soc/gpio_sig_map.h @@ -24,6 +24,8 @@ #define SD_CARD_CDATA7_2_PAD_OUT_IDX 7 #define PAD_MODEM_ANT_SEL0_IDX 8 #define PAD_MODEM_ANT_SEL1_IDX 9 +#define ANT_SEL0_IDX PAD_MODEM_ANT_SEL0_IDX +#define ANT_SEL1_IDX PAD_MODEM_ANT_SEL1_IDX #define UART0_RXD_PAD_IN_IDX 10 #define UART0_TXD_PAD_OUT_IDX 10 #define UART0_CTS_PAD_IN_IDX 11 @@ -80,8 +82,10 @@ #define I2S1_I_WS_PAD_OUT_IDX 36 #define PCNT1_RST_IN0_IDX 37 #define PAD_MODEM_ANT_SEL2_IDX 37 +#define ANT_SEL2_IDX PAD_MODEM_ANT_SEL2_IDX #define PCNT1_RST_IN1_IDX 38 #define PAD_MODEM_ANT_SEL3_IDX 38 +#define ANT_SEL3_IDX PAD_MODEM_ANT_SEL3_IDX #define PCNT1_RST_IN2_IDX 39 #define PAD_MODEM_ANT_SEL4_IDX 39 #define PCNT1_RST_IN3_IDX 40