diff --git a/components/hal/esp32s31/include/hal/assist_debug_ll.h b/components/hal/esp32s31/include/hal/assist_debug_ll.h
new file mode 100644
index 0000000000..a0bdfcb41b
--- /dev/null
+++ b/components/hal/esp32s31/include/hal/assist_debug_ll.h
@@ -0,0 +1,179 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The LL layer for DEBUG_ASSIST peripheral
+
+#pragma once
+
+#include "soc/assist_debug_reg.h"
+
+#ifndef __ASSEMBLER__
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "esp_attr.h"
+#include "soc/hp_sys_clkrst_struct.h"
+#include "soc/bus_monitor_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * The bus monitor peripheral provides stack overflow/underflow monitoring.
+ *
+ */
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_monitor_enable(uint32_t core_id)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_montr_ena.core_1_sp_spill_min_ena = 1;
+        BUS_MONITOR.core_1_montr_ena.core_1_sp_spill_max_ena = 1;
+    } else {
+        BUS_MONITOR.core_0_montr_ena.core_0_sp_spill_min_ena = 1;
+        BUS_MONITOR.core_0_montr_ena.core_0_sp_spill_max_ena = 1;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_monitor_disable(uint32_t core_id)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_montr_ena.core_1_sp_spill_min_ena = 0;
+        BUS_MONITOR.core_1_montr_ena.core_1_sp_spill_max_ena = 0;
+    } else {
+        BUS_MONITOR.core_0_montr_ena.core_0_sp_spill_min_ena = 0;
+        BUS_MONITOR.core_0_montr_ena.core_0_sp_spill_max_ena = 0;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_enable(uint32_t core_id)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_intr_ena.core_1_sp_spill_min_intr_ena = 1;
+        BUS_MONITOR.core_1_intr_ena.core_1_sp_spill_max_intr_ena = 1;
+    } else {
+        BUS_MONITOR.core_0_intr_ena.core_0_sp_spill_min_intr_ena = 1;
+        BUS_MONITOR.core_0_intr_ena.core_0_sp_spill_max_intr_ena = 1;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_disable(uint32_t core_id)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_intr_ena.core_1_sp_spill_min_intr_ena = 0;
+        BUS_MONITOR.core_1_intr_ena.core_1_sp_spill_max_intr_ena = 0;
+    } else {
+        BUS_MONITOR.core_0_intr_ena.core_0_sp_spill_min_intr_ena = 0;
+        BUS_MONITOR.core_0_intr_ena.core_0_sp_spill_max_intr_ena = 0;
+    }
+}
+
+FORCE_INLINE_ATTR bool assist_debug_ll_sp_spill_is_fired(uint32_t core_id)
+{
+    if (core_id) {
+        return BUS_MONITOR.core_1_intr_raw.core_1_sp_spill_min_raw || BUS_MONITOR.core_1_intr_raw.core_1_sp_spill_max_raw;
+    } else {
+        return BUS_MONITOR.core_0_intr_raw.core_0_sp_spill_min_raw || BUS_MONITOR.core_0_intr_raw.core_0_sp_spill_max_raw;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_interrupt_clear(uint32_t core_id)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_intr_clr.core_1_sp_spill_min_clr = 1;
+        BUS_MONITOR.core_1_intr_clr.core_1_sp_spill_max_clr = 1;
+    } else {
+        BUS_MONITOR.core_0_intr_clr.core_0_sp_spill_min_clr = 1;
+        BUS_MONITOR.core_0_intr_clr.core_0_sp_spill_max_clr = 1;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_set_min(uint32_t core_id, uint32_t min)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_sp_min.core_1_sp_min = min;
+    } else {
+        BUS_MONITOR.core_0_sp_min.core_0_sp_min = min;
+    }
+}
+
+FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_min(uint32_t core_id)
+{
+    if (core_id) {
+        return BUS_MONITOR.core_1_sp_min.core_1_sp_min;
+    } else {
+        return BUS_MONITOR.core_0_sp_min.core_0_sp_min;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_sp_spill_set_max(uint32_t core_id, uint32_t max)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_sp_max.core_1_sp_max = max;
+    } else {
+        BUS_MONITOR.core_0_sp_max.core_0_sp_max = max;
+    }
+}
+
+FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_max(uint32_t core_id)
+{
+    if (core_id) {
+        return BUS_MONITOR.core_1_sp_max.core_1_sp_max;
+    } else {
+        return BUS_MONITOR.core_0_sp_max.core_0_sp_max;
+    }
+}
+
+FORCE_INLINE_ATTR uint32_t assist_debug_ll_sp_spill_get_pc(uint32_t core_id)
+{
+    if (core_id) {
+        return BUS_MONITOR.core_1_sp_pc.core_1_sp_pc;
+    } else {
+        return BUS_MONITOR.core_0_sp_pc.core_0_sp_pc;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_enable_pc_recording(uint32_t core_id, bool enable)
+{
+    if (core_id) {
+        BUS_MONITOR.core_1_rcd_en.core_1_rcd_pdebugen = enable;
+        BUS_MONITOR.core_1_rcd_en.core_1_rcd_recorden = enable;
+    } else {
+        BUS_MONITOR.core_0_rcd_en.core_0_rcd_pdebugen = enable;
+        BUS_MONITOR.core_0_rcd_en.core_0_rcd_recorden = enable;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_enable_bus_clock(uint32_t core_id, bool enable)
+{
+    if (core_id) {
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core1_clk_en = enable;
+    } else {
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core0_clk_en = enable;
+    }
+}
+
+FORCE_INLINE_ATTR void assist_debug_ll_reset_register(uint32_t core_id)
+{
+    if (core_id) {
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core1_rst_en = true;
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core1_rst_en = false;
+    } else {
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core0_rst_en = true;
+        HP_SYS_CLKRST.busmon_ctrl0.reg_busmon_core0_rst_en = false;
+    }
+}
+
+FORCE_INLINE_ATTR bool assist_debug_ll_is_debugger_active(void)
+{
+    return BUS_MONITOR.core_0_debug_mode.core_0_debug_module_active;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __ASSEMBLER__
diff --git a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
index d847ba14cf..b07cbe31f3 100644
--- a/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
@@ -119,6 +119,10 @@ config SOC_CLK_TREE_SUPPORTED
     bool
     default y
 
+config SOC_ASSIST_DEBUG_SUPPORTED
+    bool
+    default y
+
 config SOC_WDT_SUPPORTED
     bool
     default y
diff --git a/components/soc/esp32s31/include/soc/assist_debug_reg.h b/components/soc/esp32s31/include/soc/assist_debug_reg.h
new file mode 100644
index 0000000000..e95504b247
--- /dev/null
+++ b/components/soc/esp32s31/include/soc/assist_debug_reg.h
@@ -0,0 +1,47 @@
+/**
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ *  SPDX-License-Identifier: Apache-2.0 OR MIT
+ */
+#pragma once
+
+#include "soc/bus_monitor_reg.h"
+
+// Compatible alias
+#define DR_REG_ASSIST_DEBUG_BASE                    DR_REG_BUS_MONITOR_BASE
+
+#define ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG          BUS_MONITOR_CORE_0_DEBUG_MODE_REG
+#define ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE     BUS_MONITOR_CORE_0_DEBUG_MODULE_ACTIVE
+
+#define ASSIST_DEBUG_CORE_0_MONTR_ENA_REG           BUS_MONITOR_CORE_0_MONTR_ENA_REG
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA        BUS_MONITOR_CORE_0_SP_SPILL_MIN_ENA
+#define ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA        BUS_MONITOR_CORE_0_SP_SPILL_MAX_ENA
+
+#define ASSIST_DEBUG_CORE_0_SP_MIN_REG              BUS_MONITOR_CORE_0_SP_MIN_REG
+#define ASSIST_DEBUG_CORE_0_SP_MAX_REG              BUS_MONITOR_CORE_0_SP_MAX_REG
+
+#define ASSIST_DEBUG_CORE_0_RCD_EN_REG              BUS_MONITOR_CORE_0_RCD_EN_REG
+#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN            BUS_MONITOR_CORE_0_RCD_PDEBUGEN
+#define ASSIST_DEBUG_CORE_0_RCD_RECORDEN            BUS_MONITOR_CORE_0_RCD_RECORDEN
+
+#define ASSIST_DEBUG_CORE_0_INTR_ENA_REG            BUS_MONITOR_CORE_0_INTR_ENA_REG
+
+#define ASSIST_DEBUG_CORE_1_DEBUG_MODE_REG          BUS_MONITOR_CORE_1_DEBUG_MODE_REG
+#define ASSIST_DEBUG_CORE_1_DEBUG_MODULE_ACTIVE     BUS_MONITOR_CORE_1_DEBUG_MODULE_ACTIVE
+
+#define ASSIST_DEBUG_CORE_1_MONTR_ENA_REG           BUS_MONITOR_CORE_1_MONTR_ENA_REG
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MIN_ENA        BUS_MONITOR_CORE_1_SP_SPILL_MIN_ENA
+#define ASSIST_DEBUG_CORE_1_SP_SPILL_MAX_ENA        BUS_MONITOR_CORE_1_SP_SPILL_MAX_ENA
+
+#define ASSIST_DEBUG_CORE_1_SP_MIN_REG              BUS_MONITOR_CORE_1_SP_MIN_REG
+#define ASSIST_DEBUG_CORE_1_SP_MAX_REG              BUS_MONITOR_CORE_1_SP_MAX_REG
+
+#define ASSIST_DEBUG_CORE_1_RCD_EN_REG              BUS_MONITOR_CORE_1_RCD_EN_REG
+#define ASSIST_DEBUG_CORE_1_RCD_PDEBUGEN            BUS_MONITOR_CORE_1_RCD_PDEBUGEN
+#define ASSIST_DEBUG_CORE_1_RCD_RECORDEN            BUS_MONITOR_CORE_1_RCD_RECORDEN
+
+#define ASSIST_DEBUG_CORE_1_INTR_ENA_REG            BUS_MONITOR_CORE_1_INTR_ENA_REG
+
+#define ASSIST_DEBUG_SP_SPILL_BITS                  (ASSIST_DEBUG_CORE_0_SP_SPILL_MIN_ENA | ASSIST_DEBUG_CORE_0_SP_SPILL_MAX_ENA)
+#define ASSIST_DEBUG_CORE_0_MONITOR_REG             ASSIST_DEBUG_CORE_0_MONTR_ENA_REG
+#define ASSIST_DEBUG_CORE_1_MONITOR_REG             ASSIST_DEBUG_CORE_1_MONTR_ENA_REG
diff --git a/components/soc/esp32s31/include/soc/soc_caps.h b/components/soc/esp32s31/include/soc/soc_caps.h
index b8bbdc85d3..2449699a9f 100644
--- a/components/soc/esp32s31/include/soc/soc_caps.h
+++ b/components/soc/esp32s31/include/soc/soc_caps.h
@@ -85,7 +85,7 @@
 #define SOC_PSRAM_DMA_CAPABLE           1
 // #define SOC_SDMMC_HOST_SUPPORTED        1      // TODO: [ESP32S31] IDF-14705
 #define SOC_CLK_TREE_SUPPORTED          1
-// #define SOC_ASSIST_DEBUG_SUPPORTED      1      // TODO: [ESP32S31] IDF-14675
+#define SOC_ASSIST_DEBUG_SUPPORTED      1
 // #define SOC_DEBUG_PROBE_SUPPORTED       1      // TODO: [ESP32S31] IDF-14798
 #define SOC_WDT_SUPPORTED               1
 #define SOC_RTC_WDT_SUPPORTED           1
diff --git a/components/soc/esp32s31/ld/esp32s31.peripherals.ld b/components/soc/esp32s31/ld/esp32s31.peripherals.ld
index aac3409799..844c6e9207 100644
--- a/components/soc/esp32s31/ld/esp32s31.peripherals.ld
+++ b/components/soc/esp32s31/ld/esp32s31.peripherals.ld
@@ -116,7 +116,7 @@ PROVIDE ( LP_DAC              = 0x2081A000 );
 PROVIDE ( CACHE               = 0x2C000000 );
 PROVIDE ( TRACE0              = 0x2D000000 );
 PROVIDE ( TRACE1              = 0x2D001000 );
-PROVIDE ( ASSIST_DEBUG        = 0x2D002000 );
+PROVIDE ( BUS_MONITOR         = 0x2D002000 );
 PROVIDE ( MEM_MONITOR0        = 0x2D003000 );
 PROVIDE ( MEM_MONITOR1        = 0x2D004000 );
 
diff --git a/components/soc/esp32s31/register/soc/bus_monitor_struct.h b/components/soc/esp32s31/register/soc/bus_monitor_struct.h
index af67476783..bcd35e52fd 100644
--- a/components/soc/esp32s31/register/soc/bus_monitor_struct.h
+++ b/components/soc/esp32s31/register/soc/bus_monitor_struct.h
@@ -1323,6 +1323,7 @@ typedef struct {
     volatile bus_monitor_date_reg_t date;
 } bus_monitor_dev_t;
 
+extern bus_monitor_dev_t BUS_MONITOR;
 
 #ifndef __cplusplus
 _Static_assert(sizeof(bus_monitor_dev_t) == 0x400, "Invalid size of bus_monitor_dev_t structure");
diff --git a/tools/test_apps/system/build_tests/no_hwsg/README.md b/tools/test_apps/system/build_tests/no_hwsg/README.md
index 73d0bce47e..cd7368daf3 100644
--- a/tools/test_apps/system/build_tests/no_hwsg/README.md
+++ b/tools/test_apps/system/build_tests/no_hwsg/README.md
@@ -1,5 +1,5 @@
-| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 |
-| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- |
+| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S31 |
+| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | --------- |
 
 This project tests building with the no_hwsg configuration.