From 86115b8ae276bcd1e177f87fce127e4b322f1b30 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 29 Jan 2026 18:07:27 +0800 Subject: [PATCH] fix(esp_hw_support): fix rtc clock test case --- .../esp32/include/hal/rtc_timer_ll.h | 8 ++++++-- .../test_apps/rtc_clk/main/test_rtc_clk.c | 12 ++++++++---- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h b/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h index 884a8917f1..f11394dab5 100644 --- a/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h +++ b/components/esp_hal_rtc_timer/esp32/include/hal/rtc_timer_ll.h @@ -44,8 +44,12 @@ FORCE_INLINE_ATTR uint64_t rtc_timer_ll_get_cycle_count(uint8_t timer_id) while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) { esp_rom_delay_us(1); if (attempts) { - if (--attempts == 0 && clk_ll_xtal32k_digi_is_enabled()) { - HAL_LOGW("rtc_timer_ll", "32KHz xtal has been stopped."); + if (--attempts == 0) { + if (clk_ll_xtal32k_digi_is_enabled()) { + HAL_EARLY_LOGW("rtc_timer_ll", "32KHz xtal has been stopped."); + } + HAL_EARLY_LOGW("rtc_timer_ll", "RTC Timer stopped."); + break; } } } diff --git a/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c b/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c index d6e7fd4b3c..4ab99a9f65 100644 --- a/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c +++ b/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c @@ -50,9 +50,13 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]") rtc_clk_32k_enable(true); #endif +#if SOC_CLK_RC_FAST_D256_SUPPORTED + rtc_clk_8m_enable(true, true); +#endif + // By default Kconfig, RTC_SLOW_CLK source is RC_SLOW soc_rtc_slow_clk_src_t default_rtc_slow_clk_src = rtc_clk_slow_src_get(); - CALIBRATE_ONE(CLK_CAL_RTC_SLOW); + TEST_ASSERT_NOT_EQUAL(0, CALIBRATE_ONE(CLK_CAL_RTC_SLOW)); #if SOC_CLK_RC_FAST_D256_SUPPORTED CALIBRATE_ONE(CLK_CAL_RC_FAST_D256); #endif @@ -66,7 +70,7 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]") rtc_clk_slow_src_set(SOC_RTC_SLOW_CLK_SRC_XTAL32K); printf("done\n"); - CALIBRATE_ONE(CLK_CAL_RTC_SLOW); + TEST_ASSERT_NOT_EQUAL(0, CALIBRATE_ONE(CLK_CAL_RTC_SLOW)); #if SOC_CLK_RC_FAST_D256_SUPPORTED CALIBRATE_ONE(CLK_CAL_RC_FAST_D256); #endif @@ -79,7 +83,7 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]") rtc_clk_slow_src_set(SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256); printf("done\n"); - CALIBRATE_ONE(CLK_CAL_RTC_SLOW); + TEST_ASSERT_NOT_EQUAL(0, CALIBRATE_ONE(CLK_CAL_RTC_SLOW)); CALIBRATE_ONE(CLK_CAL_RC_FAST_D256); #if SOC_CLK_XTAL32K_SUPPORTED CALIBRATE_ONE(CLK_CAL_32K_XTAL); @@ -96,7 +100,7 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]") rtc_clk_slow_src_set(SOC_RTC_SLOW_CLK_SRC_OSC_SLOW); printf("done\n"); - CALIBRATE_ONE(CLK_CAL_RTC_SLOW); + TEST_ASSERT_NOT_EQUAL(0, CALIBRATE_ONE(CLK_CAL_RTC_SLOW)); #if SOC_CLK_RC_FAST_D256_SUPPORTED CALIBRATE_ONE(CLK_CAL_RC_FAST_D256); #endif