diff --git a/components/bootloader_support/CMakeLists.txt b/components/bootloader_support/CMakeLists.txt index 8fcccfe248..5a1b5e2b9d 100644 --- a/components/bootloader_support/CMakeLists.txt +++ b/components/bootloader_support/CMakeLists.txt @@ -73,7 +73,8 @@ if(BOOTLOADER_BUILD OR CONFIG_APP_BUILD_TYPE_RAM) set(include_dirs "include" "bootloader_flash/include" "private_include") set(priv_requires micro-ecc spi_flash efuse esp_bootloader_format esp_app_format esptool_py) - list(APPEND priv_requires esp_hal_wdt esp_hal_gpio) + # `esp_hal_ana_conv` is required by bootloader_random_esp32xx.c + list(APPEND priv_requires esp_hal_wdt esp_hal_gpio esp_hal_ana_conv) list(APPEND srcs "src/bootloader_init.c" "src/bootloader_clock_loader.c" @@ -90,7 +91,8 @@ else() set(priv_include_dirs "private_include") # heap is required for `heap_memory_layout.h` header set(priv_requires spi_flash mbedtls efuse heap esp_bootloader_format esp_app_format esptool_py) - list(APPEND priv_requires esp_hal_wdt esp_hal_gpio) + # `esp_hal_ana_conv` is required by bootloader_random_esp32xx.c + list(APPEND priv_requires esp_hal_wdt esp_hal_gpio esp_hal_ana_conv) endif() if(BOOTLOADER_BUILD) diff --git a/components/bootloader_support/src/bootloader_random_esp32.c b/components/bootloader_support/src/bootloader_random_esp32.c index 558ca0df31..f8c3c8a7f9 100644 --- a/components/bootloader_support/src/bootloader_random_esp32.c +++ b/components/bootloader_support/src/bootloader_random_esp32.c @@ -9,7 +9,8 @@ #include "soc/sens_reg.h" #include "soc/syscon_reg.h" #include "soc/dport_reg.h" -#include "soc/i2s_periph.h" +#include "soc/i2s_reg.h" +#include "soc/periph_defs.h" #include "esp_log.h" #include "soc/io_mux_reg.h" diff --git a/components/bootloader_support/src/bootloader_random_esp32s2.c b/components/bootloader_support/src/bootloader_random_esp32s2.c index b71eb40f6a..b946897188 100644 --- a/components/bootloader_support/src/bootloader_random_esp32s2.c +++ b/components/bootloader_support/src/bootloader_random_esp32s2.c @@ -9,7 +9,6 @@ #include "soc/sens_reg.h" #include "soc/dport_reg.h" #include "soc/syscon_reg.h" -#include "soc/i2s_periph.h" #include "esp_log.h" #include "soc/apb_saradc_reg.h" #include "esp_private/regi2c_ctrl.h" diff --git a/components/driver/CMakeLists.txt b/components/driver/CMakeLists.txt index d3c3e125ed..160232ca29 100644 --- a/components/driver/CMakeLists.txt +++ b/components/driver/CMakeLists.txt @@ -45,7 +45,7 @@ else() idf_component_register(SRCS "${srcs}" INCLUDE_DIRS ${includes} PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio esp_ringbuf esp_pm - REQUIRES esp_hal_i2c esp_hal_twai + REQUIRES esp_hal_i2c esp_hal_twai esp_hal_touch_sens LDFRAGMENTS ${ldfragments} ) endif() diff --git a/components/driver/test_apps/.build-test-rules.yml b/components/driver/test_apps/.build-test-rules.yml index 79b8aef954..8d374aa1c1 100644 --- a/components/driver/test_apps/.build-test-rules.yml +++ b/components/driver/test_apps/.build-test-rules.yml @@ -25,13 +25,14 @@ components/driver/test_apps/touch_element: - if: IDF_TARGET not in ["esp32s2", "esp32s3"] reason: only supports esp32s2 and esp32s3 depends_filepatterns: - - components/soc/**/touch_sensor_periph.h - components/soc/esp32s2/**/rtc_cntl_* - components/soc/esp32s3/**/rtc_cntl_* - components/soc/esp32s2/**/rtc_io_struct.h - components/soc/esp32s3/**/rtc_io_struct.h - components/soc/esp32s2/**/sens_struct.h - components/soc/esp32s3/**/sens_struct.h + depends_components: + - esp_hal_touch_sens components/driver/test_apps/touch_sensor_v1: disable: diff --git a/components/driver/touch_sensor/esp32/touch_sensor.c b/components/driver/touch_sensor/esp32/touch_sensor.c index 5e52782b44..5490822ead 100644 --- a/components/driver/touch_sensor/esp32/touch_sensor.c +++ b/components/driver/touch_sensor/esp32/touch_sensor.c @@ -11,7 +11,7 @@ #include "esp_log.h" #include "sys/lock.h" #include "soc/rtc.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/periph_defs.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" @@ -29,7 +29,7 @@ #endif #include "sys/queue.h" #include "hal/touch_sensor_legacy_types.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" typedef struct { esp_timer_handle_t timer; @@ -52,8 +52,8 @@ static SemaphoreHandle_t rtc_touch_mux = NULL; static __attribute__((unused)) const char *TOUCH_TAG = "TOUCH_SENSOR"; -#define TOUCH_CHANNEL_CHECK(channel) ESP_RETURN_ON_FALSE(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); -#define TOUCH_CHANNEL_CHECK_ISR(channel) ESP_RETURN_ON_FALSE_ISR(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); +#define TOUCH_CHANNEL_CHECK(channel) ESP_RETURN_ON_FALSE(channel < TOUCH_LL_GET(CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); +#define TOUCH_CHANNEL_CHECK_ISR(channel) ESP_RETURN_ON_FALSE_ISR(channel < TOUCH_LL_GET(CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); #define TOUCH_NULL_POINTER_CHECK(p, name) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TOUCH_TAG, "input param '"name"' is NULL") #define TOUCH_NULL_POINTER_CHECK_ISR(p, name) ESP_RETURN_ON_FALSE_ISR((p), ESP_ERR_INVALID_ARG, TOUCH_TAG, "input param '"name"' is NULL") #define TOUCH_PARAM_CHECK_STR(s) ""s" parameter error" diff --git a/components/driver/touch_sensor/esp32s2/touch_sensor.c b/components/driver/touch_sensor/esp32s2/touch_sensor.c index 1e92c1b4fe..e69dbd9fc1 100644 --- a/components/driver/touch_sensor/esp32s2/touch_sensor.c +++ b/components/driver/touch_sensor/esp32s2/touch_sensor.c @@ -10,7 +10,7 @@ #include "esp_log.h" #include "sys/lock.h" #include "soc/soc_pins.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/rtc_cntl_reg.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" @@ -24,7 +24,7 @@ #include "esp_check.h" #include "hal/touch_sensor_legacy_types.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #ifndef NDEBUG // Enable built-in checks in queue.h in debug builds @@ -40,8 +40,8 @@ static __attribute__((unused)) const char *TOUCH_TAG = "TOUCH_SENSOR"; #define TOUCH_CHANNEL_CHECK(channel) do { \ - ESP_RETURN_ON_FALSE(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM) && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); \ - ESP_RETURN_ON_FALSE(channel != SOC_TOUCH_DENOISE_CHANNEL, ESP_ERR_INVALID_ARG, TOUCH_TAG, "TOUCH0 is internal denoise channel"); \ + ESP_RETURN_ON_FALSE(channel < TOUCH_LL_GET(CHAN_NUM) && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); \ + ESP_RETURN_ON_FALSE(channel != TOUCH_LL_GET(DENOISE_CHAN_ID), ESP_ERR_INVALID_ARG, TOUCH_TAG, "TOUCH0 is internal denoise channel"); \ } while (0); #define TOUCH_CH_MASK_CHECK(mask) ESP_RETURN_ON_FALSE((mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG, "touch channel bitmask error"); #define TOUCH_INTR_MASK_CHECK(mask) ESP_RETURN_ON_FALSE(mask & TOUCH_PAD_INTR_MASK_ALL, ESP_ERR_INVALID_ARG, TOUCH_TAG, "intr mask error"); @@ -422,7 +422,7 @@ esp_err_t touch_pad_filter_disable(void) esp_err_t touch_pad_denoise_enable(void) { TOUCH_ENTER_CRITICAL(); - touch_hal_clear_channel_mask(BIT(SOC_TOUCH_DENOISE_CHANNEL)); + touch_hal_clear_channel_mask(BIT(TOUCH_LL_GET(DENOISE_CHAN_ID))); touch_hal_denoise_enable(); TOUCH_EXIT_CRITICAL(); return ESP_OK; @@ -447,7 +447,7 @@ esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise) .tie_opt = TOUCH_PAD_TIE_OPT_DEFAULT, }; TOUCH_ENTER_CRITICAL(); - touch_hal_set_meas_mode(SOC_TOUCH_DENOISE_CHANNEL, &meas); + touch_hal_set_meas_mode(TOUCH_LL_GET(DENOISE_CHAN_ID), &meas); touch_hal_denoise_set_config(denoise); TOUCH_EXIT_CRITICAL(); @@ -473,7 +473,7 @@ esp_err_t touch_pad_denoise_read_data(uint32_t *data) esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof) { TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof"); - ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("pad")); + ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < TOUCH_LL_GET(CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("pad")); ESP_RETURN_ON_FALSE(waterproof->shield_driver < TOUCH_PAD_SHIELD_DRV_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("shield_driver")); TOUCH_ENTER_CRITICAL(); @@ -493,7 +493,7 @@ esp_err_t touch_pad_waterproof_get_config(touch_pad_waterproof_t *waterproof) esp_err_t touch_pad_waterproof_enable(void) { - touch_pad_io_init(SOC_TOUCH_SHIELD_CHANNEL); + touch_pad_io_init(TOUCH_LL_GET(SHIELD_CHAN_ID)); TOUCH_ENTER_CRITICAL(); touch_hal_waterproof_enable(); TOUCH_EXIT_CRITICAL(); diff --git a/components/driver/touch_sensor/esp32s3/touch_sensor.c b/components/driver/touch_sensor/esp32s3/touch_sensor.c index 071a114f4f..f3254ace29 100644 --- a/components/driver/touch_sensor/esp32s3/touch_sensor.c +++ b/components/driver/touch_sensor/esp32s3/touch_sensor.c @@ -10,7 +10,7 @@ #include "esp_log.h" #include "sys/lock.h" #include "soc/soc_pins.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/rtc_cntl_reg.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" @@ -24,7 +24,7 @@ #include "esp_check.h" #include "hal/touch_sensor_legacy_types.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #ifndef NDEBUG // Enable built-in checks in queue.h in debug builds @@ -40,8 +40,8 @@ static __attribute__((unused)) const char *TOUCH_TAG = "TOUCH_SENSOR"; #define TOUCH_CHANNEL_CHECK(channel) do { \ - ESP_RETURN_ON_FALSE(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM) && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); \ - ESP_RETURN_ON_FALSE(channel != SOC_TOUCH_DENOISE_CHANNEL, ESP_ERR_INVALID_ARG, TOUCH_TAG, "TOUCH0 is internal denoise channel"); \ + ESP_RETURN_ON_FALSE(channel < TOUCH_LL_GET(CHAN_NUM) && channel >= 0, ESP_ERR_INVALID_ARG, TOUCH_TAG, "Touch channel error"); \ + ESP_RETURN_ON_FALSE(channel != TOUCH_LL_GET(DENOISE_CHAN_ID), ESP_ERR_INVALID_ARG, TOUCH_TAG, "TOUCH0 is internal denoise channel"); \ } while (0); #define TOUCH_CH_MASK_CHECK(mask) ESP_RETURN_ON_FALSE((mask <= TOUCH_PAD_BIT_MASK_ALL), ESP_ERR_INVALID_ARG, TOUCH_TAG, "touch channel bitmask error"); #define TOUCH_INTR_MASK_CHECK(mask) ESP_RETURN_ON_FALSE(mask & TOUCH_PAD_INTR_MASK_ALL, ESP_ERR_INVALID_ARG, TOUCH_TAG, "intr mask error"); @@ -396,7 +396,7 @@ esp_err_t touch_pad_filter_disable(void) esp_err_t touch_pad_denoise_enable(void) { TOUCH_ENTER_CRITICAL(); - touch_hal_clear_channel_mask(BIT(SOC_TOUCH_DENOISE_CHANNEL)); + touch_hal_clear_channel_mask(BIT(TOUCH_LL_GET(DENOISE_CHAN_ID))); touch_hal_denoise_enable(); TOUCH_EXIT_CRITICAL(); return ESP_OK; @@ -421,7 +421,7 @@ esp_err_t touch_pad_denoise_set_config(const touch_pad_denoise_t *denoise) .tie_opt = TOUCH_PAD_TIE_OPT_DEFAULT, }; TOUCH_ENTER_CRITICAL(); - touch_hal_set_meas_mode(SOC_TOUCH_DENOISE_CHANNEL, &meas); + touch_hal_set_meas_mode(TOUCH_LL_GET(DENOISE_CHAN_ID), &meas); touch_hal_denoise_set_config(denoise); TOUCH_EXIT_CRITICAL(); @@ -446,7 +446,7 @@ esp_err_t touch_pad_denoise_read_data(uint32_t *data) esp_err_t touch_pad_waterproof_set_config(const touch_pad_waterproof_t *waterproof) { TOUCH_NULL_POINTER_CHECK(waterproof, "waterproof"); - ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("pad")); + ESP_RETURN_ON_FALSE(waterproof->guard_ring_pad < TOUCH_LL_GET(CHAN_NUM), ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("pad")); ESP_RETURN_ON_FALSE(waterproof->shield_driver < TOUCH_PAD_SHIELD_DRV_MAX, ESP_ERR_INVALID_ARG, TOUCH_TAG, TOUCH_PARAM_CHECK_STR("shield_driver")); TOUCH_ENTER_CRITICAL(); @@ -466,7 +466,7 @@ esp_err_t touch_pad_waterproof_get_config(touch_pad_waterproof_t *waterproof) esp_err_t touch_pad_waterproof_enable(void) { - touch_pad_io_init(SOC_TOUCH_SHIELD_CHANNEL); + touch_pad_io_init(TOUCH_LL_GET(SHIELD_CHAN_ID)); TOUCH_ENTER_CRITICAL(); touch_hal_waterproof_enable(); TOUCH_EXIT_CRITICAL(); diff --git a/components/driver/touch_sensor/touch_sensor_common.c b/components/driver/touch_sensor/touch_sensor_common.c index 7ad4a81c3d..c31aa040df 100644 --- a/components/driver/touch_sensor/touch_sensor_common.c +++ b/components/driver/touch_sensor/touch_sensor_common.c @@ -11,7 +11,7 @@ #include "esp_log.h" #include "sys/lock.h" #include "soc/soc_pins.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" #include "freertos/timers.h" @@ -19,7 +19,7 @@ #include "esp_private/rtc_ctrl.h" #include "esp_private/gpio.h" #include "hal/touch_sensor_legacy_types.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" static const char *TOUCH_TAG = "TOUCH_SENSOR"; #define TOUCH_CHECK(a, str, ret_val) ({ \ @@ -30,18 +30,18 @@ static const char *TOUCH_TAG = "TOUCH_SENSOR"; }) #ifdef CONFIG_IDF_TARGET_ESP32 #define TOUCH_CHANNEL_CHECK(channel) do { \ - TOUCH_CHECK(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM) && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ + TOUCH_CHECK(channel < TOUCH_LL_GET(CHAN_NUM) && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ } while (0); #else // !CONFIG_IDF_TARGET_ESP32 #define TOUCH_CHANNEL_CHECK(channel) do { \ - TOUCH_CHECK(channel < SOC_MODULE_ATTR(TOUCH, CHAN_NUM) && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ - TOUCH_CHECK(channel != SOC_TOUCH_DENOISE_CHANNEL, "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); \ + TOUCH_CHECK(channel < TOUCH_LL_GET(CHAN_NUM) && channel >= 0, "Touch channel error", ESP_ERR_INVALID_ARG); \ + TOUCH_CHECK(channel != TOUCH_LL_GET(DENOISE_CHAN_ID), "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); \ } while (0); #endif // CONFIG_IDF_TARGET_ESP32 #define TOUCH_GET_IO_NUM(channel) (touch_sensor_channel_io_map[channel]) -_Static_assert(TOUCH_PAD_MAX == SOC_MODULE_ATTR(TOUCH, CHAN_NUM), "Touch sensor channel number not equal to chip capabilities"); +_Static_assert(TOUCH_PAD_MAX == TOUCH_LL_GET(CHAN_NUM), "Touch sensor channel number not equal to chip capabilities"); extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished. #define TOUCH_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock) @@ -88,7 +88,7 @@ esp_err_t touch_pad_get_voltage(touch_high_volt_t *refh, touch_low_volt_t *refl, esp_err_t touch_pad_set_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t slope, touch_tie_opt_t opt) { - TOUCH_CHECK(touch_num < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), "Touch channel error", ESP_ERR_INVALID_ARG); + TOUCH_CHECK(touch_num < TOUCH_LL_GET(CHAN_NUM), "Touch channel error", ESP_ERR_INVALID_ARG); TOUCH_CHECK(slope < TOUCH_PAD_SLOPE_MAX, "touch slope error", ESP_ERR_INVALID_ARG); TOUCH_CHECK(opt < TOUCH_PAD_TIE_OPT_MAX, "touch opt error", ESP_ERR_INVALID_ARG); @@ -105,7 +105,7 @@ esp_err_t touch_pad_set_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t slope, esp_err_t touch_pad_get_cnt_mode(touch_pad_t touch_num, touch_cnt_slope_t *slope, touch_tie_opt_t *opt) { - TOUCH_CHECK(touch_num < SOC_MODULE_ATTR(TOUCH, CHAN_NUM), "Touch channel error", ESP_ERR_INVALID_ARG); + TOUCH_CHECK(touch_num < TOUCH_LL_GET(CHAN_NUM), "Touch channel error", ESP_ERR_INVALID_ARG); touch_hal_meas_mode_t meas = {0}; TOUCH_ENTER_CRITICAL(); @@ -184,7 +184,7 @@ esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint16_t threshold) esp_err_t touch_pad_set_thresh(touch_pad_t touch_num, uint32_t threshold) { TOUCH_CHANNEL_CHECK(touch_num); - TOUCH_CHECK(touch_num != SOC_TOUCH_DENOISE_CHANNEL, + TOUCH_CHECK(touch_num != TOUCH_LL_GET(DENOISE_CHAN_ID), "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); TOUCH_ENTER_CRITICAL(); touch_hal_set_threshold(touch_num, threshold); @@ -204,7 +204,7 @@ esp_err_t touch_pad_get_thresh(touch_pad_t touch_num, uint16_t *threshold) esp_err_t touch_pad_get_thresh(touch_pad_t touch_num, uint32_t *threshold) { TOUCH_CHANNEL_CHECK(touch_num); - TOUCH_CHECK(touch_num != SOC_TOUCH_DENOISE_CHANNEL, + TOUCH_CHECK(touch_num != TOUCH_LL_GET(DENOISE_CHAN_ID), "TOUCH0 is internal denoise channel", ESP_ERR_INVALID_ARG); touch_hal_get_threshold(touch_num, threshold); return ESP_OK; diff --git a/components/esp_adc/CMakeLists.txt b/components/esp_adc/CMakeLists.txt index d52d3c70dd..af13e07c66 100644 --- a/components/esp_adc/CMakeLists.txt +++ b/components/esp_adc/CMakeLists.txt @@ -57,4 +57,5 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes} PRIV_REQUIRES esp_driver_gpio efuse esp_pm esp_ringbuf esp_mm ${extra_requires} + REQUIRES esp_hal_ana_conv LDFRAGMENTS linker.lf) diff --git a/components/esp_adc/adc_common.c b/components/esp_adc/adc_common.c index 93720e405d..edc2c749f7 100644 --- a/components/esp_adc/adc_common.c +++ b/components/esp_adc/adc_common.c @@ -16,7 +16,7 @@ #include "hal/adc_hal.h" #include "hal/adc_hal_common.h" #include "esp_private/regi2c_ctrl.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "hal/adc_ll.h" static const char *TAG = "adc_common"; diff --git a/components/esp_adc/adc_oneshot.c b/components/esp_adc/adc_oneshot.c index 4f701f87b7..a85ac196b5 100644 --- a/components/esp_adc/adc_oneshot.c +++ b/components/esp_adc/adc_oneshot.c @@ -30,7 +30,7 @@ #include "hal/adc_types.h" #include "hal/adc_oneshot_hal.h" #include "hal/adc_ll.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/soc_caps.h" #if CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM diff --git a/components/esp_adc/esp32/adc_dma.c b/components/esp_adc/esp32/adc_dma.c index 32e481b586..50251d59df 100644 --- a/components/esp_adc/esp32/adc_dma.c +++ b/components/esp_adc/esp32/adc_dma.c @@ -14,7 +14,7 @@ #include "hal/i2s_types.h" #include "driver/i2s_types.h" -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "esp_private/i2s_platform.h" #include "esp_private/adc_dma.h" #include "hal/i2s_ll.h" diff --git a/components/esp_adc/linker.lf b/components/esp_adc/linker.lf index 7c47533bf6..e3c1ea4ee2 100644 --- a/components/esp_adc/linker.lf +++ b/components/esp_adc/linker.lf @@ -11,7 +11,7 @@ entries: esp_clk_tree: esp_clk_tree_enable_src (noflash) [mapping:adc_hal] -archive: libhal.a +archive: libesp_hal_ana_conv.a entries: if ADC_ONESHOT_CTRL_FUNC_IN_IRAM = y: adc_oneshot_hal (noflash) diff --git a/components/esp_adc/test_apps/adc/CMakeLists.txt b/components/esp_adc/test_apps/adc/CMakeLists.txt index bc09aead1e..e79d557dd8 100644 --- a/components/esp_adc/test_apps/adc/CMakeLists.txt +++ b/components/esp_adc/test_apps/adc/CMakeLists.txt @@ -11,9 +11,18 @@ project(adc_test) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(ADC_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_adc + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_ana_conv + ) + string(JOIN "," ADC_RTL_DIRS_JOINED ${ADC_RTL_DIRS}) + add_custom_target(check_test_app_sections ALL COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_adc/,${CMAKE_BINARY_DIR}/esp-idf/hal/ + --rtl-dirs ${ADC_RTL_DIRS_JOINED} --elf-file ${CMAKE_BINARY_DIR}/adc_test.elf find-refs --from-sections=.iram0.text diff --git a/components/esp_adc/test_apps/adc/main/test_adc.c b/components/esp_adc/test_apps/adc/main/test_adc.c index bce71714fc..04914a61bf 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_adc.c @@ -9,7 +9,7 @@ #include "esp_log.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "esp_adc/adc_oneshot.h" #include "esp_adc/adc_monitor.h" #include "driver/gpio.h" diff --git a/components/esp_adc/test_apps/adc/main/test_adc_performance.c b/components/esp_adc/test_apps/adc/main/test_adc_performance.c index cb9c468bfb..a5867aa9c1 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_performance.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_performance.c @@ -11,7 +11,7 @@ #include "esp_log.h" #include "esp_err.h" #include "esp_cpu.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "esp_adc/adc_oneshot.h" diff --git a/components/esp_adc/test_apps/adc/main/test_adc_tsens.c b/components/esp_adc/test_apps/adc/main/test_adc_tsens.c index b95e1c2b23..3c1ef13af2 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_tsens.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_tsens.c @@ -8,7 +8,7 @@ #include #include #include "esp_log.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "esp_adc/adc_oneshot.h" #include "esp_adc/adc_continuous.h" #include "driver/gpio.h" diff --git a/components/esp_adc/test_apps/adc/main/test_adc_wifi.c b/components/esp_adc/test_apps/adc/main/test_adc_wifi.c index e9380a825b..a185723422 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_wifi.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_wifi.c @@ -8,7 +8,7 @@ #include #include #include "esp_log.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "esp_adc/adc_oneshot.h" #include "driver/gpio.h" #include "driver/rtc_io.h" diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.c b/components/esp_adc/test_apps/adc/main/test_common_adc.c index 6d7564ddc1..e38e3f03ea 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.c @@ -11,7 +11,7 @@ #include "freertos/task.h" #include "driver/gpio.h" #include "driver/rtc_io.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "test_common_adc.h" #include "hal/adc_ll.h" diff --git a/components/esp_driver_ana_cmpr/CMakeLists.txt b/components/esp_driver_ana_cmpr/CMakeLists.txt index c73f5f7a4c..acc80a1f1c 100644 --- a/components/esp_driver_ana_cmpr/CMakeLists.txt +++ b/components/esp_driver_ana_cmpr/CMakeLists.txt @@ -19,5 +19,6 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS "include" PRIV_REQUIRES "${priv_requires}" + REQUIRES esp_hal_ana_cmpr LDFRAGMENTS "linker.lf" ) diff --git a/components/esp_driver_ana_cmpr/ana_cmpr_private.h b/components/esp_driver_ana_cmpr/ana_cmpr_private.h index 73fb051653..b4d003421f 100644 --- a/components/esp_driver_ana_cmpr/ana_cmpr_private.h +++ b/components/esp_driver_ana_cmpr/ana_cmpr_private.h @@ -24,7 +24,7 @@ #include "driver/ana_cmpr_types.h" #include "soc/soc_caps.h" #include "hal/ana_cmpr_ll.h" -#include "soc/ana_cmpr_periph.h" +#include "hal/ana_cmpr_periph.h" #define TAG "ana_cmpr" diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/CMakeLists.txt b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/CMakeLists.txt index eb163cfa99..3585f5482f 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/CMakeLists.txt +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/CMakeLists.txt @@ -9,9 +9,17 @@ project(test_ana_cmpr) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(ANA_CMPR_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_ana_cmpr + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_ana_cmpr + ) + string(JOIN "," ANA_CMPR_RTL_DIRS_JOINED ${ANA_CMPR_RTL_DIRS}) add_custom_target(check_test_app_sections ALL COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_ana_cmpr/,${CMAKE_BINARY_DIR}/esp-idf/hal/ + --rtl-dirs ${ANA_CMPR_RTL_DIRS_JOINED} --elf-file ${CMAKE_BINARY_DIR}/test_ana_cmpr.elf find-refs --from-sections=.iram0.text diff --git a/components/esp_driver_dac/CMakeLists.txt b/components/esp_driver_dac/CMakeLists.txt index 4b34f22df6..bc62c40ed6 100644 --- a/components/esp_driver_dac/CMakeLists.txt +++ b/components/esp_driver_dac/CMakeLists.txt @@ -28,5 +28,6 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS "./include" PRIV_REQUIRES ${priv_req} + REQUIRES esp_hal_ana_conv LDFRAGMENTS "linker.lf" ) diff --git a/components/esp_driver_dac/dac_common.c b/components/esp_driver_dac/dac_common.c index d56e82b997..18b7c716ae 100644 --- a/components/esp_driver_dac/dac_common.c +++ b/components/esp_driver_dac/dac_common.c @@ -8,7 +8,7 @@ #include #include "freertos/FreeRTOS.h" #include "soc/soc_caps.h" -#include "soc/dac_periph.h" +#include "hal/dac_periph.h" #include "hal/dac_types.h" #include "hal/dac_ll.h" #include "esp_private/gpio.h" diff --git a/components/esp_driver_dac/esp32/dac_dma.c b/components/esp_driver_dac/esp32/dac_dma.c index 8402fa2709..21314ad098 100644 --- a/components/esp_driver_dac/esp32/dac_dma.c +++ b/components/esp_driver_dac/esp32/dac_dma.c @@ -18,7 +18,7 @@ #include "hal/i2s_hal.h" #include "hal/i2s_types.h" #include "hal/clk_tree_ll.h" -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "../dac_priv_dma.h" #include "esp_private/i2s_platform.h" #include "esp_private/esp_clk.h" diff --git a/components/esp_driver_dac/test_apps/dac/CMakeLists.txt b/components/esp_driver_dac/test_apps/dac/CMakeLists.txt index 0ee7db04a8..0903b65dcd 100644 --- a/components/esp_driver_dac/test_apps/dac/CMakeLists.txt +++ b/components/esp_driver_dac/test_apps/dac/CMakeLists.txt @@ -9,9 +9,17 @@ project(dac_test) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(DAC_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_dac + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_ana_conv + ) + string(JOIN "," DAC_RTL_DIRS_JOINED ${DAC_RTL_DIRS}) add_custom_target(check_test_app_sections ALL COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_dac/,${CMAKE_BINARY_DIR}/esp-idf/hal/ + --rtl-dirs ${DAC_RTL_DIRS_JOINED} --elf-file ${CMAKE_BINARY_DIR}/dac_test.elf find-refs --from-sections=.iram0.text diff --git a/components/esp_driver_dac/test_apps/dac/main/test_dac.c b/components/esp_driver_dac/test_apps/dac/main/test_dac.c index ed0d895283..c36e25b3fe 100644 --- a/components/esp_driver_dac/test_apps/dac/main/test_dac.c +++ b/components/esp_driver_dac/test_apps/dac/main/test_dac.c @@ -18,7 +18,7 @@ #if CONFIG_IDF_TARGET_ESP32 #include "esp_private/i2s_platform.h" // Following headers are used to test the conversion frequency -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "driver/pulse_cnt.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp_private/spi_common_internal.h" diff --git a/components/esp_driver_gpio/src/dedic_gpio.c b/components/esp_driver_gpio/src/dedic_gpio.c index 64cd123428..dcaaf7b9cf 100644 --- a/components/esp_driver_gpio/src/dedic_gpio.c +++ b/components/esp_driver_gpio/src/dedic_gpio.c @@ -15,7 +15,7 @@ #include "esp_log.h" #include "esp_check.h" #include "esp_cpu.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/io_mux_reg.h" #include "hal/dedic_gpio_caps.h" #include "hal/dedic_gpio_cpu_ll.h" diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c index a9ab9c8be3..1cc63d7aa3 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c @@ -11,7 +11,7 @@ #include "unity.h" #include "unity_test_utils.h" #include "esp_rom_sys.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "hal/dedic_gpio_caps.h" #include "hal/dedic_gpio_periph.h" #include "hal/dedic_gpio_cpu_ll.h" diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c index 58994204a1..e85d42d19a 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c @@ -12,7 +12,7 @@ #include "unity.h" #include "driver/gpio_filter.h" #include "driver/dedic_gpio.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #if CONFIG_IDF_TARGET_ESP32P4 #define TEST_FILTER_GPIO 20 diff --git a/components/esp_driver_i2s/CMakeLists.txt b/components/esp_driver_i2s/CMakeLists.txt index f8bcfb91dc..be49a9d72f 100644 --- a/components/esp_driver_i2s/CMakeLists.txt +++ b/components/esp_driver_i2s/CMakeLists.txt @@ -6,6 +6,12 @@ endif() set(srcs) set(include "include") +set(priv_requires esp_driver_gpio esp_pm esp_mm) + +if(${target} STREQUAL "esp32") + # ADC on esp32 is routed to I2S0, I2S driver needs to operate ADC to ensure the I2S function. + list(APPEND priv_requires esp_hal_ana_conv) +endif() # I2S related source files if(CONFIG_SOC_I2S_SUPPORTED) @@ -36,6 +42,7 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${include} - PRIV_REQUIRES esp_driver_gpio esp_pm esp_mm + PRIV_REQUIRES ${priv_requires} + REQUIRES esp_hal_i2s LDFRAGMENTS linker.lf ) diff --git a/components/esp_driver_i2s/i2s_common.c b/components/esp_driver_i2s/i2s_common.c index 1be3d09b57..287668a7f2 100644 --- a/components/esp_driver_i2s/i2s_common.c +++ b/components/esp_driver_i2s/i2s_common.c @@ -21,9 +21,8 @@ #endif #include "esp_log.h" -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "hal/i2s_hal.h" #include "hal/hal_utils.h" #include "hal/dma_types.h" @@ -227,13 +226,13 @@ static esp_err_t i2s_destroy_controller_obj(i2s_controller_t **i2s_obj) * @param id i2s port id * @param search_reverse reverse the sequence of port acquirement * set false to acquire from I2S_NUM_0 first - * set true to acquire from SOC_I2S_ATTR(INST_NUM) - 1 first + * set true to acquire from I2S_LL_GET(INST_NUM) - 1 first * @return * - pointer of acquired i2s controller object */ static i2s_controller_t *i2s_acquire_controller_obj(int id) { - if (id < 0 || id >= SOC_I2S_ATTR(INST_NUM)) { + if (id < 0 || id >= I2S_LL_GET(INST_NUM)) { return NULL; } /* pre-alloc controller object */ @@ -792,17 +791,17 @@ esp_err_t i2s_init_dma_intr(i2s_chan_handle_t handle, int intr_flag) { esp_err_t ret = ESP_OK; int port_id = handle->controller->id; - ESP_RETURN_ON_FALSE((port_id >= 0) && (port_id < SOC_I2S_ATTR(INST_NUM)), ESP_ERR_INVALID_ARG, TAG, "invalid handle"); + ESP_RETURN_ON_FALSE((port_id >= 0) && (port_id < I2S_LL_GET(INST_NUM)), ESP_ERR_INVALID_ARG, TAG, "invalid handle"); /* Set GDMA trigger module */ gdma_trigger_t trig = {.periph = GDMA_TRIG_PERIPH_I2S}; switch (port_id) { -#if SOC_I2S_ATTR(INST_NUM) > 2 +#if I2S_LL_GET(INST_NUM) > 2 case I2S_NUM_2: trig.instance_id = SOC_GDMA_TRIG_PERIPH_I2S2; break; #endif -#if SOC_I2S_ATTR(INST_NUM) > 1 +#if I2S_LL_GET(INST_NUM) > 1 case I2S_NUM_1: trig.instance_id = SOC_GDMA_TRIG_PERIPH_I2S1; break; @@ -863,7 +862,7 @@ esp_err_t i2s_init_dma_intr(i2s_chan_handle_t handle, int intr_flag) { esp_err_t ret = ESP_OK; int port_id = handle->controller->id; - ESP_RETURN_ON_FALSE((port_id >= 0) && (port_id < SOC_I2S_ATTR(INST_NUM)), ESP_ERR_INVALID_ARG, TAG, "invalid handle"); + ESP_RETURN_ON_FALSE((port_id >= 0) && (port_id < I2S_LL_GET(INST_NUM)), ESP_ERR_INVALID_ARG, TAG, "invalid handle"); intr_flag |= handle->intr_prio_flags; /* Initialize I2S module interrupt */ if (handle->dir == I2S_DIR_TX) { @@ -985,7 +984,7 @@ esp_err_t i2s_new_channel(const i2s_chan_config_t *chan_cfg, i2s_chan_handle_t * /* Parameter validity check */ I2S_NULL_POINTER_CHECK(TAG, chan_cfg); I2S_NULL_POINTER_CHECK(TAG, tx_handle || rx_handle); - ESP_RETURN_ON_FALSE((chan_cfg->id >= 0 && chan_cfg->id < SOC_I2S_ATTR(INST_NUM)) || chan_cfg->id == I2S_NUM_AUTO, ESP_ERR_INVALID_ARG, TAG, "invalid I2S port id"); + ESP_RETURN_ON_FALSE((chan_cfg->id >= 0 && chan_cfg->id < I2S_LL_GET(INST_NUM)) || chan_cfg->id == I2S_NUM_AUTO, ESP_ERR_INVALID_ARG, TAG, "invalid I2S port id"); ESP_RETURN_ON_FALSE(chan_cfg->dma_desc_num >= 2, ESP_ERR_INVALID_ARG, TAG, "there should be at least 2 DMA buffers"); ESP_RETURN_ON_FALSE(chan_cfg->intr_priority >= 0 && chan_cfg->intr_priority <= 7, ESP_ERR_INVALID_ARG, TAG, "intr_priority should be within 0~7"); #if !SOC_HAS(PAU) @@ -1003,7 +1002,7 @@ esp_err_t i2s_new_channel(const i2s_chan_config_t *chan_cfg, i2s_chan_handle_t * /* Channel will be registered to one i2s port automatically if id is I2S_NUM_AUTO * Otherwise, the channel will be registered to the specific port. */ if (id == I2S_NUM_AUTO) { - for (int i = 0; i < SOC_I2S_ATTR(INST_NUM) && !channel_found; i++) { + for (int i = 0; i < I2S_LL_GET(INST_NUM) && !channel_found; i++) { i2s_obj = i2s_acquire_controller_obj(i); if (!i2s_obj) { continue; @@ -1062,7 +1061,7 @@ esp_err_t i2s_new_channel(const i2s_chan_config_t *chan_cfg, i2s_chan_handle_t * err: /* if the controller object has no channel, find the corresponding global object and destroy it */ if (i2s_obj != NULL && i2s_obj->rx_chan == NULL && i2s_obj->tx_chan == NULL) { - for (int i = 0; i < SOC_I2S_ATTR(INST_NUM); i++) { + for (int i = 0; i < I2S_LL_GET(INST_NUM); i++) { if (i2s_obj == g_i2s.controller[i]) { i2s_destroy_controller_obj(&g_i2s.controller[i]); break; @@ -1173,7 +1172,7 @@ esp_err_t i2s_channel_get_info(i2s_chan_handle_t handle, i2s_chan_info_t *chan_i I2S_NULL_POINTER_CHECK(TAG, chan_info); /* Find whether the handle is a registered i2s handle or still available */ - for (int i = 0; i < SOC_I2S_ATTR(INST_NUM); i++) { + for (int i = 0; i < I2S_LL_GET(INST_NUM); i++) { if (g_i2s.controller[i] != NULL) { if (g_i2s.controller[i]->tx_chan == handle || g_i2s.controller[i]->rx_chan == handle) { diff --git a/components/esp_driver_i2s/i2s_platform.c b/components/esp_driver_i2s/i2s_platform.c index 7baa7903ad..0bcf1117e7 100644 --- a/components/esp_driver_i2s/i2s_platform.c +++ b/components/esp_driver_i2s/i2s_platform.c @@ -16,8 +16,8 @@ static const char *TAG = "i2s_platform"; */ i2s_platform_t g_i2s = { .spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED, - .controller[0 ...(SOC_I2S_ATTR(INST_NUM) - 1)] = NULL, // groups will be lazy installed - .comp_name[0 ...(SOC_I2S_ATTR(INST_NUM) - 1)] = NULL, + .controller[0 ...(I2S_LL_GET(INST_NUM) - 1)] = NULL, // groups will be lazy installed + .comp_name[0 ...(I2S_LL_GET(INST_NUM) - 1)] = NULL, #if SOC_LP_I2S_SUPPORTED .lp_controller[0 ...(SOC_LP_I2S_NUM - 1)] = NULL, .lp_comp_name[0 ...(SOC_LP_I2S_NUM - 1)] = NULL, @@ -34,7 +34,7 @@ esp_err_t i2s_platform_acquire_occupation(i2s_ctlr_t type, int id, const char *c { esp_err_t ret = ESP_OK; const char *occupied_comp = NULL; - ESP_RETURN_ON_FALSE(id < SOC_I2S_ATTR(INST_NUM), ESP_ERR_INVALID_ARG, TAG, "invalid i2s port id"); + ESP_RETURN_ON_FALSE(id < I2S_LL_GET(INST_NUM), ESP_ERR_INVALID_ARG, TAG, "invalid i2s port id"); if (type == I2S_CTLR_HP) { portENTER_CRITICAL(&g_i2s.spinlock); @@ -79,7 +79,7 @@ esp_err_t i2s_platform_acquire_occupation(i2s_ctlr_t type, int id, const char *c esp_err_t i2s_platform_release_occupation(i2s_ctlr_t type, int id) { esp_err_t ret = ESP_OK; - ESP_RETURN_ON_FALSE(id < SOC_I2S_ATTR(INST_NUM), ESP_ERR_INVALID_ARG, TAG, "invalid i2s port id"); + ESP_RETURN_ON_FALSE(id < I2S_LL_GET(INST_NUM), ESP_ERR_INVALID_ARG, TAG, "invalid i2s port id"); if (type == I2S_CTLR_HP) { portENTER_CRITICAL(&g_i2s.spinlock); diff --git a/components/esp_driver_i2s/i2s_private.h b/components/esp_driver_i2s/i2s_private.h index d39f87ee55..6254c6f4f1 100644 --- a/components/esp_driver_i2s/i2s_private.h +++ b/components/esp_driver_i2s/i2s_private.h @@ -13,7 +13,7 @@ #include "freertos/queue.h" #include "soc/lldesc.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" +#include "hal/i2s_periph.h" #include "hal/i2s_hal.h" #include "hal/lp_i2s_hal.h" #if SOC_LP_I2S_SUPPORTED @@ -225,11 +225,11 @@ struct lp_i2s_channel_obj_t { */ typedef struct { portMUX_TYPE spinlock; /*!< Platform level lock */ - i2s_controller_t *controller[SOC_I2S_ATTR(INST_NUM)]; /*!< Controller object */ - const char *comp_name[SOC_I2S_ATTR(INST_NUM)]; /*!< The component name that occupied i2s controller */ + i2s_controller_t *controller[I2S_LL_GET(INST_NUM)]; /*!< Controller object */ + const char *comp_name[I2S_LL_GET(INST_NUM)]; /*!< The component name that occupied i2s controller */ #if SOC_LP_I2S_SUPPORTED lp_i2s_controller_t *lp_controller[SOC_LP_I2S_NUM]; /*!< LP controller object*/ - const char *lp_comp_name[SOC_I2S_ATTR(INST_NUM)]; /*!< The component name that occupied lp i2s controller */ + const char *lp_comp_name[I2S_LL_GET(INST_NUM)]; /*!< The component name that occupied lp i2s controller */ #endif } i2s_platform_t; diff --git a/components/esp_driver_i2s/lp_i2s.c b/components/esp_driver_i2s/lp_i2s.c index 9b1d6fc196..10d8365518 100644 --- a/components/esp_driver_i2s/lp_i2s.c +++ b/components/esp_driver_i2s/lp_i2s.c @@ -28,7 +28,7 @@ #include "esp_private/i2s_platform.h" #include "esp_private/lp_i2s_private.h" #include "i2s_private.h" -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #define LP_I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) diff --git a/components/esp_driver_i2s/test_apps/i2s/CMakeLists.txt b/components/esp_driver_i2s/test_apps/i2s/CMakeLists.txt index 436b6aabf2..01f7bf0737 100644 --- a/components/esp_driver_i2s/test_apps/i2s/CMakeLists.txt +++ b/components/esp_driver_i2s/test_apps/i2s/CMakeLists.txt @@ -9,9 +9,17 @@ project(i2s_test) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(I2S_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_i2s + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_i2s + ) + string(JOIN "," I2S_RTL_DIRS_JOINED ${I2S_RTL_DIRS}) add_custom_target(check_test_app_sections ALL COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_i2s/,${CMAKE_BINARY_DIR}/esp-idf/hal/ + --rtl-dirs ${I2S_RTL_DIRS_JOINED} --elf-file ${CMAKE_BINARY_DIR}/i2s_test.elf find-refs --from-sections=.iram0.text diff --git a/components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c b/components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c index 6e885a055b..070281eb10 100644 --- a/components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c +++ b/components/esp_driver_i2s/test_apps/i2s/main/test_i2s.c @@ -20,7 +20,7 @@ #include "unity.h" #include "math.h" #include "esp_rom_gpio.h" -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "driver/i2s_std.h" #if SOC_I2S_SUPPORTS_PDM #include "driver/i2s_pdm.h" @@ -55,7 +55,7 @@ static void i2s_test_io_config(int mode) gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT); switch (mode) { -#if SOC_I2S_ATTR(INST_NUM) > 1 +#if I2S_LL_GET(INST_NUM) > 1 case I2S_TEST_MODE_SLAVE_TO_MASTER: { esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, i2s_periph_signal[0].m_rx_bck_sig, 0, 0); esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, i2s_periph_signal[1].s_tx_bck_sig, 0); @@ -169,14 +169,14 @@ TEST_CASE("I2S_basic_channel_allocation_reconfig_deleting_test", "[i2s]") /* Exhaust test */ std_cfg.gpio_cfg.mclk = -1; - i2s_chan_handle_t tx_ex[SOC_I2S_ATTR(INST_NUM)] = {}; - for (int i = 0; i < SOC_I2S_ATTR(INST_NUM); i++) { + i2s_chan_handle_t tx_ex[I2S_LL_GET(INST_NUM)] = {}; + for (int i = 0; i < I2S_LL_GET(INST_NUM); i++) { TEST_ESP_OK(i2s_new_channel(&chan_cfg, &tx_ex[i], NULL)); TEST_ESP_OK(i2s_channel_init_std_mode(tx_ex[i], &std_cfg)); TEST_ESP_OK(i2s_channel_enable(tx_ex[i])); } TEST_ESP_ERR(ESP_ERR_NOT_FOUND, i2s_new_channel(&chan_cfg, &tx_handle, NULL)); - for (int i = 0; i < SOC_I2S_ATTR(INST_NUM); i++) { + for (int i = 0; i < I2S_LL_GET(INST_NUM); i++) { TEST_ESP_OK(i2s_channel_disable(tx_ex[i])); TEST_ESP_OK(i2s_del_channel(tx_ex[i])); } @@ -812,7 +812,7 @@ TEST_CASE("I2S_loopback_test", "[i2s]") TEST_ESP_OK(i2s_del_channel(rx_handle)); } -#if SOC_I2S_ATTR(INST_NUM) > 1 && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3 +#if I2S_LL_GET(INST_NUM) > 1 && !CONFIG_ESP32P4_SELECTS_REV_LESS_V3 TEST_CASE("I2S_master_write_slave_read_test", "[i2s]") { i2s_chan_handle_t tx_handle; diff --git a/components/esp_driver_i2s/test_apps/i2s/main/test_i2s_sleep.c b/components/esp_driver_i2s/test_apps/i2s/main/test_i2s_sleep.c index ac5792ce00..b59dae9fba 100644 --- a/components/esp_driver_i2s/test_apps/i2s/main/test_i2s_sleep.c +++ b/components/esp_driver_i2s/test_apps/i2s/main/test_i2s_sleep.c @@ -13,7 +13,7 @@ #include "driver/i2s_std.h" #include "driver/uart.h" #include "soc/i2s_struct.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "esp_sleep.h" #include "esp_private/sleep_cpu.h" #include "esp_private/esp_sleep_internal.h" diff --git a/components/esp_driver_parlio/CMakeLists.txt b/components/esp_driver_parlio/CMakeLists.txt index 819401f3df..5bdc3d0c7e 100644 --- a/components/esp_driver_parlio/CMakeLists.txt +++ b/components/esp_driver_parlio/CMakeLists.txt @@ -21,5 +21,6 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${public_include} PRIV_REQUIRES "${priv_requires}" + REQUIRES esp_hal_parlio LDFRAGMENTS "linker.lf" ) diff --git a/components/esp_driver_parlio/linker.lf b/components/esp_driver_parlio/linker.lf index b85e230db1..a5dbf62783 100644 --- a/components/esp_driver_parlio/linker.lf +++ b/components/esp_driver_parlio/linker.lf @@ -33,8 +33,8 @@ entries: esp_dma_utils: esp_dma_split_rx_buffer_to_cache_aligned (noflash) esp_dma_utils: esp_dma_merge_aligned_rx_buffers (noflash) -[mapping:parlio_driver_soc_periph] -archive: libsoc.a +[mapping:parlio_driver_hal_periph] +archive: libesp_hal_parlio.a entries: if PARLIO_RX_ISR_HANDLER_IN_IRAM = y: parlio_periph: parlio_periph_signals (noflash) diff --git a/components/esp_driver_parlio/src/parlio_common.c b/components/esp_driver_parlio/src/parlio_common.c index 7d147f79bd..c9261db1fc 100644 --- a/components/esp_driver_parlio/src/parlio_common.c +++ b/components/esp_driver_parlio/src/parlio_common.c @@ -11,8 +11,8 @@ typedef struct parlio_platform_t { _lock_t mutex; // platform level mutex lock - parlio_group_t *groups[SOC_PARLIO_GROUPS]; // array of parallel IO group instances - int group_ref_counts[SOC_PARLIO_GROUPS]; // reference count used to protect group install/uninstall + parlio_group_t *groups[PARLIO_LL_GET(INST_NUM)]; // array of parallel IO group instances + int group_ref_counts[PARLIO_LL_GET(INST_NUM)]; // reference count used to protect group install/uninstall } parlio_platform_t; static parlio_platform_t s_platform; // singleton platform @@ -110,12 +110,12 @@ esp_err_t parlio_register_unit_to_group(parlio_unit_base_handle_t unit) { parlio_group_t *group = NULL; int unit_id = -1; - for (int i = 0; i < SOC_PARLIO_GROUPS; i++) { + for (int i = 0; i < PARLIO_LL_GET(INST_NUM); i++) { group = parlio_acquire_group_handle(i); ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no memory for group (%d)", i); portENTER_CRITICAL(&group->spinlock); if (unit->dir == PARLIO_DIR_TX) { - for (int j = 0; j < SOC_PARLIO_TX_UNITS_PER_GROUP; j++) { + for (int j = 0; j < PARLIO_LL_GET(TX_UNITS_PER_INST); j++) { if (!group->tx_units[j]) { group->tx_units[j] = unit; unit_id = j; @@ -123,7 +123,7 @@ esp_err_t parlio_register_unit_to_group(parlio_unit_base_handle_t unit) } } } else { - for (int j = 0; j < SOC_PARLIO_RX_UNITS_PER_GROUP; j++) { + for (int j = 0; j < PARLIO_LL_GET(RX_UNITS_PER_INST); j++) { if (!group->rx_units[j]) { group->rx_units[j] = unit; unit_id = j; diff --git a/components/esp_driver_parlio/src/parlio_priv.h b/components/esp_driver_parlio/src/parlio_priv.h index 86561501b7..be2147f6bd 100644 --- a/components/esp_driver_parlio/src/parlio_priv.h +++ b/components/esp_driver_parlio/src/parlio_priv.h @@ -27,7 +27,7 @@ #include "freertos/queue.h" #include "freertos/idf_additions.h" #include "soc/soc_caps.h" -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" #include "hal/parlio_types.h" #include "hal/parlio_hal.h" #include "hal/parlio_ll.h" @@ -132,8 +132,8 @@ typedef struct parlio_group_t { portMUX_TYPE spinlock; // to protect per-group register level concurrent access parlio_hal_context_t hal; // hal layer context uint32_t dma_align; // DMA buffer alignment - parlio_unit_base_handle_t tx_units[SOC_PARLIO_TX_UNITS_PER_GROUP]; // tx unit handles - parlio_unit_base_handle_t rx_units[SOC_PARLIO_RX_UNITS_PER_GROUP]; // rx unit handles + parlio_unit_base_handle_t tx_units[PARLIO_LL_GET(TX_UNITS_PER_INST)]; // tx unit handles + parlio_unit_base_handle_t rx_units[PARLIO_LL_GET(RX_UNITS_PER_INST)]; // rx unit handles } parlio_group_t; /** diff --git a/components/esp_driver_parlio/src/parlio_rx.c b/components/esp_driver_parlio/src/parlio_rx.c index 818a14834a..cfbb1ced59 100644 --- a/components/esp_driver_parlio/src/parlio_rx.c +++ b/components/esp_driver_parlio/src/parlio_rx.c @@ -268,14 +268,14 @@ static esp_err_t parlio_rx_unit_set_gpio(parlio_rx_unit_handle_t rx_unit, const /* When the source clock comes from internal and supported to output the internal clock, * enable the gpio output direction and connect to the clock output signal */ if (config->clk_out_gpio_num >= 0) { -#if SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT +#if PARLIO_LL_SUPPORT(RX_CLK_OUTPUT) gpio_func_sel(config->clk_out_gpio_num, PIN_FUNC_GPIO); // connect the signal to the GPIO by matrix, it will also enable the output path properly esp_rom_gpio_connect_out_signal(config->clk_out_gpio_num, parlio_periph_signals.groups[group_id].rx_units[unit_id].clk_out_sig, false, false); #else ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "this target not support to output the clock"); -#endif // SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT +#endif // PARLIO_LL_SUPPORT(RX_CLK_OUTPUT) } /* Initialize the valid GPIO as input */ diff --git a/components/esp_driver_parlio/src/parlio_tx.c b/components/esp_driver_parlio/src/parlio_tx.c index d40eeb612f..202720b61c 100644 --- a/components/esp_driver_parlio/src/parlio_tx.c +++ b/components/esp_driver_parlio/src/parlio_tx.c @@ -520,14 +520,14 @@ static void parlio_tx_do_transaction(parlio_tx_unit_t *tx_unit, parlio_tx_trans_ } } else { // non-loop transmission -#if SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#if PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) // for DMA EOF supported target, we need to set the EOF condition to DMA EOF parlio_ll_tx_set_eof_condition(hal->regs, PARLIO_LL_TX_EOF_COND_DMA_EOF); #else // for DMA EOF not supported target, we need to set the bit length to the configured bit lens parlio_ll_tx_set_eof_condition(hal->regs, PARLIO_LL_TX_EOF_COND_DATA_LEN); parlio_ll_tx_set_trans_bit_len(hal->regs, t->payload_bits); -#endif // SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#endif // PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) } if (tx_unit->bs_handle) { @@ -641,9 +641,9 @@ esp_err_t parlio_tx_unit_transmit(parlio_tx_unit_handle_t tx_unit, const void *p ESP_RETURN_ON_FALSE(tx_unit && payload && payload_bits, ESP_ERR_INVALID_ARG, TAG, "invalid argument"); ESP_RETURN_ON_FALSE((payload_bits % tx_unit->data_width) == 0, ESP_ERR_INVALID_ARG, TAG, "payload bit length must align to bus width"); ESP_RETURN_ON_FALSE(payload_bits <= tx_unit->max_transfer_bits, ESP_ERR_INVALID_ARG, TAG, "payload bit length too large"); -#if !SOC_PARLIO_TRANS_BIT_ALIGN +#if !PARLIO_LL_SUPPORT(TRANS_BIT_ALIGN) ESP_RETURN_ON_FALSE((payload_bits % 8) == 0, ESP_ERR_INVALID_ARG, TAG, "payload bit length must be multiple of 8"); -#endif // !SOC_PARLIO_TRANS_BIT_ALIGN +#endif // !PARLIO_LL_SUPPORT(TRANS_BIT_ALIGN) #if SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION if (config->flags.loop_transmission) { @@ -654,13 +654,13 @@ esp_err_t parlio_tx_unit_transmit(parlio_tx_unit_handle_t tx_unit, const void *p ESP_RETURN_ON_FALSE(config->flags.loop_transmission == false, ESP_ERR_NOT_SUPPORTED, TAG, "loop transmission is not supported on this chip"); #endif -#if !SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#if !PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) // check the max payload size if it's not a loop transmission and the DMA EOF is not supported if (!config->flags.loop_transmission) { ESP_RETURN_ON_FALSE(tx_unit->max_transfer_bits <= PARLIO_LL_TX_MAX_BITS_PER_FRAME, ESP_ERR_INVALID_ARG, TAG, "invalid transfer size, max transfer size should be less than %d", PARLIO_LL_TX_MAX_BITS_PER_FRAME / 8); } -#endif // !SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#endif // !PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) size_t alignment = esp_ptr_external_ram(payload) ? tx_unit->ext_mem_align : tx_unit->int_mem_align; // check alignment diff --git a/components/esp_driver_parlio/test_apps/parlio/CMakeLists.txt b/components/esp_driver_parlio/test_apps/parlio/CMakeLists.txt index c9fdaca469..33fa055a5a 100644 --- a/components/esp_driver_parlio/test_apps/parlio/CMakeLists.txt +++ b/components/esp_driver_parlio/test_apps/parlio/CMakeLists.txt @@ -9,16 +9,25 @@ project(parlio_test) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) - add_custom_target(check_test_app_sections ALL - COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_parlio/,${CMAKE_BINARY_DIR}/esp-idf/hal/ - --elf-file ${CMAKE_BINARY_DIR}/parlio_test.elf - find-refs - --from-sections=.iram0.text - --to-sections=.flash.text,.flash.rodata - --exit-code - DEPENDS ${elf} - ) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(PARLIO_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_parlio + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_parlio + ) + string(JOIN "," PARLIO_RTL_DIRS_JOINED ${PARLIO_RTL_DIRS}) + add_custom_target( + check_test_app_sections ALL + COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py + --rtl-dirs ${PARLIO_RTL_DIRS_JOINED} + --elf-file ${CMAKE_BINARY_DIR}/parlio_test.elf + find-refs + --from-sections=.iram0.text + --to-sections=.flash.text,.flash.rodata + --exit-code + DEPENDS ${elf} + ) endif() message(STATUS "Checking parlio registers are not read-write by half-word") diff --git a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_bitscrambler.c b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_bitscrambler.c index da09362379..143f6d84b4 100644 --- a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_bitscrambler.c +++ b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_bitscrambler.c @@ -202,7 +202,7 @@ TEST_CASE("parlio_tx_bitscrambler_test", "[parlio_bitscrambler]") test_parlio_bitscrambler(); } -#if SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#if PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) static void test_parlio_bitscrambler_different_input_output_sizes(void) { parlio_tx_unit_handle_t tx_unit = NULL; @@ -353,4 +353,4 @@ TEST_CASE("parlio_tx_bitscrambler_different_input_output_sizes_test", "[parlio_b { test_parlio_bitscrambler_different_input_output_sizes(); } -#endif // SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#endif // PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) diff --git a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_rx.c b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_rx.c index e5604a0c07..91e3a18ae6 100644 --- a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_rx.c +++ b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_rx.c @@ -19,9 +19,9 @@ #include "hal/cache_hal.h" #include "hal/cache_ll.h" #include "soc/soc_caps.h" -#include "soc/i2s_periph.h" #include "soc/spi_periph.h" -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" +#include "hal/parlio_ll.h" #include "esp_attr.h" #include "test_board.h" #include "esp_private/parlio_rx_private.h" @@ -30,7 +30,7 @@ #define TEST_I2S_PORT I2S_NUM_0 #define TEST_VALID_SIG (PARLIO_RX_UNIT_MAX_DATA_WIDTH - 1) -#if SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT +#if PARLIO_LL_SUPPORT(RX_CLK_OUTPUT) #define TEST_OUTPUT_CLK_PIN TEST_CLK_GPIO #else #define TEST_OUTPUT_CLK_PIN -1 @@ -96,20 +96,6 @@ static bool test_parlio_rx_timeout_callback(parlio_rx_unit_handle_t rx_unit, con return false; } -static void connect_signal_internally(uint32_t gpio, uint32_t sigo, uint32_t sigi) -{ - gpio_config_t gpio_conf = { - .pin_bit_mask = BIT64(gpio), - .mode = GPIO_MODE_INPUT_OUTPUT, - .intr_type = GPIO_INTR_DISABLE, - .pull_down_en = GPIO_PULLDOWN_DISABLE, - .pull_up_en = GPIO_PULLUP_DISABLE, - }; - gpio_config(&gpio_conf); - esp_rom_gpio_connect_out_signal(gpio, sigo, false, false); - esp_rom_gpio_connect_in_signal(gpio, sigi, false); -} - #define TEST_EOF_DATA_LEN 64 static void pulse_delimiter_sender_task_i2s(void *args) @@ -155,17 +141,6 @@ static void pulse_delimiter_sender_task_i2s(void *args) // Transmission will start after enable the tx channel TEST_ESP_OK(i2s_channel_enable(tx_chan)); - // Connect GPIO signals - connect_signal_internally(TEST_CLK_GPIO, - i2s_periph_signal[TEST_I2S_PORT].m_tx_bck_sig, - parlio_periph_signals.groups[0].rx_units[0].clk_in_sig); - connect_signal_internally(TEST_VALID_GPIO, - i2s_periph_signal[TEST_I2S_PORT].m_tx_ws_sig, - parlio_periph_signals.groups[0].rx_units[0].data_sigs[TEST_VALID_SIG]); - connect_signal_internally(TEST_DATA0_GPIO, - i2s_periph_signal[TEST_I2S_PORT].data_out_sig, - parlio_periph_signals.groups[0].rx_units[0].data_sigs[0]); - while (!((*task_flags) & TEST_TASK_FINISHED_BIT)) { vTaskDelay(pdMS_TO_TICKS(1)); *task_flags |= TEST_TASK_DATA_READY_BIT; @@ -193,6 +168,20 @@ static void cs_low(spi_transaction_t *trans) #define TEST_SPI_CLK_FREQ 100000 +static void connect_signal_internally(uint32_t gpio, uint32_t sigo, uint32_t sigi) +{ + gpio_config_t gpio_conf = { + .pin_bit_mask = BIT64(gpio), + .mode = GPIO_MODE_INPUT_OUTPUT, + .intr_type = GPIO_INTR_DISABLE, + .pull_down_en = GPIO_PULLDOWN_DISABLE, + .pull_up_en = GPIO_PULLUP_DISABLE, + }; + gpio_config(&gpio_conf); + esp_rom_gpio_connect_out_signal(gpio, sigo, false, false); + esp_rom_gpio_connect_in_signal(gpio, sigi, false); +} + static void level_delimiter_sender_task_spi(void *args) { uint32_t *task_flags = (uint32_t *)args; @@ -411,11 +400,11 @@ TEST_CASE("parallel_rx_unit_pulse_delimiter_test_via_i2s", "[parlio_rx]") TEST_CASE("parallel_rx_unit_install_uninstall", "[parlio_rx]") { printf("install rx units exhaustively\r\n"); - parlio_rx_unit_handle_t units[SOC_PARLIO_GROUPS * SOC_PARLIO_RX_UNITS_PER_GROUP]; + parlio_rx_unit_handle_t units[PARLIO_LL_GET(INST_NUM) * PARLIO_LL_GET(RX_UNITS_PER_INST)]; int k = 0; parlio_rx_unit_config_t config = TEST_DEFAULT_UNIT_CONFIG(PARLIO_CLK_SRC_DEFAULT, 1000000); - for (int i = 0; i < SOC_PARLIO_GROUPS; i++) { - for (int j = 0; j < SOC_PARLIO_RX_UNITS_PER_GROUP; j++) { + for (int i = 0; i < PARLIO_LL_GET(INST_NUM); i++) { + for (int j = 0; j < PARLIO_LL_GET(RX_UNITS_PER_INST); j++) { TEST_ESP_OK(parlio_new_rx_unit(&config, &units[k++])); } } @@ -433,7 +422,7 @@ TEST_CASE("parallel_rx_unit_install_uninstall", "[parlio_rx]") // clock from internal config.clk_src = PARLIO_CLK_SRC_DEFAULT; config.clk_out_gpio_num = TEST_CLK_GPIO; -#if SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT +#if PARLIO_LL_SUPPORT(RX_CLK_OUTPUT) TEST_ESP_OK(parlio_new_rx_unit(&config, &units[0])); TEST_ESP_OK(parlio_del_rx_unit(units[0])); #else diff --git a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c index 4d161f4195..3936818d11 100644 --- a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c +++ b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c @@ -19,7 +19,7 @@ TEST_CASE("parallel_tx_unit_install_uninstall", "[parlio_tx]") { printf("install tx units exhaustively\r\n"); - parlio_tx_unit_handle_t units[SOC_PARLIO_GROUPS * SOC_PARLIO_TX_UNITS_PER_GROUP]; + parlio_tx_unit_handle_t units[PARLIO_LL_GET(INST_NUM) * PARLIO_LL_GET(TX_UNITS_PER_INST)]; int k = 0; parlio_tx_unit_config_t config = { .clk_src = PARLIO_CLK_SRC_DEFAULT, @@ -31,8 +31,8 @@ TEST_CASE("parallel_tx_unit_install_uninstall", "[parlio_tx]") .max_transfer_size = 64, .valid_gpio_num = -1, }; - for (int i = 0; i < SOC_PARLIO_GROUPS; i++) { - for (int j = 0; j < SOC_PARLIO_TX_UNITS_PER_GROUP; j++) { + for (int i = 0; i < PARLIO_LL_GET(INST_NUM); i++) { + for (int j = 0; j < PARLIO_LL_GET(TX_UNITS_PER_INST); j++) { TEST_ESP_OK(parlio_new_tx_unit(&config, &units[k++])); } } @@ -649,7 +649,7 @@ TEST_CASE("parlio_tx_loop_transmission", "[parlio_tx]") } #endif // SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION -#if SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#if PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) TEST_CASE("parlio_tx can transmit buffer larger than max_size decided by datalen_eof", "[parlio_tx]") { printf("install parlio tx unit\r\n"); @@ -695,4 +695,4 @@ TEST_CASE("parlio_tx can transmit buffer larger than max_size decided by datalen TEST_ESP_OK(parlio_del_tx_unit(tx_unit)); free(buffer); } -#endif // SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA +#endif // PARLIO_LL_SUPPORT(TX_EOF_FROM_DMA) diff --git a/components/esp_driver_touch_sens/CMakeLists.txt b/components/esp_driver_touch_sens/CMakeLists.txt index 7f77013a5e..502baa5af0 100644 --- a/components/esp_driver_touch_sens/CMakeLists.txt +++ b/components/esp_driver_touch_sens/CMakeLists.txt @@ -22,5 +22,6 @@ endif() idf_component_register(SRCS ${srcs} PRIV_REQUIRES ${priv_require} + REQUIRES esp_hal_touch_sens # public require because hal/touch_sens_type.h needs to be public INCLUDE_DIRS ${public_inc} ) diff --git a/components/esp_driver_touch_sens/common/touch_sens_common.c b/components/esp_driver_touch_sens/common/touch_sens_common.c index 39c12615c4..801a038570 100644 --- a/components/esp_driver_touch_sens/common/touch_sens_common.c +++ b/components/esp_driver_touch_sens/common/touch_sens_common.c @@ -11,7 +11,7 @@ #include "soc/soc_caps.h" #include "soc/rtc.h" #include "soc/clk_tree_defs.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "esp_private/gpio.h" #include "driver/touch_sens.h" #include "esp_private/esp_gpio_reserve.h" diff --git a/components/esp_driver_touch_sens/common/touch_sens_private.h b/components/esp_driver_touch_sens/common/touch_sens_private.h index 2750631667..85cce29ff5 100644 --- a/components/esp_driver_touch_sens/common/touch_sens_private.h +++ b/components/esp_driver_touch_sens/common/touch_sens_private.h @@ -84,7 +84,7 @@ extern portMUX_TYPE g_touch_spinlock; * */ struct touch_sensor_s { - touch_channel_handle_t ch[SOC_MODULE_ATTR(TOUCH, CHAN_NUM)]; /*!< Touch sensor channel handles, will be NULL if the channel is not registered */ + touch_channel_handle_t ch[TOUCH_LL_GET(CHAN_NUM)]; /*!< Touch sensor channel handles, will be NULL if the channel is not registered */ uint32_t chan_mask; /*!< Enabled channel mask, corresponding bit will be set if the channel is registered */ uint32_t src_freq_hz; /*!< Source clock frequency */ uint32_t interval_freq_hz; /*!< Frequency of the interval clock */ diff --git a/components/esp_driver_touch_sens/hw_ver1/touch_version_specific.c b/components/esp_driver_touch_sens/hw_ver1/touch_version_specific.c index e85f638ba1..93b1ae8e98 100644 --- a/components/esp_driver_touch_sens/hw_ver1/touch_version_specific.c +++ b/components/esp_driver_touch_sens/hw_ver1/touch_version_specific.c @@ -15,7 +15,7 @@ #include "freertos/semphr.h" #include "soc/soc_caps.h" #include "soc/clk_tree_defs.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/rtc.h" #include "hal/hal_utils.h" #include "driver/touch_sens.h" diff --git a/components/esp_driver_touch_sens/hw_ver2/touch_version_specific.c b/components/esp_driver_touch_sens/hw_ver2/touch_version_specific.c index 808dc8b6c8..017434b738 100644 --- a/components/esp_driver_touch_sens/hw_ver2/touch_version_specific.c +++ b/components/esp_driver_touch_sens/hw_ver2/touch_version_specific.c @@ -15,7 +15,7 @@ #include "freertos/semphr.h" #include "soc/soc_caps.h" #include "soc/clk_tree_defs.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/rtc.h" #include "hal/hal_utils.h" #include "driver/touch_sens.h" @@ -68,7 +68,7 @@ void IRAM_ATTR touch_priv_default_intr_handler(void *arg) return; } /* It actually won't be out of range in the real environment, but limit the range to pass the coverity check */ - uint32_t curr_chan_offset = (curr_chan >= SOC_MODULE_ATTR(TOUCH, CHAN_NUM) ? SOC_MODULE_ATTR(TOUCH, CHAN_NUM) - 1 : curr_chan) - TOUCH_MIN_CHAN_ID; + uint32_t curr_chan_offset = (curr_chan >= TOUCH_LL_GET(CHAN_NUM) ? TOUCH_LL_GET(CHAN_NUM) - 1 : curr_chan) - TOUCH_MIN_CHAN_ID; data.chan = g_touch->ch[curr_chan_offset]; /* If the channel is not registered, return directly */ if (!data.chan) { diff --git a/components/esp_driver_touch_sens/hw_ver3/touch_version_specific.c b/components/esp_driver_touch_sens/hw_ver3/touch_version_specific.c index ce4c5f1cc4..bb5f4c1034 100644 --- a/components/esp_driver_touch_sens/hw_ver3/touch_version_specific.c +++ b/components/esp_driver_touch_sens/hw_ver3/touch_version_specific.c @@ -15,7 +15,7 @@ #include "freertos/semphr.h" #include "soc/soc_caps.h" #include "soc/clk_tree_defs.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/rtc.h" #include "soc/chip_revision.h" #include "hal/efuse_hal.h" @@ -63,7 +63,7 @@ void IRAM_ATTR touch_priv_default_intr_handler(void *arg) touch_base_event_data_t data; touch_ll_get_active_channel_mask(&data.status_mask); int ch_offset = touch_ll_get_current_meas_channel() - TOUCH_MIN_CHAN_ID; - if (ch_offset < 0 || ch_offset >= (int)SOC_MODULE_ATTR(TOUCH, CHAN_NUM)) { + if (ch_offset < 0 || ch_offset >= (int)TOUCH_LL_GET(CHAN_NUM)) { /* Not a valid channel */ return; } diff --git a/components/esp_driver_touch_sens/test_apps/touch_sens/CMakeLists.txt b/components/esp_driver_touch_sens/test_apps/touch_sens/CMakeLists.txt index 28ce111a06..88091ad89e 100644 --- a/components/esp_driver_touch_sens/test_apps/touch_sens/CMakeLists.txt +++ b/components/esp_driver_touch_sens/test_apps/touch_sens/CMakeLists.txt @@ -10,9 +10,17 @@ project(touch_sens) idf_build_get_property(elf EXECUTABLE) if(CONFIG_COMPILER_DUMP_RTL_FILES) + # Collect RTL directories in a variable for readability. Join them + # with commas so they are passed as a single --rtl-dirs argument to the script. + set(TOUCH_SENS_RTL_DIRS + ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_touch_sens + ${CMAKE_BINARY_DIR}/esp-idf/hal + ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_touch_sens + ) + string(JOIN "," TOUCH_SENS_RTL_DIRS_JOINED ${TOUCH_SENS_RTL_DIRS}) add_custom_target(check_test_app_sections ALL COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py - --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_touch_sens/,${CMAKE_BINARY_DIR}/esp-idf/hal/ + --rtl-dirs ${TOUCH_SENS_RTL_DIRS_JOINED} --elf-file ${CMAKE_BINARY_DIR}/touch_sens.elf find-refs --from-sections=.iram0.text diff --git a/components/esp_hal_ana_cmpr/CMakeLists.txt b/components/esp_hal_ana_cmpr/CMakeLists.txt new file mode 100644 index 0000000000..637c237c33 --- /dev/null +++ b/components/esp_hal_ana_cmpr/CMakeLists.txt @@ -0,0 +1,21 @@ +idf_build_get_property(target IDF_TARGET) + +if(${target} STREQUAL "linux") + return() # This component is not supported by the POSIX/Linux simulator +endif() + +set(srcs) +set(includes "include") +if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include") + list(APPEND includes "${target}/include") +endif() + +# Analog comparator related source files +if(CONFIG_SOC_ANA_CMPR_SUPPORTED) + list(APPEND srcs "${target}/ana_cmpr_periph.c") +endif() + + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes} + REQUIRES soc hal) diff --git a/components/esp_hal_ana_cmpr/README.md b/components/esp_hal_ana_cmpr/README.md new file mode 100644 index 0000000000..b6fd675a61 --- /dev/null +++ b/components/esp_hal_ana_cmpr/README.md @@ -0,0 +1,72 @@ +# ESP Hardware Abstraction Layer for Analog Comparator Peripheral + +> [!NOTE] +> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems. + +## Overview + +The `esp_hal_ana_cmpr` component provides a **Hardware Abstraction Layer** for Analog Comparator peripherals across supported ESP-IDF targets. Analog comparators compare two analog voltage signals and generate digital outputs based on the comparison result, enabling threshold detection, zero-crossing detection, and analog signal monitoring applications. + +## Architecture + +The Analog Comparator HAL is structured in two main sub-layers: + +1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control analog comparator peripherals (e.g., initialization, reference voltage configuration, cross detection setup, interrupt handling). + +2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations. + +## Supported Controllers + +This HAL supports analog comparator controllers on the following ESP chips: + +- **ESP32-P4**: Dual analog comparator units (ANA_CMPR_U0, ANA_CMPR_U1) +- **Others**: Single analog comparator unit + +## Features + +### Reference Voltage Configuration + +- **Internal Reference Voltage**: Configurable internal reference voltage from 0% to 70% VDD in 10% steps (0.0V, 0.1VDD, 0.2VDD, ..., 0.7VDD) +- **External Reference Voltage**: Support for external reference voltage via dedicated GPIO pad (typically GPIO10) +- **Reference Source Selection**: Switch between internal and external reference sources + +### Cross Detection + +- **Positive Cross Detection**: Detects when the input analog signal crosses the reference voltage from low to high +- **Negative Cross Detection**: Detects when the input analog signal crosses the reference voltage from high to low +- **Any Cross Detection**: Detects both positive and negative crossings +- **Debounce Filtering**: Configurable debounce cycle to ensure stable cross detection and filter out noise + +### Interrupt Handling + +- **Multiple Interrupt Types**: Support for positive cross, negative cross, and any cross interrupts +- **Interrupt Masking**: Flexible interrupt enable/disable control per interrupt type +- **Interrupt Status**: Read interrupt status and clear interrupt flags +- **Interrupt Register Access**: Direct access to interrupt status register for advanced use cases + +### Signal Processing + +- **Debounce Cycle**: Configurable debounce cycle count to filter out glitches and ensure stable detection +- **Hardware Filtering**: Built-in hardware filtering for noise reduction + +### Event Task Matrix (ETM) Support + +- **ETM Event Source**: Analog comparator cross events can be used as ETM event sources for precise timing and synchronization +- **Multiple Event Types**: Support for positive and negative cross events as separate ETM sources + +### Peripheral Configuration + +- **GPIO Mapping**: Each comparator unit has dedicated source GPIO and external reference GPIO pins +- **Module Identification**: Each comparator unit has a unique module name for identification +- **Interrupt Source**: Each comparator unit has a dedicated interrupt source + +## Usage + +The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_driver_ana_cmpr`. + +Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed. + +## Dependencies + +- `soc`: Provides chip-specific register definitions +- `hal`: Core hardware abstraction utilities and macros diff --git a/components/soc/esp32c5/ana_cmpr_periph.c b/components/esp_hal_ana_cmpr/esp32c5/ana_cmpr_periph.c similarity index 95% rename from components/soc/esp32c5/ana_cmpr_periph.c rename to components/esp_hal_ana_cmpr/esp32c5/ana_cmpr_periph.c index 0da52a79f6..74aaf40158 100644 --- a/components/soc/esp32c5/ana_cmpr_periph.c +++ b/components/esp_hal_ana_cmpr/esp32c5/ana_cmpr_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/ana_cmpr_periph.h" +#include "hal/ana_cmpr_periph.h" #include "soc/ana_cmpr_struct.h" const ana_cmpr_periph_t ana_cmpr_periph[SOC_ANA_CMPR_NUM] = { diff --git a/components/hal/esp32c5/include/hal/ana_cmpr_ll.h b/components/esp_hal_ana_cmpr/esp32c5/include/hal/ana_cmpr_ll.h similarity index 99% rename from components/hal/esp32c5/include/hal/ana_cmpr_ll.h rename to components/esp_hal_ana_cmpr/esp32c5/include/hal/ana_cmpr_ll.h index d114e393ce..946ad41041 100644 --- a/components/hal/esp32c5/include/hal/ana_cmpr_ll.h +++ b/components/esp_hal_ana_cmpr/esp32c5/include/hal/ana_cmpr_ll.h @@ -28,7 +28,6 @@ extern "C" { #define ANALOG_CMPR_LL_ETM_SOURCE(unit, type) (GPIO_EVT_ZERO_DET_POS0 + (unit) * 2 + (type)) - /** * @brief Enable analog comparator * diff --git a/components/soc/esp32c61/ana_cmpr_periph.c b/components/esp_hal_ana_cmpr/esp32c61/ana_cmpr_periph.c similarity index 95% rename from components/soc/esp32c61/ana_cmpr_periph.c rename to components/esp_hal_ana_cmpr/esp32c61/ana_cmpr_periph.c index 166f77e8c3..f71d8ae4e5 100644 --- a/components/soc/esp32c61/ana_cmpr_periph.c +++ b/components/esp_hal_ana_cmpr/esp32c61/ana_cmpr_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/ana_cmpr_periph.h" +#include "hal/ana_cmpr_periph.h" #include "soc/ana_cmpr_struct.h" const ana_cmpr_periph_t ana_cmpr_periph[SOC_ANA_CMPR_NUM] = { diff --git a/components/hal/esp32c61/include/hal/ana_cmpr_ll.h b/components/esp_hal_ana_cmpr/esp32c61/include/hal/ana_cmpr_ll.h similarity index 99% rename from components/hal/esp32c61/include/hal/ana_cmpr_ll.h rename to components/esp_hal_ana_cmpr/esp32c61/include/hal/ana_cmpr_ll.h index d114e393ce..946ad41041 100644 --- a/components/hal/esp32c61/include/hal/ana_cmpr_ll.h +++ b/components/esp_hal_ana_cmpr/esp32c61/include/hal/ana_cmpr_ll.h @@ -28,7 +28,6 @@ extern "C" { #define ANALOG_CMPR_LL_ETM_SOURCE(unit, type) (GPIO_EVT_ZERO_DET_POS0 + (unit) * 2 + (type)) - /** * @brief Enable analog comparator * diff --git a/components/soc/esp32h2/ana_cmpr_periph.c b/components/esp_hal_ana_cmpr/esp32h2/ana_cmpr_periph.c similarity index 95% rename from components/soc/esp32h2/ana_cmpr_periph.c rename to components/esp_hal_ana_cmpr/esp32h2/ana_cmpr_periph.c index 27afd9103d..5d568ee3f0 100644 --- a/components/soc/esp32h2/ana_cmpr_periph.c +++ b/components/esp_hal_ana_cmpr/esp32h2/ana_cmpr_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/ana_cmpr_periph.h" +#include "hal/ana_cmpr_periph.h" #include "soc/ana_cmpr_struct.h" const ana_cmpr_periph_t ana_cmpr_periph[SOC_ANA_CMPR_NUM] = { diff --git a/components/hal/esp32h2/include/hal/ana_cmpr_ll.h b/components/esp_hal_ana_cmpr/esp32h2/include/hal/ana_cmpr_ll.h similarity index 100% rename from components/hal/esp32h2/include/hal/ana_cmpr_ll.h rename to components/esp_hal_ana_cmpr/esp32h2/include/hal/ana_cmpr_ll.h diff --git a/components/hal/esp32h21/include/hal/ana_cmpr_ll.h b/components/esp_hal_ana_cmpr/esp32h21/include/hal/ana_cmpr_ll.h similarity index 100% rename from components/hal/esp32h21/include/hal/ana_cmpr_ll.h rename to components/esp_hal_ana_cmpr/esp32h21/include/hal/ana_cmpr_ll.h diff --git a/components/soc/esp32p4/ana_cmpr_periph.c b/components/esp_hal_ana_cmpr/esp32p4/ana_cmpr_periph.c similarity index 97% rename from components/soc/esp32p4/ana_cmpr_periph.c rename to components/esp_hal_ana_cmpr/esp32p4/ana_cmpr_periph.c index 1d6fd07b70..976bca4933 100644 --- a/components/soc/esp32p4/ana_cmpr_periph.c +++ b/components/esp_hal_ana_cmpr/esp32p4/ana_cmpr_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/ana_cmpr_periph.h" +#include "hal/ana_cmpr_periph.h" #include "soc/ana_cmpr_struct.h" const ana_cmpr_periph_t ana_cmpr_periph[SOC_ANA_CMPR_NUM] = { diff --git a/components/hal/esp32p4/include/hal/ana_cmpr_ll.h b/components/esp_hal_ana_cmpr/esp32p4/include/hal/ana_cmpr_ll.h similarity index 99% rename from components/hal/esp32p4/include/hal/ana_cmpr_ll.h rename to components/esp_hal_ana_cmpr/esp32p4/include/hal/ana_cmpr_ll.h index 0a0962d2cd..922a802f50 100644 --- a/components/hal/esp32p4/include/hal/ana_cmpr_ll.h +++ b/components/esp_hal_ana_cmpr/esp32p4/include/hal/ana_cmpr_ll.h @@ -28,7 +28,6 @@ extern "C" { #define ANALOG_CMPR_LL_ETM_SOURCE(unit, type) (GPIO_EVT_ZERO_DET_POS0 + (unit) * 2 + (type)) - /** * @brief Enable analog comparator * diff --git a/components/soc/include/soc/ana_cmpr_periph.h b/components/esp_hal_ana_cmpr/include/hal/ana_cmpr_periph.h similarity index 100% rename from components/soc/include/soc/ana_cmpr_periph.h rename to components/esp_hal_ana_cmpr/include/hal/ana_cmpr_periph.h diff --git a/components/hal/include/hal/ana_cmpr_types.h b/components/esp_hal_ana_cmpr/include/hal/ana_cmpr_types.h similarity index 100% rename from components/hal/include/hal/ana_cmpr_types.h rename to components/esp_hal_ana_cmpr/include/hal/ana_cmpr_types.h diff --git a/components/esp_hal_ana_conv/CMakeLists.txt b/components/esp_hal_ana_conv/CMakeLists.txt new file mode 100644 index 0000000000..e5886231de --- /dev/null +++ b/components/esp_hal_ana_conv/CMakeLists.txt @@ -0,0 +1,31 @@ +idf_build_get_property(target IDF_TARGET) + +if(${target} STREQUAL "linux") + return() # This component is not supported by the POSIX/Linux simulator +endif() + +set(requires soc hal) +if(${target} STREQUAL "esp32") + list(APPEND requires esp_hal_i2s) +endif() + +set(srcs) +set(includes "include") +if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include") + list(APPEND includes "${target}/include") +endif() + +if(CONFIG_SOC_ADC_SUPPORTED) + list(APPEND srcs "${target}/adc_periph.c" "adc_hal_common.c" "adc_oneshot_hal.c") + if(CONFIG_SOC_ADC_DMA_SUPPORTED) + list(APPEND srcs "adc_hal.c") + endif() +endif() + +if(CONFIG_SOC_DAC_SUPPORTED) + list(APPEND srcs "${target}/dac_periph.c") +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes} + REQUIRES ${requires}) diff --git a/components/esp_hal_ana_conv/README.md b/components/esp_hal_ana_conv/README.md new file mode 100644 index 0000000000..bf4671a307 --- /dev/null +++ b/components/esp_hal_ana_conv/README.md @@ -0,0 +1,101 @@ +# ESP Hardware Abstraction Layer for Analog Conversion Peripherals + +> [!NOTE] +> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems. + +## Overview + +The `esp_hal_ana_conv` component provides a **Hardware Abstraction Layer** for analog conversion related peripherals across all ESP-IDF supported targets. This HAL currently supports Analog-to-Digital Converter (ADC), Digital-to-Analog Converter (DAC) and other analog conversion related peripherals. The HAL enables analog signal acquisition, generation, and monitoring capabilities. + +## Architecture + +The analog conversion HAL is structured in two main sub-layers: + +1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control analog conversion peripherals (e.g., initialization, channel configuration, conversion control, DMA setup, sensor reading). + +2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations. + +## Supported Controllers + +### ADC Controllers + +This HAL supports various ADC controller types depending on the ESP chip: + +- **RTC Controller**: Single conversion mode for low-power applications, supports deep sleep operation +- **ULP Controller**: Ultra-low-power controller for ULP coprocessor control +- **Digital Controller (DIG)**: Continuous conversion mode with DMA support, high-performance multi-channel scanning +- **Arbiter Controller (ARB)**: Manages multiple controller access to ADC2 (ESP32-S2, ESP32-S3) +- **PWDET Controller**: Power detection controller for Wi-Fi power monitoring (ADC2 only) + +### DAC Controllers + +This HAL supports various DAC controller types depending on the ESP chip: + +- **RTC Controller**: Direct voltage output control +- **DMA Controller**: High-speed data output via I2S or SPI DMA + +## ADC Features + +### Work Modes + +- **Oneshot Mode**: Single conversion per trigger, suitable for polling-based applications +- **Continuous Mode**: Continuous conversion with DMA, supports high-speed multi-channel scanning +- **Low-Power Mode**: Ultra-low-power operation for battery-powered applications +- **PWDET Mode**: Power detection mode for Wi-Fi power monitoring + +### Conversion Capabilities + +- **Multi-Unit Support**: Support for ADC1 and ADC2 (where available) +- **Conversion Modes**: + - Single unit mode (ADC1 or ADC2 only) + - Both units mode (ADC1 and ADC2 simultaneously) + - Alternate unit mode (ADC1 and ADC2 alternately) +- **Resolution Options**: 9-bit, 10-bit, 11-bit, 12-bit, 13-bit (chip-dependent) +- **Attenuation Options**: 0dB, 2.5dB, 6dB, 12dB for different input voltage ranges +- **Pattern Table**: Configurable scan sequence with up to 16 patterns per unit + +### Signal Processing + +- **IIR Filtering**: Digital IIR filters for noise reduction at high sampling rates +- **Monitor Function**: Hardware threshold monitoring with interrupt support +- **Data Inversion**: Optional data inversion for compatibility +- **Calibration**: Hardware and software calibration support for improved accuracy + +### Clock and Timing + +- **Flexible Clock Sources**: APB clock, APLL, XTAL, RC_FAST (chip-dependent) +- **Configurable Sampling Rate**: Adjustable via clock division and trigger interval +- **FSM Timing Control**: Configurable wait times for reset, start, and standby phases + +## DAC Features + +### Output Capabilities + +- **Dual Channel Support**: Two independent DAC channels (DAC_CHAN_0, DAC_CHAN_1) +- **8-bit Resolution**: 256-level voltage output (0V to VDD3P3_RTC) +- **Direct Voltage Output**: Direct control of output voltage value + +### Cosine Wave Generator + +- **Frequency Control**: Configurable frequency from 130Hz to several MHz +- **Amplitude Control**: Adjustable attenuation (0dB, 6dB, 12dB, 18dB) +- **Phase Control**: 0° or 180° phase shift support +- **DC Offset**: Configurable DC component for signal offset + +### Advanced Features + +- **DMA Output**: High-speed data streaming via I2S, SPI or GDMA +- **ADC-DAC Synchronization**: Synchronized operation with ADC RTC controller +- **Power Management**: Independent power control per channel + +## Usage + +The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_adc` and `esp_driver_dac`. + +Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed. + +## Dependencies + +- `soc`: Provides chip-specific register definitions +- `hal`: Core hardware abstraction utilities and macros + diff --git a/components/hal/adc_hal.c b/components/esp_hal_ana_conv/adc_hal.c similarity index 99% rename from components/hal/adc_hal.c rename to components/esp_hal_ana_conv/adc_hal.c index f5e374e9fe..717eceb088 100644 --- a/components/hal/adc_hal.c +++ b/components/esp_hal_ana_conv/adc_hal.c @@ -8,7 +8,7 @@ #include "hal/adc_hal.h" #include "hal/assert.h" #include "soc/lldesc.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #if SOC_IS(ESP32) //ADC utilises I2S0 DMA on ESP32 @@ -188,7 +188,6 @@ void adc_hal_digi_controller_config(adc_hal_dma_ctx_t *hal, const adc_hal_digi_c adc_hal_digi_sample_freq_config(hal, cfg->clk_src, cfg->clk_src_freq_hz, cfg->sample_freq_hz); } - void adc_hal_digi_dma_link(adc_hal_dma_ctx_t *hal, uint8_t *data_buf) { dma_descriptor_t *desc = hal->rx_desc; diff --git a/components/hal/adc_hal_common.c b/components/esp_hal_ana_conv/adc_hal_common.c similarity index 84% rename from components/hal/adc_hal_common.c rename to components/esp_hal_ana_conv/adc_hal_common.c index 8015440c19..146f19e23c 100644 --- a/components/hal/adc_hal_common.c +++ b/components/esp_hal_ana_conv/adc_hal_common.c @@ -18,43 +18,43 @@ static adc_ll_controller_t get_controller(adc_unit_t unit, adc_hal_work_mode_t w if (unit == ADC_UNIT_1) { switch (work_mode) { #if SOC_ULP_HAS_ADC || SOC_LP_CORE_SUPPORT_LP_ADC - case ADC_HAL_LP_MODE: - return ADC_LL_CTRL_ULP; + case ADC_HAL_LP_MODE: + return ADC_LL_CTRL_ULP; #endif - case ADC_HAL_SINGLE_READ_MODE: + case ADC_HAL_SINGLE_READ_MODE: #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED - return ADC_LL_CTRL_DIG; + return ADC_LL_CTRL_DIG; #elif SOC_ADC_RTC_CTRL_SUPPORTED - return ADC_LL_CTRL_RTC; + return ADC_LL_CTRL_RTC; #endif - case ADC_HAL_CONTINUOUS_READ_MODE: - return ADC_LL_CTRL_DIG; - default: - abort(); + case ADC_HAL_CONTINUOUS_READ_MODE: + return ADC_LL_CTRL_DIG; + default: + abort(); } } else { switch (work_mode) { #if SOC_ULP_HAS_ADC || SOC_LP_CORE_SUPPORT_LP_ADC - case ADC_HAL_LP_MODE: - return ADC_LL_CTRL_ULP; + case ADC_HAL_LP_MODE: + return ADC_LL_CTRL_ULP; #endif #if !SOC_ADC_ARBITER_SUPPORTED //No ADC2 arbiter on ESP32 #if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED - default: - return ADC_LL_CTRL_DIG; + default: + return ADC_LL_CTRL_DIG; #else - case ADC_HAL_SINGLE_READ_MODE: - return ADC_LL_CTRL_RTC; - case ADC_HAL_CONTINUOUS_READ_MODE: - return ADC_LL_CTRL_DIG; - case ADC_HAL_PWDET_MODE: - return ADC_LL_CTRL_PWDET; - default: - abort(); + case ADC_HAL_SINGLE_READ_MODE: + return ADC_LL_CTRL_RTC; + case ADC_HAL_CONTINUOUS_READ_MODE: + return ADC_LL_CTRL_DIG; + case ADC_HAL_PWDET_MODE: + return ADC_LL_CTRL_PWDET; + default: + abort(); #endif //#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED #else - default: - return ADC_LL_CTRL_ARB; + default: + return ADC_LL_CTRL_ARB; #endif } } @@ -66,7 +66,6 @@ void adc_hal_set_controller(adc_unit_t unit, adc_hal_work_mode_t work_mode) adc_ll_set_controller(unit, ctrlr); } - /*--------------------------------------------------------------- Arbiter ---------------------------------------------------------------*/ @@ -78,7 +77,6 @@ void adc_hal_arbiter_config(adc_arbiter_t *config) } #endif // #if SOC_ADC_ARBITER_SUPPORTED - /*--------------------------------------------------------------- ADC calibration setting ---------------------------------------------------------------*/ @@ -125,7 +123,7 @@ static uint32_t read_cal_channel(adc_unit_t adc_n) adc_oneshot_ll_start(adc_n); #endif - while(!adc_oneshot_ll_get_event(event)); + while (!adc_oneshot_ll_get_event(event)); uint32_t read_val = -1; read_val = adc_oneshot_ll_get_raw_result(adc_n); @@ -191,8 +189,8 @@ uint32_t adc_hal_self_calibration(adc_unit_t adc_n, adc_atten_t atten, bool inte chk_code = code_h + code_l; uint32_t ret = ((code_sum - chk_code) % (ADC_HAL_CAL_TIMES - 2) < 4) - ? (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) - : (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + 1; + ? (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + : (code_sum - chk_code) / (ADC_HAL_CAL_TIMES - 2) + 1; adc_ll_calibration_finish(adc_n); return ret; diff --git a/components/hal/adc_oneshot_hal.c b/components/esp_hal_ana_conv/adc_oneshot_hal.c similarity index 99% rename from components/hal/adc_oneshot_hal.c rename to components/esp_hal_ana_conv/adc_oneshot_hal.c index dc22838644..3648d1ace5 100644 --- a/components/hal/adc_oneshot_hal.c +++ b/components/esp_hal_ana_conv/adc_oneshot_hal.c @@ -110,7 +110,7 @@ static void adc_hal_onetime_start(adc_unit_t unit, uint32_t clk_src_freq_hz, uin HAL_EARLY_LOGD(TAG, "clk_src_freq_hz: %"PRIu32", adc_ctrl_clk: %"PRIu32", sample_delay_us: %"PRIu32"", clk_src_freq_hz, adc_ctrl_clk, sample_delay_us); //This coefficient (8) is got from test, and verified from DT. When digi_clk is not smaller than ``APB_CLK_FREQ/8``, no delay is needed. - if (adc_ctrl_clk >= APB_CLK_FREQ/8) { + if (adc_ctrl_clk >= APB_CLK_FREQ / 8) { sample_delay_us = 0; } diff --git a/components/soc/esp32/adc_periph.c b/components/esp_hal_ana_conv/esp32/adc_periph.c similarity index 96% rename from components/soc/esp32/adc_periph.c rename to components/esp_hal_ana_conv/esp32/adc_periph.c index 78243a6439..05ef1b8e66 100644 --- a/components/soc/esp32/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32/adc_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { diff --git a/components/soc/esp32/dac_periph.c b/components/esp_hal_ana_conv/esp32/dac_periph.c similarity index 91% rename from components/soc/esp32/dac_periph.c rename to components/esp_hal_ana_conv/esp32/dac_periph.c index 2e503c4060..627edf216a 100644 --- a/components/soc/esp32/dac_periph.c +++ b/components/esp_hal_ana_conv/esp32/dac_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/dac_periph.h" +#include "hal/dac_periph.h" /* Bunch of constants for DAC peripheral: GPIO number diff --git a/components/hal/esp32/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32/include/hal/adc_ll.h similarity index 96% rename from components/hal/esp32/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32/include/hal/adc_ll.h index 8e643c099f..7daac4cf72 100644 --- a/components/hal/esp32/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32/include/hal/adc_ll.h @@ -11,7 +11,7 @@ #include "hal/adc_types.h" #include "hal/misc.h" #include "hal/assert.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/rtc_io_struct.h" #include "soc/sens_struct.h" #include "soc/sens_reg.h" @@ -254,20 +254,20 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt uint8_t bit_width; switch (table.bit_width) { - case 9: - bit_width = 0x0; - break; - case 10: - bit_width = 0x1; - break; - case 11: - bit_width = 0x2; - break; - case 12: - bit_width = 0x3; - break; - default: - bit_width = 0x3; + case 9: + bit_width = 0x0; + break; + case 10: + bit_width = 0x1; + break; + case 11: + bit_width = 0x2; + break; + case 12: + bit_width = 0x3; + break; + default: + bit_width = 0x3; } pattern.val = (table.atten & 0x3) | ((bit_width) << 2) | ((table.channel & 0xF) << 4); @@ -363,23 +363,23 @@ static inline void adc_oneshot_ll_set_output_bits(adc_unit_t adc_n, adc_bitwidth { uint32_t reg_val = 0; switch (bits) { - case ADC_BITWIDTH_9: - reg_val = 0; - break; - case ADC_BITWIDTH_10: - reg_val = 1; - break; - case ADC_BITWIDTH_11: - reg_val = 2; - break; - case ADC_BITWIDTH_12: - reg_val = 3; - break; - case ADC_BITWIDTH_DEFAULT: - reg_val = 3; - break; - default: - HAL_ASSERT(false); + case ADC_BITWIDTH_9: + reg_val = 0; + break; + case ADC_BITWIDTH_10: + reg_val = 1; + break; + case ADC_BITWIDTH_11: + reg_val = 2; + break; + case ADC_BITWIDTH_12: + reg_val = 3; + break; + case ADC_BITWIDTH_DEFAULT: + reg_val = 3; + break; + default: + HAL_ASSERT(false); } if (adc_n == ADC_UNIT_1) { SENS.sar_start_force.sar1_bit_width = reg_val; @@ -526,9 +526,9 @@ static inline bool adc_oneshot_ll_raw_check_valid(adc_unit_t adc_n, uint32_t raw static inline void adc_oneshot_ll_set_atten(adc_unit_t adc_n, adc_channel_t channel, adc_atten_t atten) { if (adc_n == ADC_UNIT_1) { - SENS.sar_atten1 = ( SENS.sar_atten1 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten1 = (SENS.sar_atten1 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } else { // adc_n == ADC_UNIT_2 - SENS.sar_atten2 = ( SENS.sar_atten2 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten2 = (SENS.sar_atten2 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } } @@ -604,7 +604,7 @@ __attribute__((always_inline)) static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t ctrl) { if (adc_n == ADC_UNIT_1) { - switch ( ctrl ) { + switch (ctrl) { case ADC_LL_CTRL_RTC: SENS.sar_read_ctrl.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. SENS.sar_meas_start1.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. @@ -630,7 +630,7 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c break; } } else { // adc_n == ADC_UNIT_2 - switch ( ctrl ) { + switch (ctrl) { case ADC_LL_CTRL_RTC: SENS.sar_meas_start2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. SENS.sar_meas_start2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; diff --git a/components/hal/esp32/include/hal/dac_ll.h b/components/esp_hal_ana_conv/esp32/include/hal/dac_ll.h similarity index 99% rename from components/hal/esp32/include/hal/dac_ll.h rename to components/esp_hal_ana_conv/esp32/include/hal/dac_ll.h index 3426ed97e2..a3cd705845 100644 --- a/components/hal/esp32/include/hal/dac_ll.h +++ b/components/esp_hal_ana_conv/esp32/include/hal/dac_ll.h @@ -15,7 +15,7 @@ #include #include #include "hal/misc.h" -#include "soc/dac_periph.h" +#include "hal/dac_periph.h" #include "soc/rtc_io_struct.h" #include "soc/sens_struct.h" #include "hal/dac_types.h" diff --git a/components/soc/esp32c2/adc_periph.c b/components/esp_hal_ana_conv/esp32c2/adc_periph.c similarity index 76% rename from components/soc/esp32c2/adc_periph.c rename to components/esp_hal_ana_conv/esp32c2/adc_periph.c index 57d916e86b..39f681190a 100644 --- a/components/soc/esp32c2/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32c2/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[1][5] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM diff --git a/components/hal/esp32c2/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32c2/include/hal/adc_ll.h similarity index 97% rename from components/hal/esp32c2/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32c2/include/hal/adc_ll.h index 1cd85c16ca..be90be3593 100644 --- a/components/hal/esp32c2/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32c2/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/rtc_cntl_struct.h" @@ -266,23 +266,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { diff --git a/components/esp_hal_ana_conv/esp32c3/adc_periph.c b/components/esp_hal_ana_conv/esp32c3/adc_periph.c new file mode 100644 index 0000000000..13d9ef43ff --- /dev/null +++ b/components/esp_hal_ana_conv/esp32c3/adc_periph.c @@ -0,0 +1,19 @@ +/* + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "hal/adc_periph.h" + +/* Store IO number corresponding to the ADC channel number. */ +const int adc_channel_io_map[2][5] = { + /* ADC1 */ + { + ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM + }, + /* ADC2 */ + { + ADC2_CHANNEL_0_GPIO_NUM, -1, -1, -1, -1 + } +}; diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32c3/include/hal/adc_ll.h similarity index 98% rename from components/hal/esp32c3/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32c3/include/hal/adc_ll.h index 4f2c7c9baf..c3d11c1e73 100644 --- a/components/hal/esp32c3/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32c3/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/rtc_cntl_struct.h" @@ -363,23 +363,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { @@ -513,8 +513,7 @@ static inline void adc_ll_digi_dma_set_eof_num(uint32_t num) static inline void adc_ll_digi_dma_clr_eof(void) { uint32_t eof_num = HAL_FORCE_READ_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num); - for (int i = 0; i <= eof_num; i++) - { + for (int i = 0; i <= eof_num; i++) { HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.dma_conf, apb_adc_eof_num, i); } } diff --git a/components/soc/esp32c5/adc_periph.c b/components/esp_hal_ana_conv/esp32c5/adc_periph.c similarity index 79% rename from components/soc/esp32c5/adc_periph.c rename to components/esp_hal_ana_conv/esp32c5/adc_periph.c index 9f9bd96cfb..4e8d8e3520 100644 --- a/components/soc/esp32c5/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32c5/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[1][6] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, diff --git a/components/hal/esp32c5/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32c5/include/hal/adc_ll.h similarity index 96% rename from components/hal/esp32c5/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32c5/include/hal/adc_ll.h index 79bd4fd732..e159e2d5b1 100644 --- a/components/hal/esp32c5/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32c5/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/pmu_reg.h" @@ -331,17 +331,17 @@ __attribute__((always_inline)) static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) { switch (clk_src) { - case ADC_DIGI_CLK_SRC_XTAL: - PCR.saradc_clkm_conf.saradc_clkm_sel = 0; - break; - case ADC_DIGI_CLK_SRC_RC_FAST: - PCR.saradc_clkm_conf.saradc_clkm_sel = 1; - break; - case ADC_DIGI_CLK_SRC_PLL_F80M: - PCR.saradc_clkm_conf.saradc_clkm_sel = 2; - break; - default: - HAL_ASSERT(false && "unsupported clock"); + case ADC_DIGI_CLK_SRC_XTAL: + PCR.saradc_clkm_conf.saradc_clkm_sel = 0; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + PCR.saradc_clkm_conf.saradc_clkm_sel = 1; + break; + case ADC_DIGI_CLK_SRC_PLL_F80M: + PCR.saradc_clkm_conf.saradc_clkm_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); } // Enable ADC_CTRL_CLK (i.e. digital domain clock) APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; @@ -380,23 +380,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { @@ -732,7 +732,6 @@ static inline uint32_t adc_oneshot_ll_get_raw_result(adc_unit_t adc_n) return ret_val; } - /** * Analyze whether the obtained raw data is correct. * ADC2 can use arbiter. The arbitration result is stored in the channel information of the returned data. @@ -814,7 +813,6 @@ static inline adc_atten_t adc_ll_get_atten(adc_unit_t adc_n, adc_channel_t chann return (adc_atten_t)APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_atten; } - /*--------------------------------------------------------------- Calibration ---------------------------------------------------------------*/ diff --git a/components/soc/esp32c6/adc_periph.c b/components/esp_hal_ana_conv/esp32c6/adc_periph.c similarity index 80% rename from components/soc/esp32c6/adc_periph.c rename to components/esp_hal_ana_conv/esp32c6/adc_periph.c index 34e69f81b6..9726e8eb81 100644 --- a/components/soc/esp32c6/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32c6/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[1][7] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32c6/include/hal/adc_ll.h similarity index 96% rename from components/hal/esp32c6/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32c6/include/hal/adc_ll.h index 324880d833..4df087de1e 100644 --- a/components/hal/esp32c6/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32c6/include/hal/adc_ll.h @@ -10,7 +10,7 @@ #include "esp_attr.h" #include "esp_rom_sys.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/pmu_reg.h" @@ -331,17 +331,17 @@ __attribute__((always_inline)) static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) { switch (clk_src) { - case ADC_DIGI_CLK_SRC_XTAL: - PCR.saradc_clkm_conf.saradc_clkm_sel = 0; - break; - case ADC_DIGI_CLK_SRC_PLL_F80M: - PCR.saradc_clkm_conf.saradc_clkm_sel = 1; - break; - case ADC_DIGI_CLK_SRC_RC_FAST: - PCR.saradc_clkm_conf.saradc_clkm_sel = 2; - break; - default: - HAL_ASSERT(false && "unsupported clock"); + case ADC_DIGI_CLK_SRC_XTAL: + PCR.saradc_clkm_conf.saradc_clkm_sel = 0; + break; + case ADC_DIGI_CLK_SRC_PLL_F80M: + PCR.saradc_clkm_conf.saradc_clkm_sel = 1; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + PCR.saradc_clkm_conf.saradc_clkm_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); } // Enable ADC_CTRL_CLK (i.e. digital domain clock) APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; @@ -380,23 +380,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { diff --git a/components/soc/esp32c61/adc_periph.c b/components/esp_hal_ana_conv/esp32c61/adc_periph.c similarity index 76% rename from components/soc/esp32c61/adc_periph.c rename to components/esp_hal_ana_conv/esp32c61/adc_periph.c index a0819f8db1..53ed782df3 100644 --- a/components/soc/esp32c61/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32c61/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[1][4] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, diff --git a/components/hal/esp32c61/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32c61/include/hal/adc_ll.h similarity index 96% rename from components/hal/esp32c61/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32c61/include/hal/adc_ll.h index 714f92d4b1..b09049549d 100644 --- a/components/hal/esp32c61/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32c61/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/pmu_reg.h" @@ -333,17 +333,17 @@ __attribute__((always_inline)) static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) { switch (clk_src) { - case ADC_DIGI_CLK_SRC_XTAL: - PCR.saradc_clkm_conf.saradc_clkm_sel = 0; - break; - case ADC_DIGI_CLK_SRC_RC_FAST: - PCR.saradc_clkm_conf.saradc_clkm_sel = 1; - break; - case ADC_DIGI_CLK_SRC_PLL_F80M: - PCR.saradc_clkm_conf.saradc_clkm_sel = 2; - break; - default: - HAL_ASSERT(false && "unsupported clock"); + case ADC_DIGI_CLK_SRC_XTAL: + PCR.saradc_clkm_conf.saradc_clkm_sel = 0; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + PCR.saradc_clkm_conf.saradc_clkm_sel = 1; + break; + case ADC_DIGI_CLK_SRC_PLL_F80M: + PCR.saradc_clkm_conf.saradc_clkm_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); } // Enable ADC_CTRL_CLK (i.e. digital domain clock) ADC.saradc_ctrl.saradc_sar_clk_gated = 1; @@ -382,23 +382,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { @@ -868,7 +868,6 @@ static inline uint32_t adc_oneshot_ll_get_raw_result(adc_unit_t adc_n) return ret_val; } - /** * Analyze whether the obtained raw data is correct. * ADC2 can use arbiter. The arbitration result is stored in the channel information of the returned data. diff --git a/components/soc/esp32h2/adc_periph.c b/components/esp_hal_ana_conv/esp32h2/adc_periph.c similarity index 78% rename from components/soc/esp32h2/adc_periph.c rename to components/esp_hal_ana_conv/esp32h2/adc_periph.c index 524aa9af9c..281bbca6a9 100644 --- a/components/soc/esp32h2/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32h2/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[1][5] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32h2/include/hal/adc_ll.h similarity index 96% rename from components/hal/esp32h2/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32h2/include/hal/adc_ll.h index 3c0bd3db05..29c8db0d1c 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32h2/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/apb_saradc_struct.h" #include "soc/apb_saradc_reg.h" #include "soc/pmu_reg.h" @@ -331,17 +331,17 @@ __attribute__((always_inline)) static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) { switch (clk_src) { - case ADC_DIGI_CLK_SRC_XTAL: - PCR.saradc_clkm_conf.saradc_clkm_sel = 0; - break; - case ADC_DIGI_CLK_SRC_PLL_F96M: - PCR.saradc_clkm_conf.saradc_clkm_sel = 1; - break; - case ADC_DIGI_CLK_SRC_RC_FAST: - PCR.saradc_clkm_conf.saradc_clkm_sel = 2; - break; - default: - HAL_ASSERT(false && "unsupported clock"); + case ADC_DIGI_CLK_SRC_XTAL: + PCR.saradc_clkm_conf.saradc_clkm_sel = 0; + break; + case ADC_DIGI_CLK_SRC_PLL_F96M: + PCR.saradc_clkm_conf.saradc_clkm_sel = 1; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + PCR.saradc_clkm_conf.saradc_clkm_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); } // Enable ADC_CTRL_CLK (i.e. digital domain clock) APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; @@ -380,23 +380,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { diff --git a/components/soc/esp32p4/adc_periph.c b/components/esp_hal_ana_conv/esp32p4/adc_periph.c similarity index 85% rename from components/soc/esp32p4/adc_periph.c rename to components/esp_hal_ana_conv/esp32p4/adc_periph.c index fe4445b44e..9b4ee356c9 100644 --- a/components/soc/esp32p4/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32p4/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[2][8] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, diff --git a/components/hal/esp32p4/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32p4/include/hal/adc_ll.h similarity index 89% rename from components/hal/esp32p4/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32p4/include/hal/adc_ll.h index 4bd4d7f42f..0f1350e06d 100644 --- a/components/hal/esp32p4/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32p4/include/hal/adc_ll.h @@ -9,7 +9,7 @@ #include #include "esp_attr.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "soc/adc_struct.h" #include "soc/clk_tree_defs.h" #include "soc/hp_sys_clkrst_struct.h" @@ -225,17 +225,17 @@ __attribute__((always_inline)) static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) { switch (clk_src) { - case ADC_DIGI_CLK_SRC_XTAL: - HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 0; - break; - case ADC_DIGI_CLK_SRC_RC_FAST: - HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 1; - break; - case ADC_DIGI_CLK_SRC_PLL_F80M: - HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 2; - break; - default: - HAL_ASSERT(false && "unsupported clock"); + case ADC_DIGI_CLK_SRC_XTAL: + HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 0; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 1; + break; + case ADC_DIGI_CLK_SRC_PLL_F80M: + HP_SYS_CLKRST.peri_clk_ctrl22.reg_adc_clk_src_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); } // Enable ADC_CTRL_CLK (i.e. digital domain clock) ADC.ctrl_reg.sar_clk_gated = 1; @@ -274,23 +274,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { @@ -362,7 +362,7 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt uint8_t offset = (pattern_index % 4) * 6; adc_ll_digi_pattern_table_t pattern = {0}; - if (table.unit == ADC_UNIT_1){ + if (table.unit == ADC_UNIT_1) { pattern.val = (table.atten & 0x3) | ((table.channel & 0xF) << 2); tab = ADC.sar1_patt_tab[index].sar1_patt_tab; //Read old register value tab &= (~(0xFC0000 >> offset)); //Clear old data @@ -377,13 +377,12 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt } } - /** * Rest pattern table to default value */ static inline void adc_ll_digi_reset_pattern_table(void) { - for(int i = 0; i < 4; i++) { + for (int i = 0; i < 4; i++) { ADC.sar1_patt_tab[i].sar1_patt_tab = 0xffffff; ADC.sar2_patt_tab[i].sar2_patt_tab = 0xffffff; } @@ -573,8 +572,6 @@ static inline void _adc_ll_reset_register(void) _adc_ll_reset_register(__VA_ARGS__); \ } while(0) - - /** * Set ADC digital controller power management. * @@ -651,7 +648,6 @@ static inline void adc_ll_set_power_manage(adc_unit_t adc_n, adc_ll_power_t mana } } - /** * Set ADC module controller. * There are five SAR ADC controllers: @@ -667,43 +663,43 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c { if (adc_n == ADC_UNIT_1) { switch (ctrl) { - case ADC_LL_CTRL_RTC: - LP_ADC.meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_ULP: - LP_ADC.meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_DIG: - LP_ADC.meas1_mux.sar1_dig_force = 1; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - default: - break; + case ADC_LL_CTRL_RTC: + LP_ADC.meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_ULP: + LP_ADC.meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_DIG: + LP_ADC.meas1_mux.sar1_dig_force = 1; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + default: + break; } } else { // adc_n == ADC_UNIT_2 switch (ctrl) { - case ADC_LL_CTRL_RTC: - LP_ADC.meas2_mux.sar2_rtc_force = 1; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_ULP: - LP_ADC.meas2_mux.sar2_rtc_force = 0; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_DIG: - LP_ADC.meas2_mux.sar2_rtc_force = 0; // 1: Select digital control; 0: Select RTC control. - LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - default: - break; + case ADC_LL_CTRL_RTC: + LP_ADC.meas2_mux.sar2_rtc_force = 1; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_ULP: + LP_ADC.meas2_mux.sar2_rtc_force = 0; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_DIG: + LP_ADC.meas2_mux.sar2_rtc_force = 0; // 1: Select digital control; 0: Select RTC control. + LP_ADC.meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + LP_ADC.meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + default: + break; } } } @@ -1028,7 +1024,6 @@ static inline void adc_ll_rtc_reset(void) LPPERI.reset_en.rst_en_lp_adc = 0; } - /** * Set the attenuation of a particular channel on ADCn. * @@ -1065,9 +1060,9 @@ static inline void adc_ll_rtc_reset(void) static inline void adc_oneshot_ll_set_atten(adc_unit_t adc_n, adc_channel_t channel, adc_atten_t atten) { if (adc_n == ADC_UNIT_1) { - LP_ADC.atten1.sar1_atten = ( LP_ADC.atten1.sar1_atten & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + LP_ADC.atten1.sar1_atten = (LP_ADC.atten1.sar1_atten & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } else { // adc_n == ADC_UNIT_2 - LP_ADC.atten2.sar2_atten = ( LP_ADC.atten2.sar2_atten & ~(0x3 << ((channel + 2) * 2)) ) | ((atten & 0x3) << ((channel + 2) * 2)); + LP_ADC.atten2.sar2_atten = (LP_ADC.atten2.sar2_atten & ~(0x3 << ((channel + 2) * 2))) | ((atten & 0x3) << ((channel + 2) * 2)); } } diff --git a/components/soc/esp32s2/adc_periph.c b/components/esp_hal_ana_conv/esp32s2/adc_periph.c similarity index 87% rename from components/soc/esp32s2/adc_periph.c rename to components/esp_hal_ana_conv/esp32s2/adc_periph.c index 4822580a78..33df96b0db 100644 --- a/components/soc/esp32s2/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32s2/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[2][10] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM, diff --git a/components/soc/esp32s2/dac_periph.c b/components/esp_hal_ana_conv/esp32s2/dac_periph.c similarity index 91% rename from components/soc/esp32s2/dac_periph.c rename to components/esp_hal_ana_conv/esp32s2/dac_periph.c index d38bf1296c..3146f21312 100644 --- a/components/soc/esp32s2/dac_periph.c +++ b/components/esp_hal_ana_conv/esp32s2/dac_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/dac_periph.h" +#include "hal/dac_periph.h" /* Bunch of constants for DAC peripheral: GPIO number diff --git a/components/hal/esp32s2/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32s2/include/hal/adc_ll.h similarity index 99% rename from components/hal/esp32s2/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32s2/include/hal/adc_ll.h index 8842b31290..740be149ce 100644 --- a/components/hal/esp32s2/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32s2/include/hal/adc_ll.h @@ -8,7 +8,7 @@ #include #include "hal/misc.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "hal/adc_types.h" #include "hal/adc_types_private.h" #include "hal/assert.h" @@ -252,7 +252,7 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_unit_t adc_n, uint32_t */ static inline void adc_ll_digi_reset_pattern_table(void) { - for(int i = 0; i < 4; i++) { + for (int i = 0; i < 4; i++) { APB_SARADC.sar1_patt_tab[i] = 0xffffff; APB_SARADC.sar2_patt_tab[i] = 0xffffff; } @@ -507,9 +507,9 @@ static inline void adc_ll_digi_monitor_set_mode(adc_monitor_id_t monitor_id, boo static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh) { if (monitor_id == ADC_MONITOR_0) { - APB_SARADC.thres_ctrl.adc1_thres = (h_thresh == -1)? l_thresh : h_thresh; + APB_SARADC.thres_ctrl.adc1_thres = (h_thresh == -1) ? l_thresh : h_thresh; } else { // monitor_id == ADC_MONITOR_1 - APB_SARADC.thres_ctrl.adc2_thres = (h_thresh == -1)? l_thresh : h_thresh; + APB_SARADC.thres_ctrl.adc2_thres = (h_thresh == -1) ? l_thresh : h_thresh; } adc_ll_digi_monitor_set_mode(monitor_id, l_thresh == -1); } @@ -889,9 +889,9 @@ static inline void adc_ll_rtc_set_arbiter_stable_cycle(uint32_t cycle) static inline void adc_oneshot_ll_set_atten(adc_unit_t adc_n, adc_channel_t channel, adc_atten_t atten) { if (adc_n == ADC_UNIT_1) { - SENS.sar_atten1 = ( SENS.sar_atten1 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten1 = (SENS.sar_atten1 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } else { // adc_n == ADC_UNIT_2 - SENS.sar_atten2 = ( SENS.sar_atten2 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten2 = (SENS.sar_atten2 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } } @@ -1294,7 +1294,6 @@ static inline void adc_ll_regi2c_adc_deinit(void) adc_ll_enable_calibration_ref(ADC_UNIT_2, false); } - /* Temp code end. */ /** diff --git a/components/hal/esp32s2/include/hal/dac_ll.h b/components/esp_hal_ana_conv/esp32s2/include/hal/dac_ll.h similarity index 99% rename from components/hal/esp32s2/include/hal/dac_ll.h rename to components/esp_hal_ana_conv/esp32s2/include/hal/dac_ll.h index dc4e85af24..c5e8d97b8b 100644 --- a/components/hal/esp32s2/include/hal/dac_ll.h +++ b/components/esp_hal_ana_conv/esp32s2/include/hal/dac_ll.h @@ -15,7 +15,7 @@ #include #include #include "hal/misc.h" -#include "soc/dac_periph.h" +#include "hal/dac_periph.h" #include "hal/dac_types.h" #include "soc/apb_saradc_struct.h" #include "soc/sens_struct.h" diff --git a/components/soc/esp32s3/adc_periph.c b/components/esp_hal_ana_conv/esp32s3/adc_periph.c similarity index 87% rename from components/soc/esp32s3/adc_periph.c rename to components/esp_hal_ana_conv/esp32s3/adc_periph.c index 330d9fb107..11208fe51d 100644 --- a/components/soc/esp32s3/adc_periph.c +++ b/components/esp_hal_ana_conv/esp32s3/adc_periph.c @@ -4,10 +4,10 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" /* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { +const int adc_channel_io_map[2][10] = { /* ADC1 */ { ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM, diff --git a/components/hal/esp32s3/include/hal/adc_ll.h b/components/esp_hal_ana_conv/esp32s3/include/hal/adc_ll.h similarity index 93% rename from components/hal/esp32s3/include/hal/adc_ll.h rename to components/esp_hal_ana_conv/esp32s3/include/hal/adc_ll.h index 23209ad355..b936ef2dd9 100644 --- a/components/hal/esp32s3/include/hal/adc_ll.h +++ b/components/esp_hal_ana_conv/esp32s3/include/hal/adc_ll.h @@ -8,7 +8,7 @@ #include #include -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "hal/adc_types.h" #include "hal/adc_types_private.h" #include "hal/assert.h" @@ -143,7 +143,6 @@ typedef struct { #pragma pack(pop) #endif /* _MSC_VER */ - /*--------------------------------------------------------------- Digital controller setting ---------------------------------------------------------------*/ @@ -260,7 +259,7 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_unit_t adc_n, uint32_t */ static inline void adc_ll_digi_reset_pattern_table(void) { - for(int i = 0; i < 4; i++) { + for (int i = 0; i < 4; i++) { APB_SARADC.sar1_patt_tab[i].sar1_patt_tab = 0xffffff; APB_SARADC.sar2_patt_tab[i].sar2_patt_tab = 0xffffff; } @@ -284,7 +283,7 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt adc_ll_digi_pattern_table_t pattern = {0}; pattern.val = (table.atten & 0x3) | ((table.channel & 0xF) << 2); - if (table.unit == ADC_UNIT_1){ + if (table.unit == ADC_UNIT_1) { tab = APB_SARADC.sar1_patt_tab[index].sar1_patt_tab; //Read old register value tab &= (~(0xFC0000 >> offset)); //Clear old data tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset; //Fill in the new data @@ -428,23 +427,23 @@ static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_ { uint32_t factor_reg_val = 0; switch (coeff) { - case ADC_DIGI_IIR_FILTER_COEFF_2: - factor_reg_val = 1; - break; - case ADC_DIGI_IIR_FILTER_COEFF_4: - factor_reg_val = 2; - break; - case ADC_DIGI_IIR_FILTER_COEFF_8: - factor_reg_val = 3; - break; - case ADC_DIGI_IIR_FILTER_COEFF_16: - factor_reg_val = 4; - break; - case ADC_DIGI_IIR_FILTER_COEFF_64: - factor_reg_val = 6; - break; - default: - HAL_ASSERT(false); + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); } if (idx == ADC_DIGI_IIR_FILTER_0) { @@ -691,37 +690,37 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c { if (adc_n == ADC_UNIT_1) { switch (ctrl) { - case ADC_LL_CTRL_RTC: - SENS.sar_meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. - SENS.sar_meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - SENS.sar_meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_ULP: - SENS.sar_meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. - SENS.sar_meas1_ctrl2.meas1_start_force = 0; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - SENS.sar_meas1_ctrl2.sar1_en_pad_force = 0; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_DIG: - SENS.sar_meas1_mux.sar1_dig_force = 1; // 1: Select digital control; 0: Select RTC control. - SENS.sar_meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - SENS.sar_meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - default: - break; + case ADC_LL_CTRL_RTC: + SENS.sar_meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. + SENS.sar_meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + SENS.sar_meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_ULP: + SENS.sar_meas1_mux.sar1_dig_force = 0; // 1: Select digital control; 0: Select RTC control. + SENS.sar_meas1_ctrl2.meas1_start_force = 0; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + SENS.sar_meas1_ctrl2.sar1_en_pad_force = 0; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_DIG: + SENS.sar_meas1_mux.sar1_dig_force = 1; // 1: Select digital control; 0: Select RTC control. + SENS.sar_meas1_ctrl2.meas1_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + SENS.sar_meas1_ctrl2.sar1_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + default: + break; } } else { // adc_n == ADC_UNIT_2 //If ADC2 is not controlled by ULP, the arbiter will decide which controller to use ADC2. switch (ctrl) { - case ADC_LL_CTRL_ARB: - SENS.sar_meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - SENS.sar_meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - case ADC_LL_CTRL_ULP: - SENS.sar_meas2_ctrl2.meas2_start_force = 0; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. - SENS.sar_meas2_ctrl2.sar2_en_pad_force = 0; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; - break; - default: - break; + case ADC_LL_CTRL_ARB: + SENS.sar_meas2_ctrl2.meas2_start_force = 1; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + SENS.sar_meas2_ctrl2.sar2_en_pad_force = 1; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + case ADC_LL_CTRL_ULP: + SENS.sar_meas2_ctrl2.meas2_start_force = 0; // 1: SW control RTC ADC start; 0: ULP control RTC ADC start. + SENS.sar_meas2_ctrl2.sar2_en_pad_force = 0; // 1: SW control RTC ADC bit map; 0: ULP control RTC ADC bit map; + break; + default: + break; } } } @@ -1237,9 +1236,9 @@ static inline void adc_ll_rtc_set_arbiter_stable_cycle(uint32_t cycle) static inline void adc_oneshot_ll_set_atten(adc_unit_t adc_n, adc_channel_t channel, adc_atten_t atten) { if (adc_n == ADC_UNIT_1) { - SENS.sar_atten1 = ( SENS.sar_atten1 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten1 = (SENS.sar_atten1 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } else { // adc_n == ADC_UNIT_2 - SENS.sar_atten2 = ( SENS.sar_atten2 & ~(0x3 << (channel * 2)) ) | ((atten & 0x3) << (channel * 2)); + SENS.sar_atten2 = (SENS.sar_atten2 & ~(0x3 << (channel * 2))) | ((atten & 0x3) << (channel * 2)); } } diff --git a/components/hal/include/hal/adc_hal.h b/components/esp_hal_ana_conv/include/hal/adc_hal.h similarity index 99% rename from components/hal/include/hal/adc_hal.h rename to components/esp_hal_ana_conv/include/hal/adc_hal.h index 2d800f5ab2..66b363c603 100644 --- a/components/hal/include/hal/adc_hal.h +++ b/components/esp_hal_ana_conv/include/hal/adc_hal.h @@ -78,7 +78,6 @@ typedef struct adc_hal_digi_ctrlr_cfg_t { uint32_t clk_src_freq_hz; ///< Clock source frequency in hz } adc_hal_digi_ctrlr_cfg_t; - /*--------------------------------------------------------------- PWDET(Power detect) controller setting ---------------------------------------------------------------*/ diff --git a/components/hal/include/hal/adc_hal_common.h b/components/esp_hal_ana_conv/include/hal/adc_hal_common.h similarity index 99% rename from components/hal/include/hal/adc_hal_common.h rename to components/esp_hal_ana_conv/include/hal/adc_hal_common.h index 7c563a3c1e..734e098de0 100644 --- a/components/hal/include/hal/adc_hal_common.h +++ b/components/esp_hal_ana_conv/include/hal/adc_hal_common.h @@ -13,7 +13,6 @@ extern "C" { #endif - /** * This header file is only for hardware abstract concepts and APIs * used by both ADC RTC controller and Digital controller @@ -92,7 +91,6 @@ uint32_t adc_hal_self_calibration(adc_unit_t adc_n, adc_atten_t atten, bool inte #endif //SOC_ADC_CALIBRATION_V1_SUPPORTED - #ifdef __cplusplus } #endif diff --git a/components/hal/include/hal/adc_oneshot_hal.h b/components/esp_hal_ana_conv/include/hal/adc_oneshot_hal.h similarity index 99% rename from components/hal/include/hal/adc_oneshot_hal.h rename to components/esp_hal_ana_conv/include/hal/adc_oneshot_hal.h index 513aeebe4e..9a8d89c924 100644 --- a/components/hal/include/hal/adc_oneshot_hal.h +++ b/components/esp_hal_ana_conv/include/hal/adc_oneshot_hal.h @@ -14,7 +14,6 @@ extern "C" { #endif - typedef struct sens_dev_t *adc_oneshot_soc_handle_t; typedef struct adc_oneshot_hal_cfg_t { @@ -84,7 +83,6 @@ void adc_oneshot_hal_setup(adc_oneshot_hal_ctx_t *hal, adc_channel_t channel); */ bool adc_oneshot_hal_convert(adc_oneshot_hal_ctx_t *hal, int *out_raw); - #ifdef __cplusplus } #endif diff --git a/components/soc/include/soc/adc_periph.h b/components/esp_hal_ana_conv/include/hal/adc_periph.h similarity index 100% rename from components/soc/include/soc/adc_periph.h rename to components/esp_hal_ana_conv/include/hal/adc_periph.h diff --git a/components/hal/include/hal/adc_types.h b/components/esp_hal_ana_conv/include/hal/adc_types.h similarity index 100% rename from components/hal/include/hal/adc_types.h rename to components/esp_hal_ana_conv/include/hal/adc_types.h diff --git a/components/hal/include/hal/adc_types_private.h b/components/esp_hal_ana_conv/include/hal/adc_types_private.h similarity index 99% rename from components/hal/include/hal/adc_types_private.h rename to components/esp_hal_ana_conv/include/hal/adc_types_private.h index e23c9ce9e9..f24866eaac 100644 --- a/components/hal/include/hal/adc_types_private.h +++ b/components/esp_hal_ana_conv/include/hal/adc_types_private.h @@ -10,7 +10,6 @@ extern "C" { #endif - #if SOC_ADC_ARBITER_SUPPORTED /*--------------------------------------------------------------- Arbiter diff --git a/components/soc/include/soc/dac_periph.h b/components/esp_hal_ana_conv/include/hal/dac_periph.h similarity index 100% rename from components/soc/include/soc/dac_periph.h rename to components/esp_hal_ana_conv/include/hal/dac_periph.h diff --git a/components/hal/include/hal/dac_types.h b/components/esp_hal_ana_conv/include/hal/dac_types.h similarity index 91% rename from components/hal/include/hal/dac_types.h rename to components/esp_hal_ana_conv/include/hal/dac_types.h index b2132e6ce0..6236b9498f 100644 --- a/components/hal/include/hal/dac_types.h +++ b/components/esp_hal_ana_conv/include/hal/dac_types.h @@ -1,3 +1,8 @@ +/* + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #ifdef __cplusplus diff --git a/components/esp_hal_dma/include/hal/dma2d_periph.h b/components/esp_hal_dma/include/hal/dma2d_periph.h index efee7016b2..128edc0a58 100644 --- a/components/esp_hal_dma/include/hal/dma2d_periph.h +++ b/components/esp_hal_dma/include/hal/dma2d_periph.h @@ -7,7 +7,7 @@ #pragma once #include -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #if SOC_HAS(DMA2D) #include "hal/dma2d_ll.h" diff --git a/components/esp_hal_gpio/include/hal/dedic_gpio_periph.h b/components/esp_hal_gpio/include/hal/dedic_gpio_periph.h index 8cc727dd16..477284f53f 100644 --- a/components/esp_hal_gpio/include/hal/dedic_gpio_periph.h +++ b/components/esp_hal_gpio/include/hal/dedic_gpio_periph.h @@ -8,7 +8,7 @@ #include #include "soc/interrupts.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/include/hal/sdm_periph.h b/components/esp_hal_gpio/include/hal/sdm_periph.h index 27cff9cbc8..6349c0bad9 100644 --- a/components/esp_hal_gpio/include/hal/sdm_periph.h +++ b/components/esp_hal_gpio/include/hal/sdm_periph.h @@ -8,7 +8,7 @@ #include #include -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/periph_defs.h" #include "soc/regdma.h" diff --git a/components/esp_hal_i2s/CMakeLists.txt b/components/esp_hal_i2s/CMakeLists.txt new file mode 100644 index 0000000000..006b098ce7 --- /dev/null +++ b/components/esp_hal_i2s/CMakeLists.txt @@ -0,0 +1,25 @@ +idf_build_get_property(target IDF_TARGET) + +if(${target} STREQUAL "linux") + return() # This component is not supported by the POSIX/Linux simulator +endif() + +set(srcs) +set(includes "include") + +if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include") + list(APPEND includes "${target}/include") +endif() + +# I2S related source files +if(CONFIG_SOC_I2S_SUPPORTED) + list(APPEND srcs "i2s_hal.c" "${target}/i2s_periph.c") +endif() + +if(CONFIG_SOC_LP_I2S_SUPPORTED) + list(APPEND srcs "lp_i2s_hal.c") +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes} + REQUIRES soc hal) diff --git a/components/esp_hal_i2s/README.md b/components/esp_hal_i2s/README.md new file mode 100644 index 0000000000..be31bdd61b --- /dev/null +++ b/components/esp_hal_i2s/README.md @@ -0,0 +1,48 @@ +# ESP Hardware Abstraction Layer for I2S Peripheral(s) + +> [!NOTE] +> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems. + +## Overview + +The `esp_hal_i2s` component provides a **Hardware Abstraction Layer** for Inter-IC Sound (I2S) controllers across all ESP-IDF supported targets. I2S is a serial bus interface standard used for connecting digital audio devices, enabling high-quality audio data transmission between integrated circuits. + +## Architecture + +The I2S HAL is structured in two main sub-layers: + +1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control I2S peripherals (e.g., initialization, clock configuration, STD/TDM/PDM slot configuration, channel enable/disable). + +2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations. + +## Supported I2S Controllers + +This HAL supports two I2S controller types depending on the ESP chip: + +- **Standard I2S**: Traditional I2S interface supporting master/slave modes. And the different hardware versions are supported regarding different chips. +- **Low-Power I2S (LP I2S)**: Power-efficient I2S controller for low-power applications (on supported chips) + +## Features + +- **Multiple Audio Formats**: + - Standard I2S (STD) mode + - Pulse Density Modulation (PDM) mode + - Time Division Multiplexing (TDM) mode +- **Master/Slave Mode Support**: Configurable as master or slave device +- **Bidirectional Communication**: Independent TX and RX channel configuration +- **Clock Configuration**: Precise master clock (MCLK) and bit clock (BCLK) division +- **Slot Configuration**: Mono/stereo mode, slot selection, bit width configuration +- **PDM/PCM Converter Features**: PCM-to-PDM and PDM-to-PCM conversion, high-pass filtering (on supported chips) +- **TDM Features**: Multi-slot TDM support with configurable slot masks +- **Signal Connection Management**: GPIO signal mapping and interrupt configuration + +## Usage + +The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_driver_i2s`. + +Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed. + +## Dependencies + +- `soc`: Provides chip-specific register definitions +- `hal`: Core hardware abstraction utilities and macros diff --git a/components/soc/esp32/i2s_periph.c b/components/esp_hal_i2s/esp32/i2s_periph.c similarity index 93% rename from components/soc/esp32/i2s_periph.c rename to components/esp_hal_i2s/esp32/i2s_periph.c index 2a37538bf5..9ac2ff84b1 100644 --- a/components/soc/esp32/i2s_periph.c +++ b/components/esp_hal_i2s/esp32/i2s_periph.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = -1, // Unavailable .mck_in_sig = -1, // Unavailable diff --git a/components/hal/esp32/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32/include/hal/i2s_ll.h index 70a80660fd..0eb174a347 100644 --- a/components/hal/esp32/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32/include/hal/i2s_ll.h @@ -16,7 +16,6 @@ #include #include "hal/misc.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/dport_reg.h" #include "hal/i2s_types.h" @@ -118,7 +117,6 @@ static inline void i2s_ll_enable_bus_clock(int i2s_id, bool enable) i2s_ll_enable_bus_clock(__VA_ARGS__); \ } while(0) - /** * @brief Reset the I2S module * @@ -916,8 +914,6 @@ static inline void i2s_ll_share_bck_ws(i2s_dev_t *hw, bool loopback_en) hw->conf.sig_loopback = loopback_en; } - - /******************************I2S PDM Configurations*************************************/ /** * @brief Configure RX PDM downsample @@ -1095,9 +1091,6 @@ static inline uint32_t i2s_ll_tx_get_pdm_fs(i2s_dev_t *hw) return hw->pdm_freq_conf.tx_pdm_fs; } - - - /****************************I2S ADC/DAC Configurations***********************************/ /** * @brief Enable I2S LCD mode diff --git a/components/soc/esp32c3/i2s_periph.c b/components/esp_hal_i2s/esp32c3/i2s_periph.c similarity index 89% rename from components/soc/esp32c3/i2s_periph.c rename to components/esp_hal_i2s/esp32c3/i2s_periph.c index 77c2d7e7dd..ad5d1d4bbc 100644 --- a/components/soc/esp32c3/i2s_periph.c +++ b/components/esp_hal_i2s/esp32c3/i2s_periph.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, diff --git a/components/hal/esp32c3/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c3/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32c3/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32c3/include/hal/i2s_ll.h index 2a66739a63..a3c770672e 100644 --- a/components/hal/esp32c3/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c3/include/hal/i2s_ll.h @@ -15,13 +15,13 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/system_struct.h" #include "hal/i2s_types.h" #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -39,7 +39,6 @@ extern "C" { #define I2S_LL_DEFAULT_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source - /** * @brief Enable the bus clock for I2S module * @@ -59,7 +58,6 @@ static inline void i2s_ll_enable_bus_clock(int i2s_id, bool enable) i2s_ll_enable_bus_clock(__VA_ARGS__); \ } while(0) - /** * @brief Reset the I2S module * @@ -231,8 +229,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) */ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: hw->tx_clkm_conf.tx_clk_sel = 0; break; @@ -256,8 +253,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) */ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: hw->rx_clkm_conf.rx_clk_sel = 0; break; @@ -629,8 +625,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -658,8 +653,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1049,7 +1043,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * diff --git a/components/soc/esp32c5/i2s_periph.c b/components/esp_hal_i2s/esp32c5/i2s_periph.c similarity index 92% rename from components/soc/esp32c5/i2s_periph.c rename to components/esp_hal_i2s/esp32c5/i2s_periph.c index d68576b304..3a98d21cc1 100644 --- a/components/soc/esp32c5/i2s_periph.c +++ b/components/esp_hal_i2s/esp32c5/i2s_periph.c @@ -4,14 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, @@ -64,7 +64,7 @@ static const uint32_t i2s_regs_map[4] = {0x12360f, 0x0, 0x0, 0x0}; static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32c5/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h similarity index 98% rename from components/hal/esp32c5/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h index 519eceac4e..009f59a51e 100644 --- a/components/hal/esp32c5/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c5/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/pcr_struct.h" #include "soc/soc_etm_struct.h" @@ -24,6 +23,7 @@ #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -42,7 +42,7 @@ extern "C" { #define I2S_LL_DEFAULT_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \ [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \ @@ -52,9 +52,8 @@ extern "C" { [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \ }}}[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \ [I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \ @@ -243,8 +242,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0; break; @@ -272,8 +270,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0; break; @@ -650,8 +647,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -679,8 +675,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1070,7 +1065,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * @@ -1274,10 +1268,10 @@ static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st3.i2s0_evt_tx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st3.i2s0_evt_tx_done_st; + default: + HAL_ASSERT(false); } } @@ -1293,10 +1287,10 @@ static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st3.i2s0_evt_rx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st3.i2s0_evt_rx_done_st; + default: + HAL_ASSERT(false); } } @@ -1312,10 +1306,10 @@ static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st3.i2s0_evt_x_words_sent_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st3.i2s0_evt_x_words_sent_st; + default: + HAL_ASSERT(false); } } @@ -1331,10 +1325,10 @@ static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st3.i2s0_evt_x_words_received_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st3.i2s0_evt_x_words_received_st; + default: + HAL_ASSERT(false); } } diff --git a/components/soc/esp32c6/i2s_periph.c b/components/esp_hal_i2s/esp32c6/i2s_periph.c similarity index 92% rename from components/soc/esp32c6/i2s_periph.c rename to components/esp_hal_i2s/esp32c6/i2s_periph.c index 8b28b8952f..7fe405d70b 100644 --- a/components/soc/esp32c6/i2s_periph.c +++ b/components/esp_hal_i2s/esp32c6/i2s_periph.c @@ -4,14 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, @@ -64,7 +64,7 @@ static const uint32_t i2s_regs_map[4] = {0x12330f, 0x0, 0x0, 0x0}; static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32c6/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c6/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32c6/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32c6/include/hal/i2s_ll.h index db03b2c5d6..fb66aa32b1 100644 --- a/components/hal/esp32c6/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c6/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/pcr_struct.h" #include "soc/soc_etm_source.h" @@ -23,6 +22,7 @@ #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -41,7 +41,7 @@ extern "C" { #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S_EVT_RX_DONE, \ [I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_RECEIVED, \ @@ -51,9 +51,8 @@ extern "C" { [I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_SENT, \ }}}[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S_TASK_START_RX, \ [I2S_ETM_TASK_STOP] = I2S_TASK_STOP_RX, \ @@ -241,8 +240,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0; break; @@ -270,8 +268,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0; break; @@ -648,8 +645,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -677,8 +673,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1068,7 +1063,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * diff --git a/components/soc/esp32c61/i2s_periph.c b/components/esp_hal_i2s/esp32c61/i2s_periph.c similarity index 92% rename from components/soc/esp32c61/i2s_periph.c rename to components/esp_hal_i2s/esp32c61/i2s_periph.c index 80101da6f9..e0a5b28ba3 100644 --- a/components/soc/esp32c61/i2s_periph.c +++ b/components/esp_hal_i2s/esp32c61/i2s_periph.c @@ -4,14 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, @@ -64,7 +64,7 @@ static const uint32_t i2s_regs_map[4] = {0x12360f, 0x0, 0x0, 0x0}; static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32c61/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h similarity index 98% rename from components/hal/esp32c61/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h index b70314713a..f4caa7c133 100644 --- a/components/hal/esp32c61/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32c61/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/pcr_struct.h" #include "soc/soc_etm_struct.h" @@ -24,6 +23,7 @@ #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -43,7 +43,7 @@ extern "C" { #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \ [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \ @@ -53,9 +53,8 @@ extern "C" { [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \ }}}[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \ [I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \ @@ -244,8 +243,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0; break; @@ -273,8 +271,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0; break; @@ -651,8 +648,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -680,8 +676,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1071,7 +1066,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * @@ -1275,10 +1269,10 @@ static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st2.i2s0_evt_tx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st2.i2s0_evt_tx_done_st; + default: + HAL_ASSERT(false); } } @@ -1294,10 +1288,10 @@ static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st2.i2s0_evt_rx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st2.i2s0_evt_rx_done_st; + default: + HAL_ASSERT(false); } } @@ -1313,10 +1307,10 @@ static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st2.i2s0_evt_x_words_sent_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st2.i2s0_evt_x_words_sent_st; + default: + HAL_ASSERT(false); } } @@ -1332,10 +1326,10 @@ static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st2.i2s0_evt_x_words_received_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st2.i2s0_evt_x_words_received_st; + default: + HAL_ASSERT(false); } } diff --git a/components/soc/esp32h2/i2s_periph.c b/components/esp_hal_i2s/esp32h2/i2s_periph.c similarity index 91% rename from components/soc/esp32h2/i2s_periph.c rename to components/esp_hal_i2s/esp32h2/i2s_periph.c index 594170f8af..d0c7c5868c 100644 --- a/components/soc/esp32h2/i2s_periph.c +++ b/components/esp_hal_i2s/esp32h2/i2s_periph.c @@ -4,14 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, @@ -63,7 +63,7 @@ static const uint32_t i2s_regs_map[4] = {0x12330f, 0x0, 0x0, 0x0}; static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32h2/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32h2/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32h2/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32h2/include/hal/i2s_ll.h index f9febbedec..9961930525 100644 --- a/components/hal/esp32h2/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32h2/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/pcr_struct.h" #include "soc/soc_etm_source.h" @@ -23,6 +22,7 @@ #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -41,7 +41,7 @@ extern "C" { #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S_EVT_RX_DONE, \ [I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_RECEIVED, \ @@ -51,9 +51,8 @@ extern "C" { [I2S_ETM_EVENT_REACH_THRESH] = I2S_EVT_X_WORDS_SENT, \ }}}[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S_TASK_START_RX, \ [I2S_ETM_TASK_STOP] = I2S_TASK_STOP_RX, \ @@ -241,8 +240,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0; break; @@ -270,8 +268,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0; break; @@ -648,8 +645,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -677,8 +673,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1068,7 +1063,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * diff --git a/components/soc/esp32h4/i2s_periph.c b/components/esp_hal_i2s/esp32h4/i2s_periph.c similarity index 92% rename from components/soc/esp32h4/i2s_periph.c rename to components/esp_hal_i2s/esp32h4/i2s_periph.c index 64b5ec593f..becab28d34 100644 --- a/components/soc/esp32h4/i2s_periph.c +++ b/components/esp_hal_i2s/esp32h4/i2s_periph.c @@ -4,14 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S_MCLK_OUT_IDX, .mck_in_sig = I2S_MCLK_IN_IDX, @@ -68,7 +68,7 @@ static const uint32_t i2s_regs_map[4] = {0xf191b079, 0x0, 0x0, 0x0}; }; static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(0); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32h4/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32h4/include/hal/i2s_ll.h similarity index 98% rename from components/hal/esp32h4/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32h4/include/hal/i2s_ll.h index 6d0fc56def..31be0af629 100644 --- a/components/hal/esp32h4/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32h4/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/pcr_struct.h" #include "soc/soc_etm_struct.h" @@ -24,6 +23,7 @@ #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 1 #ifdef __cplusplus extern "C" { @@ -43,7 +43,7 @@ extern "C" { #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \ [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \ @@ -53,9 +53,8 @@ extern "C" { [I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \ }}}[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){{ \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \ [I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \ @@ -245,8 +244,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_tx_clkm_conf.i2s_tx_clkm_sel = 0; break; @@ -274,8 +272,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { (void)hw; - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: PCR.i2s_rx_clkm_conf.i2s_rx_clkm_sel = 0; break; @@ -652,8 +649,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -681,8 +677,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1073,7 +1068,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * @@ -1193,7 +1187,6 @@ static inline void i2s_ll_tx_pdm_line_mode(i2s_dev_t *hw, i2s_pdm_tx_line_mode_t hw->tx_pcm2pdm_conf.tx_pdm_dac_2out_en = line_mode != I2S_PDM_TX_ONE_LINE_DAC; } - /** * @brief Reset TX FIFO synchronization counter * @@ -1373,7 +1366,6 @@ static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh) hw->etm_conf.etm_rx_receive_word_num = thresh; } - /** * @brief Get I2S ETM TX done event status * @@ -1386,10 +1378,10 @@ static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.etm_evt_st4.etm_i2s0_evt_tx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.etm_evt_st4.etm_i2s0_evt_tx_done_st; + default: + HAL_ASSERT(false); } } @@ -1405,10 +1397,10 @@ static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.etm_evt_st4.etm_i2s0_evt_rx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.etm_evt_st4.etm_i2s0_evt_rx_done_st; + default: + HAL_ASSERT(false); } } @@ -1424,10 +1416,10 @@ static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.etm_evt_st4.etm_i2s0_evt_x_words_sent_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.etm_evt_st4.etm_i2s0_evt_x_words_sent_st; + default: + HAL_ASSERT(false); } } @@ -1443,10 +1435,10 @@ static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.etm_evt_st4.etm_i2s0_evt_x_words_received_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.etm_evt_st4.etm_i2s0_evt_x_words_received_st; + default: + HAL_ASSERT(false); } } diff --git a/components/soc/esp32p4/i2s_periph.c b/components/esp_hal_i2s/esp32p4/i2s_periph.c similarity index 96% rename from components/soc/esp32p4/i2s_periph.c rename to components/esp_hal_i2s/esp32p4/i2s_periph.c index e750d2e27d..44a92cdc17 100644 --- a/components/soc/esp32p4/i2s_periph.c +++ b/components/esp_hal_i2s/esp32p4/i2s_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/i2s_reg.h" #include "soc/gpio_sig_map.h" #include "soc/lp_gpio_sig_map.h" @@ -12,7 +12,7 @@ /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { [0] = { .mck_out_sig = I2S0_MCLK_PAD_OUT_IDX, .mck_in_sig = I2S0_MCLK_PAD_IN_IDX, @@ -143,7 +143,7 @@ static const regdma_entries_config_t i2s0_regs_retention[] = I2S_SLEEP_RETENTION static const regdma_entries_config_t i2s1_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(1); static const regdma_entries_config_t i2s2_regs_retention[] = I2S_SLEEP_RETENTION_ENTRIES(2); -const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)] = { [0] = { .retention_module = SLEEP_RETENTION_MODULE_I2S0, .entry_array = i2s0_regs_retention, diff --git a/components/hal/esp32p4/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32p4/include/hal/i2s_ll.h similarity index 79% rename from components/hal/esp32p4/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32p4/include/hal/i2s_ll.h index 495c316601..4e15350b55 100644 --- a/components/hal/esp32p4/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32p4/include/hal/i2s_ll.h @@ -15,7 +15,6 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/soc_etm_struct.h" #include "soc/hp_sys_clkrst_struct.h" @@ -26,6 +25,7 @@ #include "hal/config.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 3 #ifdef __cplusplus extern "C" { @@ -52,7 +52,7 @@ extern "C" { #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source #define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_EVENT_MAX]){ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_EVENT_MAX]){ \ [0] = { \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \ @@ -85,9 +85,8 @@ extern "C" { }, \ }[i2s_port][(chan_dir) - 1][event] - #define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \ - (uint32_t[SOC_I2S_ATTR(INST_NUM)][2][I2S_ETM_TASK_MAX]){ \ + (uint32_t[I2S_LL_GET(INST_NUM)][2][I2S_ETM_TASK_MAX]){ \ [0] = { \ [I2S_DIR_RX - 1] = { \ [I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \ @@ -131,18 +130,18 @@ extern "C" { static inline void i2s_ll_enable_bus_clock(int i2s_id, bool enable) { switch (i2s_id) { - case 0: - HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s0_apb_clk_en = enable; - LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s0_mclk_en = enable; - return; - case 1: - HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s1_apb_clk_en = enable; - LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s1_mclk_en = enable; - return; - case 2: - HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s2_apb_clk_en = enable; - LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s2_mclk_en = enable; - return; + case 0: + HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s0_apb_clk_en = enable; + LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s0_mclk_en = enable; + return; + case 1: + HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s1_apb_clk_en = enable; + LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s1_mclk_en = enable; + return; + case 2: + HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2s2_apb_clk_en = enable; + LP_AON_CLKRST.hp_clk_ctrl.hp_pad_i2s2_mclk_en = enable; + return; } } @@ -161,18 +160,18 @@ static inline void i2s_ll_enable_bus_clock(int i2s_id, bool enable) static inline void i2s_ll_reset_register(int i2s_id) { switch (i2s_id) { - case 0: - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s0_apb = 1; - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s0_apb = 0; - return; - case 1: - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s1_apb = 1; - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s1_apb = 0; - return; - case 2: - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s2_apb = 1; - HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s2_apb = 0; - return; + case 0: + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s0_apb = 1; + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s0_apb = 0; + return; + case 1: + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s1_apb = 1; + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s1_apb = 0; + return; + case 2: + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s2_apb = 1; + HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_i2s2_apb = 0; + return; } } @@ -212,15 +211,15 @@ static inline void _i2s_ll_tx_enable_clock(i2s_dev_t *hw) { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_en = 1; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_en = 1; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_en = 1; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_en = 1; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_en = 1; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_en = 1; + return; } } @@ -240,15 +239,15 @@ static inline void _i2s_ll_rx_enable_clock(i2s_dev_t *hw) { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_en = 1; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_en = 1; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_en = 1; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_en = 1; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_en = 1; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_en = 1; + return; } } @@ -268,15 +267,15 @@ static inline void i2s_ll_tx_disable_clock(i2s_dev_t *hw) { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_en = 0; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_en = 0; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_en = 0; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_en = 0; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_en = 0; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_en = 0; + return; } } @@ -296,15 +295,15 @@ static inline void i2s_ll_rx_disable_clock(i2s_dev_t *hw) { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_en = 0; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_en = 0; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_en = 0; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_en = 0; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_en = 0; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_en = 0; + return; } } @@ -325,15 +324,15 @@ static inline void _i2s_ll_mclk_bind_to_tx_clk(i2s_dev_t *hw) // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer // Special on P4, set mst_clk_sel to 1 means attach the mclk signal to TX module switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 1; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 1; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 1; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 1; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 1; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 1; + return; } } @@ -354,15 +353,15 @@ static inline void _i2s_ll_mclk_bind_to_rx_clk(i2s_dev_t *hw) // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer // Special on P4, set mst_clk_sel to 0 means attach the mclk signal to RX module switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 0; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 0; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 0; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_mst_clk_sel = 0; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_mst_clk_sel = 0; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_mst_clk_sel = 0; + return; } } @@ -441,26 +440,25 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) static inline uint32_t i2s_ll_get_clk_src(i2s_clock_src_t src) { - switch (src) - { - case I2S_CLK_SRC_XTAL: - return 0; - case I2S_CLK_SRC_APLL: - return 1; - case I2S_CLK_SRC_EXTERNAL: - return 2; - case I2S_CLK_SRC_DEFAULT: + switch (src) { + case I2S_CLK_SRC_XTAL: + return 0; + case I2S_CLK_SRC_APLL: + return 1; + case I2S_CLK_SRC_EXTERNAL: + return 2; + case I2S_CLK_SRC_DEFAULT: #if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300 - return 3; - // Only support PLL_160M on P4 ver3 and later - case I2S_CLK_SRC_PLL_160M: - return 3; + return 3; + // Only support PLL_160M on P4 ver3 and later + case I2S_CLK_SRC_PLL_160M: + return 3; #else - return 0; + return 0; #endif - default: - HAL_ASSERT(false && "unsupported clock source"); - return -1; + default: + HAL_ASSERT(false && "unsupported clock source"); + return -1; } } @@ -475,15 +473,15 @@ static inline void _i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer uint32_t clk_src = i2s_ll_get_clk_src(src); switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_src_sel = clk_src; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_src_sel = clk_src; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_src_sel = clk_src; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_clk_src_sel = clk_src; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_tx_clk_src_sel = clk_src; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_tx_clk_src_sel = clk_src; + return; } } @@ -505,15 +503,15 @@ static inline void _i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer uint32_t clk_src = i2s_ll_get_clk_src(src); switch (I2S_LL_GET_ID(hw)) { - case 0: - HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_src_sel = clk_src; - return; - case 1: - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_src_sel = clk_src; - return; - case 2: - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_src_sel = clk_src; - return; + case 0: + HP_SYS_CLKRST.peri_clk_ctrl11.reg_i2s0_rx_clk_src_sel = clk_src; + return; + case 1: + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s1_rx_clk_src_sel = clk_src; + return; + case 2: + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_clk_src_sel = clk_src; + return; } } @@ -549,54 +547,54 @@ static inline void i2s_ll_tx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, ui { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl13, reg_i2s0_tx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl13, reg_i2s0_tx_div_n, div_int); - return; - case 1: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl16, reg_i2s1_tx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl16, reg_i2s1_tx_div_n, div_int); - return; - case 2: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl18, reg_i2s2_tx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl18, reg_i2s2_tx_div_n, div_int); - return; + case 0: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl13, reg_i2s0_tx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl14.reg_i2s0_tx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_tx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl13, reg_i2s0_tx_div_n, div_int); + return; + case 1: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl16, reg_i2s1_tx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s1_tx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl16.reg_i2s1_tx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl16, reg_i2s1_tx_div_n, div_int); + return; + case 2: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl18, reg_i2s2_tx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl19.reg_i2s2_tx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl18, reg_i2s2_tx_div_n, div_int); + return; } } @@ -614,54 +612,54 @@ static inline void i2s_ll_rx_set_raw_clk_div(i2s_dev_t *hw, uint32_t div_int, ui { // Note: this function involves HP_SYS_CLKRST register which is shared with other peripherals, need lock in upper layer switch (I2S_LL_GET_ID(hw)) { - case 0: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl12, reg_i2s0_rx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl12, reg_i2s0_rx_div_n, div_int); - return; - case 1: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl14, reg_i2s1_rx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl14, reg_i2s1_rx_div_n, div_int); - return; - case 2: - /* Workaround for the double division issue. - * The division coefficients must be set in particular sequence. - * And it has to switch to a small division first before setting the target division. */ - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl17, reg_i2s2_rx_div_n, 2); - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_yn1 = 0; - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_y = 1; - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_z = 0; - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_div_x = 0; - /* Set the target mclk division coefficients */ - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_yn1 = yn1; - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_z = z; - HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_y = y; - HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_div_x = x; - HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl17, reg_i2s2_rx_div_n, div_int); - return; + case 0: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl12, reg_i2s0_rx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl13.reg_i2s0_rx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl12.reg_i2s0_rx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl12, reg_i2s0_rx_div_n, div_int); + return; + case 1: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl14, reg_i2s1_rx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl15.reg_i2s1_rx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl14, reg_i2s1_rx_div_n, div_int); + return; + case 2: + /* Workaround for the double division issue. + * The division coefficients must be set in particular sequence. + * And it has to switch to a small division first before setting the target division. */ + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl17, reg_i2s2_rx_div_n, 2); + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_yn1 = 0; + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_y = 1; + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_z = 0; + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_div_x = 0; + /* Set the target mclk division coefficients */ + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_yn1 = yn1; + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_z = z; + HP_SYS_CLKRST.peri_clk_ctrl18.reg_i2s2_rx_div_y = y; + HP_SYS_CLKRST.peri_clk_ctrl17.reg_i2s2_rx_div_x = x; + HAL_FORCE_MODIFY_U32_REG_FIELD(HP_SYS_CLKRST.peri_clk_ctrl17, reg_i2s2_rx_div_n, div_int); + return; } } @@ -966,8 +964,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -995,8 +992,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1325,7 +1321,6 @@ static inline void i2s_ll_rx_set_pdm_amplify_num(i2s_dev_t *hw, uint32_t amp_num hw->rx_pdm2pcm_conf.rx_pdm2pcm_amplify_num = amp_num; } - /** * @brief Set I2S RX PDM high pass filter param0 * @@ -1359,7 +1354,6 @@ static inline void i2s_ll_rx_enable_pdm_hp_filter(i2s_dev_t *hw, bool enable) hw->rx_pdm2pcm_conf.rx_pdm_hp_bypass = !enable; } - /** * @brief Configura TX a/u-law decompress or compress * @@ -1461,7 +1455,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * @@ -1665,14 +1658,14 @@ static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st4.i2s0_evt_tx_done_st; - case 1: - return SOC_ETM.evt_st4.i2s1_evt_tx_done_st; - case 2: - return SOC_ETM.evt_st4.i2s2_evt_tx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st4.i2s0_evt_tx_done_st; + case 1: + return SOC_ETM.evt_st4.i2s1_evt_tx_done_st; + case 2: + return SOC_ETM.evt_st4.i2s2_evt_tx_done_st; + default: + HAL_ASSERT(false); } } @@ -1688,14 +1681,14 @@ static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st4.i2s0_evt_rx_done_st; - case 1: - return SOC_ETM.evt_st4.i2s1_evt_rx_done_st; - case 2: - return SOC_ETM.evt_st4.i2s2_evt_rx_done_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st4.i2s0_evt_rx_done_st; + case 1: + return SOC_ETM.evt_st4.i2s1_evt_rx_done_st; + case 2: + return SOC_ETM.evt_st4.i2s2_evt_rx_done_st; + default: + HAL_ASSERT(false); } } @@ -1711,14 +1704,14 @@ static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st4.i2s0_evt_x_words_sent_st; - case 1: - return SOC_ETM.evt_st4.i2s1_evt_x_words_sent_st; - case 2: - return SOC_ETM.evt_st4.i2s2_evt_x_words_sent_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st4.i2s0_evt_x_words_sent_st; + case 1: + return SOC_ETM.evt_st4.i2s1_evt_x_words_sent_st; + case 2: + return SOC_ETM.evt_st4.i2s2_evt_x_words_sent_st; + default: + HAL_ASSERT(false); } } @@ -1734,14 +1727,14 @@ static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw) { uint32_t i2s_id = I2S_LL_GET_ID(hw); switch (i2s_id) { - case 0: - return SOC_ETM.evt_st4.i2s0_evt_x_words_received_st; - case 1: - return SOC_ETM.evt_st4.i2s1_evt_x_words_received_st; - case 2: - return SOC_ETM.evt_st4.i2s2_evt_x_words_received_st; - default: - HAL_ASSERT(false); + case 0: + return SOC_ETM.evt_st4.i2s0_evt_x_words_received_st; + case 1: + return SOC_ETM.evt_st4.i2s1_evt_x_words_received_st; + case 2: + return SOC_ETM.evt_st4.i2s2_evt_x_words_received_st; + default: + HAL_ASSERT(false); } } diff --git a/components/hal/esp32p4/include/hal/lp_i2s_ll.h b/components/esp_hal_i2s/esp32p4/include/hal/lp_i2s_ll.h similarity index 99% rename from components/hal/esp32p4/include/hal/lp_i2s_ll.h rename to components/esp_hal_i2s/esp32p4/include/hal/lp_i2s_ll.h index 501ba27b19..e3159f8db9 100644 --- a/components/hal/esp32p4/include/hal/lp_i2s_ll.h +++ b/components/esp_hal_i2s/esp32p4/include/hal/lp_i2s_ll.h @@ -97,7 +97,6 @@ typedef enum { LP_I2S_LL_RX_BIG_ENDIAN, } lp_i2s_ll_rx_endian_t; - /*--------------------------------------------------------------- Mem ---------------------------------------------------------------*/ @@ -554,8 +553,7 @@ static inline void lp_i2s_ll_rx_select_std_chan(lp_i2s_dev_t *hw, i2s_std_slot_m { hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; uint32_t mask = 0; - switch (chan_mask) - { + switch (chan_mask) { case I2S_STD_SLOT_LEFT: mask = 0x01; break; @@ -717,7 +715,7 @@ static inline uint32_t lp_i2s_ll_rx_get_interrupt_status(lp_i2s_dev_t *hw, bool */ static inline uint32_t lp_i2s_ll_get_intr_status_reg_addr(lp_i2s_dev_t *hw) { - return (uint32_t)&(hw->int_st); + return (uint32_t) & (hw->int_st); } /** diff --git a/components/soc/esp32s2/i2s_periph.c b/components/esp_hal_i2s/esp32s2/i2s_periph.c similarity index 89% rename from components/soc/esp32s2/i2s_periph.c rename to components/esp_hal_i2s/esp32s2/i2s_periph.c index a5a12e552c..816cd60f01 100644 --- a/components/soc/esp32s2/i2s_periph.c +++ b/components/esp_hal_i2s/esp32s2/i2s_periph.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = CLK_I2S_MUX_IDX, .mck_in_sig = -1, // Unavailable diff --git a/components/hal/esp32s2/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32s2/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32s2/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32s2/include/hal/i2s_ll.h index 53730604e2..b0d59e662a 100644 --- a/components/hal/esp32s2/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32s2/include/hal/i2s_ll.h @@ -16,7 +16,6 @@ #include #include "hal/misc.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/system_reg.h" #include "soc/dport_access.h" @@ -24,7 +23,6 @@ #include "hal/hal_utils.h" #include "hal/assert.h" - #define I2S_LL_GET(_attr) I2S_LL_ ## _attr #define I2S_LL_BUS_WIDTH 24 #define I2S_LL_INST_NUM 1 @@ -41,7 +39,6 @@ extern "C" { #define I2S_LL_CLK_FRAC_DIV_N_MAX 256 // I2S_MCLK = I2S_SRC_CLK / (N + b/a), the N register is 8 bit-width #define I2S_LL_CLK_FRAC_DIV_AB_MAX 64 // I2S_MCLK = I2S_SRC_CLK / (N + b/a), the a/b register is 6 bit-width - #define I2S_LL_EVENT_RX_EOF BIT(9) #define I2S_LL_EVENT_TX_EOF BIT(12) #define I2S_LL_EVENT_RX_DSCR_ERR BIT(13) diff --git a/components/soc/esp32s3/i2s_periph.c b/components/esp_hal_i2s/esp32s3/i2s_periph.c similarity index 94% rename from components/soc/esp32s3/i2s_periph.c rename to components/esp_hal_i2s/esp32s3/i2s_periph.c index b7fe11d9e7..0951f85c2d 100644 --- a/components/soc/esp32s3/i2s_periph.c +++ b/components/esp_hal_i2s/esp32s3/i2s_periph.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/i2s_periph.h" +#include "hal/i2s_periph.h" #include "soc/gpio_sig_map.h" /* Bunch of constants for every I2S peripheral: GPIO signals, irqs, hw addr of registers etc */ -const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)] = { +const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)] = { { .mck_out_sig = I2S0_MCLK_OUT_IDX, .mck_in_sig = I2S0_MCLK_IN_IDX, diff --git a/components/hal/esp32s3/include/hal/i2s_ll.h b/components/esp_hal_i2s/esp32s3/include/hal/i2s_ll.h similarity index 99% rename from components/hal/esp32s3/include/hal/i2s_ll.h rename to components/esp_hal_i2s/esp32s3/include/hal/i2s_ll.h index 89c3a47f66..e29f3fcefe 100644 --- a/components/hal/esp32s3/include/hal/i2s_ll.h +++ b/components/esp_hal_i2s/esp32s3/include/hal/i2s_ll.h @@ -15,19 +15,18 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/i2s_periph.h" #include "soc/i2s_struct.h" #include "soc/system_struct.h" #include "hal/i2s_types.h" #include "hal/hal_utils.h" #define I2S_LL_GET(_attr) I2S_LL_ ## _attr +#define I2S_LL_INST_NUM 2 #ifdef __cplusplus extern "C" { #endif - #define I2S_LL_GET_HW(num) (((num) == 0) ? (&I2S0) : &I2S1) #define I2S_LL_TDM_CH_MASK (0xffff) @@ -40,7 +39,6 @@ extern "C" { #define I2S_LL_DEFAULT_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz #define I2S_LL_SUPPORT_XTAL 1 // Support XTAL as I2S clock source - /** * @brief Enable the bus clock for I2S module * @@ -238,8 +236,7 @@ static inline void i2s_ll_rx_reset_fifo(i2s_dev_t *hw) */ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: hw->tx_clkm_conf.tx_clk_sel = 0; break; @@ -266,8 +263,7 @@ static inline void i2s_ll_tx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) */ static inline void i2s_ll_rx_clk_set_src(i2s_dev_t *hw, i2s_clock_src_t src) { - switch (src) - { + switch (src) { case I2S_CLK_SRC_XTAL: hw->rx_clkm_conf.rx_clk_sel = 0; break; @@ -641,8 +637,7 @@ static inline void i2s_ll_tx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->tx_tdm_ctrl.tx_tdm_tot_chan_num = 1; // tx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -670,8 +665,7 @@ static inline void i2s_ll_rx_select_std_slot(i2s_dev_t *hw, i2s_std_slot_mask_t * Otherwise always enable the first two slots */ hw->rx_tdm_ctrl.rx_tdm_tot_chan_num = 1; // rx_tdm_tot_chan_num = 2 slots - 1 = 1 uint32_t chan_mask = 0; - switch (slot_mask) - { + switch (slot_mask) { case I2S_STD_SLOT_LEFT: chan_mask |= 0x01; break; @@ -1084,7 +1078,6 @@ static inline void i2s_ll_tx_set_skip_mask(i2s_dev_t *hw, bool skip_mask_ena) hw->tx_tdm_ctrl.tx_tdm_skip_msk_en = skip_mask_ena; } - /** * @brief Configure single data * diff --git a/components/hal/i2s_hal.c b/components/esp_hal_i2s/i2s_hal.c similarity index 99% rename from components/hal/i2s_hal.c rename to components/esp_hal_i2s/i2s_hal.c index 673e2d1768..8b281126c4 100644 --- a/components/hal/i2s_hal.c +++ b/components/esp_hal_i2s/i2s_hal.c @@ -4,7 +4,6 @@ * SPDX-License-Identifier: Apache-2.0 */ - // The HAL layer for I2S (common part) #include "soc/soc.h" @@ -166,7 +165,7 @@ void i2s_hal_std_set_tx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha i2s_ll_tx_enable_mono_mode(hal->dev, is_copy_mono); i2s_ll_tx_select_std_slot(hal->dev, is_copy_mono ? I2S_STD_SLOT_LEFT : slot_cfg->std.slot_mask); i2s_ll_tx_set_skip_mask(hal->dev, (slot_cfg->std.slot_mask != I2S_STD_SLOT_BOTH) && - (slot_cfg->slot_mode == I2S_SLOT_MODE_STEREO)); + (slot_cfg->slot_mode == I2S_SLOT_MODE_STEREO)); i2s_ll_tx_set_half_sample_bit(hal->dev, slot_bit_width); i2s_ll_tx_set_ws_idle_pol(hal->dev, slot_cfg->std.ws_pol); i2s_ll_tx_set_bit_order(hal->dev, slot_cfg->std.bit_order_lsb); @@ -292,7 +291,7 @@ void i2s_hal_pdm_set_rx_slot(i2s_hal_context_t *hal, bool is_slave, const i2s_ha i2s_ll_rx_enable_mono_mode(hal->dev, false); #if SOC_I2S_PDM_MAX_RX_LINES > 1 uint32_t slot_mask = (slot_cfg->slot_mode == I2S_SLOT_MODE_STEREO && slot_cfg->pdm_rx.slot_mask <= I2S_PDM_SLOT_BOTH) ? - I2S_PDM_SLOT_BOTH : slot_cfg->pdm_rx.slot_mask; + I2S_PDM_SLOT_BOTH : slot_cfg->pdm_rx.slot_mask; #else /* Set the channel mask to enable corresponding slots, always enable two slots for stereo mode */ uint32_t slot_mask = slot_cfg->slot_mode == I2S_SLOT_MODE_STEREO ? I2S_PDM_SLOT_BOTH : slot_cfg->pdm_rx.slot_mask; diff --git a/components/soc/include/soc/i2s_periph.h b/components/esp_hal_i2s/include/hal/i2s_periph.h similarity index 85% rename from components/soc/include/soc/i2s_periph.h rename to components/esp_hal_i2s/include/hal/i2s_periph.h index f94770db9f..8b9265735d 100644 --- a/components/soc/include/soc/i2s_periph.h +++ b/components/esp_hal_i2s/include/hal/i2s_periph.h @@ -8,7 +8,6 @@ #include "soc/soc.h" #include "soc/interrupts.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "soc/regdma.h" #if SOC_HAS(PAU) #include "soc/retention_periph_defs.h" @@ -17,10 +16,9 @@ #if SOC_HAS(I2S) #include "soc/i2s_struct.h" #include "soc/i2s_reg.h" +#include "hal/i2s_ll.h" #endif -#define SOC_I2S_ATTR(_attr) SOC_MODULE_ATTR(I2S, _attr) - #ifdef __cplusplus extern "C" { #endif @@ -60,7 +58,7 @@ typedef struct { const uint8_t irq; } i2s_signal_conn_t; -extern const i2s_signal_conn_t i2s_periph_signal[SOC_I2S_ATTR(INST_NUM)]; +extern const i2s_signal_conn_t i2s_periph_signal[I2S_LL_GET(INST_NUM)]; #if SOC_LP_I2S_SUPPORTED extern const i2s_signal_conn_t lp_i2s_periph_signal[SOC_LP_I2S_NUM]; @@ -73,7 +71,7 @@ typedef struct { uint32_t array_size; } i2s_reg_retention_info_t; -extern const i2s_reg_retention_info_t i2s_reg_retention_info[SOC_I2S_ATTR(INST_NUM)]; +extern const i2s_reg_retention_info_t i2s_reg_retention_info[I2S_LL_GET(INST_NUM)]; #endif // SOC_HAS(PAU) #endif // SOC_HAS(I2S) diff --git a/components/hal/include/hal/i2s_types.h b/components/esp_hal_i2s/include/hal/i2s_types.h similarity index 99% rename from components/hal/include/hal/i2s_types.h rename to components/esp_hal_i2s/include/hal/i2s_types.h index feb2683660..4dacccfec3 100644 --- a/components/hal/include/hal/i2s_types.h +++ b/components/esp_hal_i2s/include/hal/i2s_types.h @@ -70,7 +70,6 @@ typedef soc_periph_i2s_clk_src_t i2s_clock_src_t; /*!< I2S clock source */ typedef int i2s_clock_src_t; /*!< Define a default type to avoid compiling warnings */ #endif - #if SOC_I2S_SUPPORTS_PCM /** * @brief A/U-law decompress or compress configuration. diff --git a/components/hal/lp_i2s_hal.c b/components/esp_hal_i2s/lp_i2s_hal.c similarity index 100% rename from components/hal/lp_i2s_hal.c rename to components/esp_hal_i2s/lp_i2s_hal.c diff --git a/components/esp_hal_lcd/CMakeLists.txt b/components/esp_hal_lcd/CMakeLists.txt index a751dd64da..a6883b19d8 100644 --- a/components/esp_hal_lcd/CMakeLists.txt +++ b/components/esp_hal_lcd/CMakeLists.txt @@ -28,4 +28,5 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${public_include} + PRIV_REQUIRES esp_hal_i2s REQUIRES soc hal) diff --git a/components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h b/components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h index cb0deb8dc5..1fffcb7e4a 100644 --- a/components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h +++ b/components/esp_hal_lcd/esp32p4/include/hal/mipi_dsi_brg_ll.h @@ -130,7 +130,8 @@ static inline void mipi_dsi_brg_ll_set_empty_threshold(dsi_brg_dev_t *dev, uint3 */ static inline void mipi_dsi_brg_ll_set_num_pixel_bits(dsi_brg_dev_t *dev, uint32_t num_pixel_bits) { - dev->raw_num_cfg.raw_num_total = num_pixel_bits / 64; + dev->raw_num_cfg.raw_num_total = (num_pixel_bits + 63) / 64; + dev->raw_num_cfg.unalign_64bit_en = (num_pixel_bits % 64) ? 1 : 0; // reload the value into internal counter dev->raw_num_cfg.raw_num_total_set = 1; } diff --git a/components/esp_hal_parlio/CMakeLists.txt b/components/esp_hal_parlio/CMakeLists.txt new file mode 100644 index 0000000000..1e9f4e56fb --- /dev/null +++ b/components/esp_hal_parlio/CMakeLists.txt @@ -0,0 +1,18 @@ +idf_build_get_property(target IDF_TARGET) +if(${target} STREQUAL "linux") + return() # This component is not supported by the POSIX/Linux simulator +endif() + +set(srcs) +set(includes "include") +if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include") + list(APPEND includes "${target}/include") +endif() + +if(CONFIG_SOC_PARLIO_SUPPORTED) + list(APPEND srcs "${target}/parlio_periph.c" "parlio_hal.c") +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes} + REQUIRES soc hal) diff --git a/components/esp_hal_parlio/README.md b/components/esp_hal_parlio/README.md new file mode 100644 index 0000000000..41dc728ce0 --- /dev/null +++ b/components/esp_hal_parlio/README.md @@ -0,0 +1,81 @@ +# ESP Hardware Abstraction Layer for Parallel IO Peripheral(s) + +> [!NOTE] +> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems. + +## Overview + +The `esp_hal_parlio` component provides a **Hardware Abstraction Layer** for Parallel IO (PARLIO) peripherals across all ESP-IDF supported targets. PARLIO enables high-speed parallel data transfer between the ESP chip and external devices, supporting both transmit (TX) and receive (RX) operations with configurable data widths and timing characteristics. + +## Architecture + +The PARLIO HAL is structured in two main sub-layers: + +1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control PARLIO peripherals (e.g., initialization, unit configuration, transfer start/stop). + +2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations. + +## Supported PARLIO Units + +This HAL supports PARLIO peripherals with the following units depending on the ESP chip: + +- **TX Unit**: Transmits parallel data to external devices + - Configurable data width + - Clock output or external clock input support + - Chip select (CS) signal support (on some chips) + - Valid signal generation and delay control + +- **RX Unit**: Receives parallel data from external devices + - Configurable data width + - Clock input support + - Multiple sampling modes (level-controlled, pulse-controlled, software-controlled) + - Timeout detection support + +## Features + +### Clock Configuration +- Multiple clock source selection +- Configurable clock divider with integer and fractional support (on some chips) +- Independent clock configuration for TX and RX units + +### Data Transfer Control +- Configurable bus width +- Bit packing order configuration (LSB/MSB) +- Sample clock edge selection (rising/falling edge) +- Frame length configuration + +### RX Unit Features +- Level-controlled receive mode with active high/low enable signal +- Pulse-controlled receive mode with configurable start/end pulse counting +- Software-controlled receive mode +- RX timeout detection and threshold configuration +- Clock gating support +- Data line as enable signal support + +### TX Unit Features +- Data length configuration +- Clock gating support +- Valid signal generation and delay control (on some chips) +- Idle data value configuration +- DMA EOF condition support (on some chips) + +### Interrupt and Event Handling +- TX FIFO empty event +- RX FIFO full event +- TX EOF (End of Frame) event +- Interrupt enable/disable and status management + +### Power Management +- Sleep retention support (on some chips) +- Register state preservation during sleep + +## Usage + +The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_driver_parlio`. + +Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed. + +## Dependencies + +- `soc`: Provides chip-specific register definitions +- `hal`: Core hardware abstraction utilities and macros diff --git a/components/hal/esp32c5/include/hal/parlio_ll.h b/components/esp_hal_parlio/esp32c5/include/hal/parlio_ll.h similarity index 96% rename from components/hal/esp32c5/include/hal/parlio_ll.h rename to components/esp_hal_parlio/esp32c5/include/hal/parlio_ll.h index 26f714c693..190389866d 100644 --- a/components/hal/esp32c5/include/hal/parlio_ll.h +++ b/components/esp_hal_parlio/esp32c5/include/hal/parlio_ll.h @@ -17,6 +17,15 @@ #include "soc/parl_io_struct.h" #include "hal/parlio_types.h" +#define PARLIO_LL_GET(attr) (PARLIO_LL_ ## attr) +#define PARLIO_LL_SUPPORT(feat) (PARLIO_LL_SUPPORT_ ## feat) +#define PARLIO_LL_INST_NUM 1 /*!< Number of parallel IO peripherals */ +#define PARLIO_LL_TX_UNITS_PER_INST 1 /*!< number of TX units in each instance */ +#define PARLIO_LL_RX_UNITS_PER_INST 1 /*!< number of RX units in each instance */ +#define PARLIO_LL_SUPPORT_RX_CLK_OUTPUT 1 /*!< Support output RX clock to a GPIO */ +#define PARLIO_LL_SUPPORT_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ +#define PARLIO_LL_SUPPORT_TX_EOF_FROM_DMA 1 /*!< Support to treat DMA EOF as TX unit EOF */ + #define PARLIO_LL_RX_MAX_BYTES_PER_FRAME 0xFFFF #define PARLIO_LL_RX_MAX_CLK_INT_DIV 0x10000 #define PARLIO_LL_RX_MAX_CLK_FRACT_DIV 0 // Not support fractional divider diff --git a/components/soc/esp32c5/parlio_periph.c b/components/esp_hal_parlio/esp32c5/parlio_periph.c similarity index 96% rename from components/soc/esp32c5/parlio_periph.c rename to components/esp_hal_parlio/esp32c5/parlio_periph.c index 7bd78b9970..7e27e9a364 100644 --- a/components/soc/esp32c5/parlio_periph.c +++ b/components/esp_hal_parlio/esp32c5/parlio_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" #include "soc/gpio_sig_map.h" const parlio_signal_conn_t parlio_periph_signals = { @@ -72,7 +72,7 @@ static const regdma_entries_config_t parlio_regs_retention[] = { .owner = ENTRY(0) | ENTRY(2) }, \ }; -const parlio_reg_retention_info_t parlio_reg_retention_info[SOC_PARLIO_GROUPS] = { +const parlio_reg_retention_info_t parlio_reg_retention_info[PARLIO_LL_GET(INST_NUM)] = { [0] = { .regdma_entry_array = parlio_regs_retention, .array_size = ARRAY_SIZE(parlio_regs_retention), diff --git a/components/hal/esp32c6/include/hal/parlio_ll.h b/components/esp_hal_parlio/esp32c6/include/hal/parlio_ll.h similarity index 97% rename from components/hal/esp32c6/include/hal/parlio_ll.h rename to components/esp_hal_parlio/esp32c6/include/hal/parlio_ll.h index f53724e62f..59b3b4fe95 100644 --- a/components/hal/esp32c6/include/hal/parlio_ll.h +++ b/components/esp_hal_parlio/esp32c6/include/hal/parlio_ll.h @@ -17,6 +17,12 @@ #include "soc/parl_io_struct.h" #include "hal/parlio_types.h" +#define PARLIO_LL_GET(attr) (PARLIO_LL_ ## attr) +#define PARLIO_LL_SUPPORT(feat) (PARLIO_LL_SUPPORT_ ## feat) +#define PARLIO_LL_INST_NUM 1 /*!< Number of parallel IO peripherals */ +#define PARLIO_LL_TX_UNITS_PER_INST 1 /*!< number of TX units in each instance */ +#define PARLIO_LL_RX_UNITS_PER_INST 1 /*!< number of RX units in each instance */ + #define PARLIO_LL_RX_MAX_BYTES_PER_FRAME 0xFFFF #define PARLIO_LL_RX_MAX_CLK_INT_DIV 0x10000 #define PARLIO_LL_RX_MAX_CLK_FRACT_DIV 0 // Not support fractional divider diff --git a/components/soc/esp32c6/parlio_periph.c b/components/esp_hal_parlio/esp32c6/parlio_periph.c similarity index 96% rename from components/soc/esp32c6/parlio_periph.c rename to components/esp_hal_parlio/esp32c6/parlio_periph.c index 34433d7ce0..fa9d843f9b 100644 --- a/components/soc/esp32c6/parlio_periph.c +++ b/components/esp_hal_parlio/esp32c6/parlio_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" #include "soc/gpio_sig_map.h" const parlio_signal_conn_t parlio_periph_signals = { @@ -86,7 +86,7 @@ static const regdma_entries_config_t parlio_regs_retention[] = { .owner = ENTRY(0) | ENTRY(2) }, \ }; -const parlio_reg_retention_info_t parlio_reg_retention_info[SOC_PARLIO_GROUPS] = { +const parlio_reg_retention_info_t parlio_reg_retention_info[PARLIO_LL_GET(INST_NUM)] = { [0] = { .regdma_entry_array = parlio_regs_retention, .array_size = ARRAY_SIZE(parlio_regs_retention), diff --git a/components/hal/esp32h2/include/hal/parlio_ll.h b/components/esp_hal_parlio/esp32h2/include/hal/parlio_ll.h similarity index 97% rename from components/hal/esp32h2/include/hal/parlio_ll.h rename to components/esp_hal_parlio/esp32h2/include/hal/parlio_ll.h index e8964cc00c..44350539c1 100644 --- a/components/hal/esp32h2/include/hal/parlio_ll.h +++ b/components/esp_hal_parlio/esp32h2/include/hal/parlio_ll.h @@ -19,6 +19,14 @@ #include "soc/parl_io_struct.h" #include "hal/parlio_types.h" +#define PARLIO_LL_GET(attr) (PARLIO_LL_ ## attr) +#define PARLIO_LL_SUPPORT(feat) (PARLIO_LL_SUPPORT_ ## feat) +#define PARLIO_LL_INST_NUM 1 /*!< Number of parallel IO peripherals */ +#define PARLIO_LL_TX_UNITS_PER_INST 1 /*!< number of TX units in each instance */ +#define PARLIO_LL_RX_UNITS_PER_INST 1 /*!< number of RX units in each instance */ +#define PARLIO_LL_SUPPORT_RX_CLK_OUTPUT 1 /*!< Support output RX clock to a GPIO */ +#define PARLIO_LL_SUPPORT_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ + #define PARLIO_LL_RX_MAX_BYTES_PER_FRAME 0xFFFF #define PARLIO_LL_RX_MAX_CLK_INT_DIV 0x10000 #define PARLIO_LL_RX_MAX_CLK_FRACT_DIV 0 // Not support fractional divider diff --git a/components/soc/esp32h2/parlio_periph.c b/components/esp_hal_parlio/esp32h2/parlio_periph.c similarity index 96% rename from components/soc/esp32h2/parlio_periph.c rename to components/esp_hal_parlio/esp32h2/parlio_periph.c index 15475301d4..27953dc6da 100644 --- a/components/soc/esp32h2/parlio_periph.c +++ b/components/esp_hal_parlio/esp32h2/parlio_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" #include "soc/gpio_sig_map.h" const parlio_signal_conn_t parlio_periph_signals = { @@ -72,7 +72,7 @@ static const regdma_entries_config_t parlio_regs_retention[] = { .owner = ENTRY(0) | ENTRY(2) }, \ }; -const parlio_reg_retention_info_t parlio_reg_retention_info[SOC_PARLIO_GROUPS] = { +const parlio_reg_retention_info_t parlio_reg_retention_info[PARLIO_LL_GET(INST_NUM)] = { [0] = { .regdma_entry_array = parlio_regs_retention, .array_size = ARRAY_SIZE(parlio_regs_retention), diff --git a/components/hal/esp32p4/include/hal/parlio_ll.h b/components/esp_hal_parlio/esp32p4/include/hal/parlio_ll.h similarity index 97% rename from components/hal/esp32p4/include/hal/parlio_ll.h rename to components/esp_hal_parlio/esp32p4/include/hal/parlio_ll.h index a6eae5d0b5..5b1c8be554 100644 --- a/components/hal/esp32p4/include/hal/parlio_ll.h +++ b/components/esp_hal_parlio/esp32p4/include/hal/parlio_ll.h @@ -19,6 +19,14 @@ #include "soc/lp_clkrst_struct.h" #include "soc/parl_io_struct.h" +#define PARLIO_LL_GET(attr) (PARLIO_LL_ ## attr) +#define PARLIO_LL_SUPPORT(feat) (PARLIO_LL_SUPPORT_ ## feat) +#define PARLIO_LL_INST_NUM 1 /*!< Number of parallel IO peripherals */ +#define PARLIO_LL_TX_UNITS_PER_INST 1 /*!< number of TX units in each instance */ +#define PARLIO_LL_RX_UNITS_PER_INST 1 /*!< number of RX units in each instance */ +#define PARLIO_LL_SUPPORT_RX_CLK_OUTPUT 1 /*!< Support output RX clock to a GPIO */ +#define PARLIO_LL_SUPPORT_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ + #define PARLIO_LL_RX_MAX_BYTES_PER_FRAME 0xFFFF #define PARLIO_LL_RX_MAX_CLK_INT_DIV 0x100 #define PARLIO_LL_RX_MAX_CLK_FRACT_DIV 0x100 @@ -34,7 +42,6 @@ #define PARLIO_LL_EVENT_TX_MASK (PARLIO_LL_EVENT_TX_FIFO_EMPTY | PARLIO_LL_EVENT_TX_EOF) #define PARLIO_LL_EVENT_RX_MASK (PARLIO_LL_EVENT_RX_FIFO_FULL) - #if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) < 300 #define PARLIO_LL_TX_DATA_LINE_AS_VALID_SIG 15 // TXD[15] can be used a valid signal #endif diff --git a/components/soc/esp32p4/parlio_periph.c b/components/esp_hal_parlio/esp32p4/parlio_periph.c similarity index 97% rename from components/soc/esp32p4/parlio_periph.c rename to components/esp_hal_parlio/esp32p4/parlio_periph.c index 5a7d4ce791..0049d74990 100644 --- a/components/soc/esp32p4/parlio_periph.c +++ b/components/esp_hal_parlio/esp32p4/parlio_periph.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/parlio_periph.h" +#include "hal/parlio_periph.h" #include "soc/gpio_sig_map.h" const parlio_signal_conn_t parlio_periph_signals = { @@ -88,7 +88,7 @@ static const regdma_entries_config_t parlio_regs_retention[] = { .owner = ENTRY(0) }, }; -const parlio_reg_retention_info_t parlio_reg_retention_info[SOC_PARLIO_GROUPS] = { +const parlio_reg_retention_info_t parlio_reg_retention_info[PARLIO_LL_GET(INST_NUM)] = { [0] = { .regdma_entry_array = parlio_regs_retention, .array_size = ARRAY_SIZE(parlio_regs_retention), diff --git a/components/hal/include/hal/parlio_hal.h b/components/esp_hal_parlio/include/hal/parlio_hal.h similarity index 100% rename from components/hal/include/hal/parlio_hal.h rename to components/esp_hal_parlio/include/hal/parlio_hal.h diff --git a/components/soc/include/soc/parlio_periph.h b/components/esp_hal_parlio/include/hal/parlio_periph.h similarity index 83% rename from components/soc/include/soc/parlio_periph.h rename to components/esp_hal_parlio/include/hal/parlio_periph.h index d33e97c1a3..489b33ad9d 100644 --- a/components/soc/include/soc/parlio_periph.h +++ b/components/esp_hal_parlio/include/hal/parlio_periph.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,6 +12,7 @@ #if SOC_PARLIO_SUPPORTED #include "soc/parl_io_reg.h" #include "soc/parl_io_struct.h" +#include "hal/parlio_ll.h" #endif #include "soc/regdma.h" #if SOC_PARLIO_SUPPORT_SLEEP_RETENTION @@ -30,17 +31,17 @@ typedef struct { const int clk_out_sig; const int clk_in_sig; const int cs_sig; - } tx_units[SOC_PARLIO_TX_UNITS_PER_GROUP]; + } tx_units[PARLIO_LL_GET(TX_UNITS_PER_INST)]; struct { const int data_sigs[SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH]; const int clk_out_sig; const int clk_in_sig; - } rx_units[SOC_PARLIO_RX_UNITS_PER_GROUP]; + } rx_units[PARLIO_LL_GET(RX_UNITS_PER_INST)]; const int tx_irq_id; const int rx_irq_id; const shared_periph_module_t module; const char *module_name; - } groups[SOC_PARLIO_GROUPS]; + } groups[PARLIO_LL_GET(INST_NUM)]; } parlio_signal_conn_t; extern const parlio_signal_conn_t parlio_periph_signals; @@ -52,7 +53,7 @@ typedef struct { uint32_t array_size; } parlio_reg_retention_info_t; -extern const parlio_reg_retention_info_t parlio_reg_retention_info[SOC_PARLIO_GROUPS]; +extern const parlio_reg_retention_info_t parlio_reg_retention_info[PARLIO_LL_GET(INST_NUM)]; #endif // SOC_PARLIO_SUPPORT_SLEEP_RETENTION #endif diff --git a/components/hal/include/hal/parlio_types.h b/components/esp_hal_parlio/include/hal/parlio_types.h similarity index 100% rename from components/hal/include/hal/parlio_types.h rename to components/esp_hal_parlio/include/hal/parlio_types.h diff --git a/components/hal/parlio_hal.c b/components/esp_hal_parlio/parlio_hal.c similarity index 100% rename from components/hal/parlio_hal.c rename to components/esp_hal_parlio/parlio_hal.c diff --git a/components/esp_hal_timg/include/hal/timer_periph.h b/components/esp_hal_timg/include/hal/timer_periph.h index 471739be84..905dafe435 100644 --- a/components/esp_hal_timg/include/hal/timer_periph.h +++ b/components/esp_hal_timg/include/hal/timer_periph.h @@ -10,7 +10,7 @@ #include #include "soc/timer_group_reg.h" #include "soc/timer_group_struct.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/periph_defs.h" #include "soc/regdma.h" #include "hal/timer_ll.h" diff --git a/components/esp_hal_touch_sens/CMakeLists.txt b/components/esp_hal_touch_sens/CMakeLists.txt new file mode 100644 index 0000000000..c9d6cfa9f7 --- /dev/null +++ b/components/esp_hal_touch_sens/CMakeLists.txt @@ -0,0 +1,28 @@ +idf_build_get_property(target IDF_TARGET) + +if(${target} STREQUAL "linux") + return() # This component is not supported by the POSIX/Linux simulator +endif() + +set(srcs) +set(includes) +if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include") + list(APPEND includes "${target}/include") +endif() +# "include" should be behind "${target}/include", because `include_next` has sequence requirement +list(APPEND includes "include") + +# Touch Sensor related source files +if(CONFIG_SOC_TOUCH_SENSOR_SUPPORTED) + # Source files for the legacy touch hal driver + if(CONFIG_SOC_TOUCH_SENSOR_VERSION LESS 3) + list(APPEND srcs "${target}/touch_sensor_legacy_hal.c" + "touch_sensor_legacy_hal.c" + ) + endif() + list(APPEND srcs "touch_sens_hal.c" "${target}/touch_sensor_periph.c") +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${includes} + REQUIRES soc hal) diff --git a/components/esp_hal_touch_sens/README.md b/components/esp_hal_touch_sens/README.md new file mode 100644 index 0000000000..86d42c1e57 --- /dev/null +++ b/components/esp_hal_touch_sens/README.md @@ -0,0 +1,52 @@ +# ESP Hardware Abstraction Layer for Touch Sensor Peripheral + +> [!NOTE] +> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems. + +## Overview + +The `esp_hal_touch_sens` component provides a **Hardware Abstraction Layer** for Touch Sensor controller supported targets. Touch sensors detect touch events by measuring changes in capacitance when a finger or object approaches the touch pad, enabling capacitive touch interfaces for user interaction. + +## Architecture + +The Touch Sensor HAL is structured in two main sub-layers: + +1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control touch sensor peripherals (e.g., initialization, channel configuration, filter setup, measurement control). + +2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations. + +## Supported Touch Sensor Controllers + +This HAL supports various touch sensor controller versions depending on the ESP chip: + +- **Touch Sensor Version 1**: Basic touch sensor functionality (ESP32) +- **Touch Sensor Version 2**: Enhanced features including improved filtering and denoise capabilities (ESP32-S2, ESP32-S3) +- **Touch Sensor Version 3**: Advanced features with frequency hopping, multiple sample configurations, and enhanced waterproof support (ESP32-P4 and newer chips) + +## Features + +- **Channel Management**: Multi-channel touch pad support with independent configuration +- **Measurement Control**: Configurable charge/discharge cycles, voltage thresholds, and measurement intervals +- **Filtering and Signal Processing**: + - Benchmark filter (IIR filter, jitter filter) + - Smooth data filter for noise reduction + - Debounce and noise threshold configuration + - Active threshold hysteresis +- **Denoise Function**: Internal denoise channel (T0) to filter out power supply noise and external EMI +- **Waterproof Support**: Guard pad and shield channel configuration for water-resistant applications +- **Proximity Sensing**: Up to three touch channels can be configured as proximity sensors +- **Sleep Channel**: Deep sleep wake-up support with configurable sleep channel +- **FSM Operation**: Hardware timer or software-triggered measurement modes +- **Interrupt Handling**: Multiple interrupt types (active, inactive, done, scan done, timeout, proximity done) +- **Sample Configuration**: Multiple sample configurations with frequency hopping support (Version 3) + +## Usage + +The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_driver_touch_sens`. + +Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed. + +## Dependencies + +- `soc`: Provides chip-specific register definitions +- `hal`: Core hardware abstraction utilities and macros diff --git a/components/hal/esp32/include/hal/touch_sensor_hal.h b/components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_legacy_hal.h similarity index 98% rename from components/hal/esp32/include/hal/touch_sensor_hal.h rename to components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_legacy_hal.h index dd91614088..033fbc28dc 100644 --- a/components/hal/esp32/include/hal/touch_sensor_hal.h +++ b/components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_legacy_hal.h @@ -17,7 +17,7 @@ #include "hal/touch_sensor_ll.h" #include "hal/touch_sensor_legacy_types.h" -#include_next "hal/touch_sensor_hal.h" +#include_next "hal/touch_sensor_legacy_hal.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32/include/hal/touch_sensor_ll.h b/components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_ll.h similarity index 98% rename from components/hal/esp32/include/hal/touch_sensor_ll.h rename to components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_ll.h index 31daf784af..09b5f09915 100644 --- a/components/hal/esp32/include/hal/touch_sensor_ll.h +++ b/components/esp_hal_touch_sens/esp32/include/hal/touch_sensor_ll.h @@ -18,14 +18,16 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/sens_struct.h" #include "soc/rtc_io_struct.h" #include "soc/rtc_cntl_struct.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "hal/touch_sens_types.h" +#define TOUCH_LL_GET(_attr) TOUCH_LL_ ## _attr +#define TOUCH_LL_CHAN_NUM 10 + #ifdef __cplusplus extern "C" { #endif @@ -34,7 +36,7 @@ extern "C" { #define TOUCH_LL_BIT_SWAP(data, n, m) (((data >> n) & 0x1) == ((data >> m) & 0x1) ? (data) : ((data) ^ ((0x1 <> 1], l_val); @@ -728,9 +729,9 @@ static inline void touch_ll_get_threshold(touch_pad_t touch_num, uint16_t *thres { touch_pad_t tp_wrap = touch_ll_num_wrap(touch_num); if (threshold) { - *threshold = (tp_wrap & 0x1 ) ? - HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_thresh[tp_wrap / 2], l_thresh) : - HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_thresh[tp_wrap / 2], h_thresh); + *threshold = (tp_wrap & 0x1) ? + HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_thresh[tp_wrap / 2], l_thresh) : + HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_thresh[tp_wrap / 2], h_thresh); } } @@ -911,7 +912,7 @@ static inline uint32_t touch_ll_read_raw_data(touch_pad_t touch_num) { touch_pad_t tp_wrap = touch_ll_num_wrap(touch_num); return ((tp_wrap & 0x1) ? HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_meas[tp_wrap / 2], l_val) : - HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_meas[tp_wrap / 2], h_val)); + HAL_FORCE_READ_U32_REG_FIELD(SENS.touch_meas[tp_wrap / 2], h_val)); } #ifdef __cplusplus diff --git a/components/hal/esp32/touch_sensor_hal.c b/components/esp_hal_touch_sens/esp32/touch_sensor_legacy_hal.c similarity index 96% rename from components/hal/esp32/touch_sensor_hal.c rename to components/esp_hal_touch_sens/esp32/touch_sensor_legacy_hal.c index b663dedaa0..b7075b8439 100644 --- a/components/hal/esp32/touch_sensor_hal.c +++ b/components/esp_hal_touch_sens/esp32/touch_sensor_legacy_hal.c @@ -6,7 +6,7 @@ // The HAL layer for Touch sensor (common part) -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #include "hal/touch_sensor_legacy_types.h" void touch_hal_init(void) diff --git a/components/soc/esp32/touch_sensor_periph.c b/components/esp_hal_touch_sens/esp32/touch_sensor_periph.c similarity index 100% rename from components/soc/esp32/touch_sensor_periph.c rename to components/esp_hal_touch_sens/esp32/touch_sensor_periph.c diff --git a/components/hal/esp32p4/include/hal/touch_sensor_ll.h b/components/esp_hal_touch_sens/esp32p4/include/hal/touch_sensor_ll.h similarity index 90% rename from components/hal/esp32p4/include/hal/touch_sensor_ll.h rename to components/esp_hal_touch_sens/esp32p4/include/hal/touch_sensor_ll.h index 4ea8d62d4a..2f462cb6ec 100644 --- a/components/hal/esp32p4/include/hal/touch_sensor_ll.h +++ b/components/esp_hal_touch_sens/esp32p4/include/hal/touch_sensor_ll.h @@ -16,7 +16,7 @@ #include #include "hal/misc.h" #include "hal/assert.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/lp_analog_peri_struct.h" #include "soc/lp_clkrst_struct.h" #include "soc/lp_system_struct.h" @@ -24,10 +24,12 @@ #include "soc/touch_struct.h" #include "soc/pmu_struct.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "hal/touch_sens_types.h" #include "hal/config.h" +#define TOUCH_LL_GET(_attr) TOUCH_LL_ ## _attr +#define TOUCH_LL_CHAN_NUM 14 + #ifdef __cplusplus extern "C" { #endif @@ -47,7 +49,7 @@ extern "C" { #define TOUCH_LL_INTR_MASK_PROX_DONE BIT(5) #define TOUCH_LL_INTR_MASK_ALL (0x3F) -#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << (SOC_MODULE_ATTR(TOUCH, CHAN_NUM))) - 1) << SOC_TOUCH_MIN_CHAN_ID) +#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << (TOUCH_LL_GET(CHAN_NUM))) - 1) << SOC_TOUCH_MIN_CHAN_ID) #define TOUCH_LL_NULL_CHANNEL (15) // Null Channel id. Used for disabling some functions like sleep/proximity/waterproof #define TOUCH_LL_PAD_MEASURE_WAIT_MAX (0x7FFF) // The timer frequency is 8Mhz, the max value is 0xff @@ -100,17 +102,17 @@ static inline void touch_ll_set_charge_times(uint8_t sample_cfg_id, uint16_t cha { //The times of charge and discharge in each measure process of touch channels. switch (sample_cfg_id) { - case 0: - LP_ANA_PERI.touch_work_meas_num.touch_meas_num0 = charge_times; - break; - case 1: - LP_ANA_PERI.touch_work_meas_num.touch_meas_num1 = charge_times; - break; - case 2: - LP_ANA_PERI.touch_work_meas_num.touch_meas_num2 = charge_times; - break; - default: - abort(); + case 0: + LP_ANA_PERI.touch_work_meas_num.touch_meas_num0 = charge_times; + break; + case 1: + LP_ANA_PERI.touch_work_meas_num.touch_meas_num1 = charge_times; + break; + case 2: + LP_ANA_PERI.touch_work_meas_num.touch_meas_num2 = charge_times; + break; + default: + abort(); } } @@ -122,17 +124,17 @@ static inline void touch_ll_set_charge_times(uint8_t sample_cfg_id, uint16_t cha static inline void touch_ll_get_charge_times(uint8_t sample_cfg_id, uint16_t *charge_times) { switch (sample_cfg_id) { - case 0: - *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num0; - break; - case 1: - *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num1; - break; - case 2: - *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num2; - break; - default: - abort(); + case 0: + *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num0; + break; + case 1: + *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num1; + break; + case 2: + *charge_times = LP_ANA_PERI.touch_work_meas_num.touch_meas_num2; + break; + default: + abort(); } } @@ -203,8 +205,8 @@ static inline void touch_ll_force_done_curr_measurement(void) PMU.touch_pwr_cntl.force_done = 1; // Force done signal should last at least one slow clock tick, wait until tick interrupt triggers LP_SYS.int_clr.slow_clk_tick_int_clr = 1; - while(LP_SYS.int_clr.slow_clk_tick_int_clr); - while(!LP_SYS.int_raw.slow_clk_tick_int_raw); + while (LP_SYS.int_clr.slow_clk_tick_int_clr); + while (!LP_SYS.int_raw.slow_clk_tick_int_raw); // Clear `force done` signal PMU.touch_pwr_cntl.force_done = 0; // Disable event tick @@ -451,18 +453,18 @@ static inline void touch_ll_enable_out_gate(bool enable) static inline void touch_ll_set_clock_div(uint8_t sample_cfg_id, uint32_t div_num) { switch (sample_cfg_id) { - case 0: - LP_ANA_PERI.touch_work.div_num0 = div_num - 1; - break; - case 1: - LP_ANA_PERI.touch_work.div_num1 = div_num - 1; - break; - case 2: - LP_ANA_PERI.touch_work.div_num2 = div_num - 1; - break; - default: - // invalid sample_cfg_id - abort(); + case 0: + LP_ANA_PERI.touch_work.div_num0 = div_num - 1; + break; + case 1: + LP_ANA_PERI.touch_work.div_num1 = div_num - 1; + break; + case 2: + LP_ANA_PERI.touch_work.div_num2 = div_num - 1; + break; + default: + // invalid sample_cfg_id + abort(); } } @@ -829,18 +831,18 @@ static inline void touch_ll_waterproof_set_shield_driver(touch_chan_shield_cap_t static inline void touch_ll_set_proximity_sensing_channel(uint8_t prox_chan, uint32_t touch_num) { switch (prox_chan) { - case 0: - LP_ANA_PERI.touch_approach.touch_approach_pad0 = touch_num; - break; - case 1: - LP_ANA_PERI.touch_approach.touch_approach_pad1 = touch_num; - break; - case 2: - LP_ANA_PERI.touch_approach.touch_approach_pad2 = touch_num; - break; - default: - // invalid proximity channel - abort(); + case 0: + LP_ANA_PERI.touch_approach.touch_approach_pad0 = touch_num; + break; + case 1: + LP_ANA_PERI.touch_approach.touch_approach_pad1 = touch_num; + break; + case 2: + LP_ANA_PERI.touch_approach.touch_approach_pad2 = touch_num; + break; + default: + // invalid proximity channel + abort(); } } @@ -863,18 +865,18 @@ static inline void touch_ll_proximity_set_total_scan_times(uint32_t scan_times) static inline void touch_ll_proximity_set_charge_times(uint8_t sample_cfg_id, uint32_t charge_times) { switch (sample_cfg_id) { - case 0: - LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num0 = charge_times; - break; - case 1: - LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num1 = charge_times; - break; - case 2: - LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num2 = charge_times; - break; - default: - // invalid sample_cfg_id - abort(); + case 0: + LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num0 = charge_times; + break; + case 1: + LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num1 = charge_times; + break; + case 2: + LP_ANA_PERI.touch_approach_work_meas_num.touch_approach_meas_num2 = charge_times; + break; + default: + // invalid sample_cfg_id + abort(); } } @@ -887,18 +889,18 @@ static inline void touch_ll_proximity_set_charge_times(uint8_t sample_cfg_id, ui static inline void touch_ll_proximity_read_measure_cnt(uint8_t prox_chan, uint32_t *cnt) { switch (prox_chan) { - case 0: - *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad0_cnt); - break; - case 1: - *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad1_cnt); - break; - case 2: - *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad2_cnt); - break; - default: // sleep channel - *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, slp_approach_cnt); - break; + case 0: + *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad0_cnt); + break; + case 1: + *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad1_cnt); + break; + case 2: + *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, approach_pad2_cnt); + break; + default: // sleep channel + *cnt = HAL_FORCE_READ_U32_REG_FIELD(LP_TOUCH.aprch_ch_data, slp_approach_cnt); + break; } } @@ -910,8 +912,8 @@ static inline void touch_ll_proximity_read_measure_cnt(uint8_t prox_chan, uint32 static inline bool touch_ll_is_proximity_sensing_channel(uint32_t touch_num) { if ((LP_ANA_PERI.touch_approach.touch_approach_pad0 != touch_num) - && (LP_ANA_PERI.touch_approach.touch_approach_pad1 != touch_num) - && (LP_ANA_PERI.touch_approach.touch_approach_pad2 != touch_num)) { + && (LP_ANA_PERI.touch_approach.touch_approach_pad1 != touch_num) + && (LP_ANA_PERI.touch_approach.touch_approach_pad2 != touch_num)) { return false; } return true; @@ -951,18 +953,18 @@ static inline void touch_ll_sleep_get_channel_num(uint32_t *touch_num) static inline void touch_ll_sleep_set_threshold(uint8_t sample_cfg_id, uint32_t touch_thresh) { switch (sample_cfg_id) { - case 0: - HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp0, touch_slp_th0, touch_thresh); - break; - case 1: - HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp1, touch_slp_th1, touch_thresh); - break; - case 2: - HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp1, touch_slp_th2, touch_thresh); - break; - default: - // invalid sample_cfg_id - abort(); + case 0: + HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp0, touch_slp_th0, touch_thresh); + break; + case 1: + HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp1, touch_slp_th1, touch_thresh); + break; + case 2: + HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_slp1, touch_slp_th2, touch_thresh); + break; + default: + // invalid sample_cfg_id + abort(); } } diff --git a/components/soc/esp32p4/touch_sensor_periph.c b/components/esp_hal_touch_sens/esp32p4/touch_sensor_periph.c similarity index 100% rename from components/soc/esp32p4/touch_sensor_periph.c rename to components/esp_hal_touch_sens/esp32p4/touch_sensor_periph.c diff --git a/components/hal/esp32s2/include/hal/touch_sensor_hal.h b/components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_legacy_hal.h similarity index 99% rename from components/hal/esp32s2/include/hal/touch_sensor_hal.h rename to components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_legacy_hal.h index d74b83b937..73ccbf184a 100644 --- a/components/hal/esp32s2/include/hal/touch_sensor_hal.h +++ b/components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_legacy_hal.h @@ -17,7 +17,7 @@ #include "hal/touch_sensor_ll.h" #include "hal/touch_sensor_legacy_types.h" -#include_next "hal/touch_sensor_hal.h" +#include_next "hal/touch_sensor_legacy_hal.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32s2/include/hal/touch_sensor_ll.h b/components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_ll.h similarity index 98% rename from components/hal/esp32s2/include/hal/touch_sensor_ll.h rename to components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_ll.h index 09e4bf0b39..ebea542758 100644 --- a/components/hal/esp32s2/include/hal/touch_sensor_ll.h +++ b/components/esp_hal_touch_sens/esp32s2/include/hal/touch_sensor_ll.h @@ -19,14 +19,20 @@ #include "esp_bit_defs.h" #include "hal/misc.h" #include "hal/assert.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "soc/sens_struct.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_io_struct.h" #include "hal/touch_sens_types.h" +#define TOUCH_LL_GET(_attr) TOUCH_LL_ ## _attr +#define TOUCH_LL_CHAN_NUM 15 +#define TOUCH_LL_SHIELD_CHAN_ID 14 /*!< The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) */ +#define TOUCH_LL_DENOISE_CHAN_ID 0 /*!< T0 is an internal channel that does not have a corresponding external GPIO. + T0 will work simultaneously with the measured channel Tn. Finally, the actual + measured value of Tn is the value after subtracting lower bits of T0. */ + #ifdef __cplusplus extern "C" { #endif @@ -54,7 +60,7 @@ extern "C" { TOUCH_LL_INTR_MASK_INACTIVE | \ TOUCH_LL_INTR_MASK_TIMEOUT) -#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << SOC_MODULE_ATTR(TOUCH, CHAN_NUM)) - 1)) +#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << TOUCH_LL_GET(CHAN_NUM)) - 1)) #define TOUCH_LL_NULL_CHANNEL (0) // Null Channel id. Used for disabling some functions like sleep/proximity/waterproof #define TOUCH_LL_PAD_MEASURE_WAIT_MAX (0xFF) // The timer frequency is 8Mhz, the max value is 0xff @@ -234,7 +240,7 @@ static inline void touch_ll_set_power_on_wait_cycle(uint32_t wait_cycles) * @param charge_times The times of charge and discharge in each measure process of touch channels. * The timer frequency is RTC_FAST (about 16M). Range: 0 ~ 0xffff. */ -static inline void touch_ll_set_charge_times( uint16_t charge_times) +static inline void touch_ll_set_charge_times(uint16_t charge_times) { HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_meas_num, charge_times); } @@ -441,7 +447,6 @@ static inline bool touch_ll_is_fsm_repeated_timer_enabled(void) return (bool)RTCCNTL.touch_ctrl2.touch_slp_timer_en; } - /** * Enable the touch sensor FSM start signal from software */ @@ -688,18 +693,18 @@ static inline void touch_ll_waterproof_set_shield_driver(touch_chan_shield_cap_t static inline void touch_ll_set_proximity_sensing_channel(uint8_t prox_chan, uint32_t touch_num) { switch (prox_chan) { - case 0: - SENS.sar_touch_conf.touch_approach_pad0 = touch_num; - break; - case 1: - SENS.sar_touch_conf.touch_approach_pad1 = touch_num; - break; - case 2: - SENS.sar_touch_conf.touch_approach_pad2 = touch_num; - break; - default: - // invalid proximity channel - abort(); + case 0: + SENS.sar_touch_conf.touch_approach_pad0 = touch_num; + break; + case 1: + SENS.sar_touch_conf.touch_approach_pad1 = touch_num; + break; + case 2: + SENS.sar_touch_conf.touch_approach_pad2 = touch_num; + break; + default: + // invalid proximity channel + abort(); } } diff --git a/components/hal/esp32s2/touch_sensor_hal.c b/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c similarity index 95% rename from components/hal/esp32s2/touch_sensor_hal.c rename to components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c index fe0ad605a6..4c11f843c1 100644 --- a/components/hal/esp32s2/touch_sensor_hal.c +++ b/components/esp_hal_touch_sens/esp32s2/touch_sensor_legacy_hal.c @@ -7,8 +7,7 @@ // The HAL layer for Touch Sensor (common part) #include "soc/soc_pins.h" -#include "soc/touch_sensor_pins.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #include "hal/touch_sensor_legacy_types.h" static int s_sleep_cycle = -1; @@ -50,7 +49,7 @@ void touch_hal_deinit(void) touch_ll_timeout_disable(); touch_ll_waterproof_enable(false); touch_ll_denoise_enable(false); - touch_pad_t prox_pad[SOC_TOUCH_PROXIMITY_CHANNEL_NUM] = {[0 ... (SOC_TOUCH_PROXIMITY_CHANNEL_NUM - 1)] = 0}; + touch_pad_t prox_pad[SOC_TOUCH_PROXIMITY_CHANNEL_NUM] = {[0 ...(SOC_TOUCH_PROXIMITY_CHANNEL_NUM - 1)] = 0}; touch_ll_proximity_set_channel_num((const touch_pad_t *)prox_pad); touch_ll_sleep_set_channel_num(0); touch_ll_sleep_enable_proximity_sensing(false); @@ -89,7 +88,7 @@ void touch_hal_denoise_get_config(touch_pad_denoise_t *denoise) void touch_hal_denoise_enable(void) { - touch_ll_clear_channel_mask(1U << SOC_TOUCH_DENOISE_CHANNEL); + touch_ll_clear_channel_mask(1U << TOUCH_LL_GET(DENOISE_CHAN_ID)); touch_ll_denoise_enable(true); } @@ -107,7 +106,7 @@ void touch_hal_waterproof_get_config(touch_pad_waterproof_t *waterproof) void touch_hal_waterproof_enable(void) { - touch_ll_clear_channel_mask(1U << SOC_TOUCH_SHIELD_CHANNEL); + touch_ll_clear_channel_mask(1U << TOUCH_LL_GET(SHIELD_CHAN_ID)); touch_ll_waterproof_enable(true); } diff --git a/components/soc/esp32s2/touch_sensor_periph.c b/components/esp_hal_touch_sens/esp32s2/touch_sensor_periph.c similarity index 100% rename from components/soc/esp32s2/touch_sensor_periph.c rename to components/esp_hal_touch_sens/esp32s2/touch_sensor_periph.c diff --git a/components/hal/esp32s3/include/hal/touch_sensor_hal.h b/components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_legacy_hal.h similarity index 99% rename from components/hal/esp32s3/include/hal/touch_sensor_hal.h rename to components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_legacy_hal.h index 94219cfb57..1260447e4d 100644 --- a/components/hal/esp32s3/include/hal/touch_sensor_hal.h +++ b/components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_legacy_hal.h @@ -17,7 +17,7 @@ #include "hal/touch_sensor_ll.h" #include "hal/touch_sensor_legacy_types.h" -#include_next "hal/touch_sensor_hal.h" +#include_next "hal/touch_sensor_legacy_hal.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32s3/include/hal/touch_sensor_ll.h b/components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_ll.h similarity index 98% rename from components/hal/esp32s3/include/hal/touch_sensor_ll.h rename to components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_ll.h index 5926d39b50..75f11888aa 100644 --- a/components/hal/esp32s3/include/hal/touch_sensor_ll.h +++ b/components/esp_hal_touch_sens/esp32s3/include/hal/touch_sensor_ll.h @@ -19,14 +19,20 @@ #include "esp_bit_defs.h" #include "hal/misc.h" #include "hal/assert.h" -#include "soc/touch_sensor_periph.h" +#include "hal/touch_sensor_periph.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_io_struct.h" #include "soc/sens_struct.h" #include "soc/soc_caps.h" -#include "soc/soc_caps_full.h" #include "hal/touch_sens_types.h" +#define TOUCH_LL_GET(_attr) TOUCH_LL_ ## _attr +#define TOUCH_LL_CHAN_NUM 15 +#define TOUCH_LL_SHIELD_CHAN_ID 14 /*!< The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) */ +#define TOUCH_LL_DENOISE_CHAN_ID 0 /*!< T0 is an internal channel that does not have a corresponding external GPIO. + T0 will work simultaneously with the measured channel Tn. Finally, the actual + measured value of Tn is the value after subtracting lower bits of T0. */ + #ifdef __cplusplus extern "C" { #endif @@ -50,7 +56,7 @@ extern "C" { TOUCH_LL_INTR_MASK_TIMEOUT | \ TOUCH_LL_INTR_MASK_PROX_DONE) -#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << SOC_MODULE_ATTR(TOUCH, CHAN_NUM)) - 1)) +#define TOUCH_LL_FULL_CHANNEL_MASK ((uint16_t)((1U << TOUCH_LL_GET(CHAN_NUM)) - 1)) #define TOUCH_LL_NULL_CHANNEL (0) // Null Channel id. Used for disabling some functions like sleep/proximity/waterproof #define TOUCH_LL_PAD_MEASURE_WAIT_MAX (0xFF) // The timer frequency is 8Mhz, the max value is 0xff @@ -230,7 +236,7 @@ static inline void touch_ll_set_power_on_wait_cycle(uint32_t wait_cycles) * @param charge_times The times of charge and discharge in each measure process of touch channels. * The timer frequency is RTC_FAST (about 16M). Range: 0 ~ 0xffff. */ -static inline void touch_ll_set_charge_times( uint16_t charge_times) +static inline void touch_ll_set_charge_times(uint16_t charge_times) { HAL_FORCE_MODIFY_U32_REG_FIELD(RTCCNTL.touch_ctrl1, touch_meas_num, charge_times); } @@ -368,7 +374,6 @@ static inline void touch_ll_clear_active_channel_status(void) SENS.sar_touch_conf.touch_status_clr = 1; } - /** * Select touch sensor dbias to save power in sleep mode. * @@ -521,7 +526,6 @@ static inline void touch_ll_filter_enable(bool enable) RTCCNTL.touch_filter_ctrl.touch_filter_en = enable; } - /** * Set filter mode. The input of the filter is the raw value of touch reading, * and the output of the filter is involved in the judgment of the touch state. @@ -699,18 +703,18 @@ static inline void touch_ll_waterproof_set_shield_driver(touch_chan_shield_cap_t static inline void touch_ll_set_proximity_sensing_channel(uint8_t prox_chan, uint32_t touch_num) { switch (prox_chan) { - case 0: - SENS.sar_touch_conf.touch_approach_pad0 = touch_num; - break; - case 1: - SENS.sar_touch_conf.touch_approach_pad1 = touch_num; - break; - case 2: - SENS.sar_touch_conf.touch_approach_pad2 = touch_num; - break; - default: - // invalid proximity channel - abort(); + case 0: + SENS.sar_touch_conf.touch_approach_pad0 = touch_num; + break; + case 1: + SENS.sar_touch_conf.touch_approach_pad1 = touch_num; + break; + case 2: + SENS.sar_touch_conf.touch_approach_pad2 = touch_num; + break; + default: + // invalid proximity channel + abort(); } } @@ -1757,7 +1761,6 @@ static inline void touch_ll_sleep_read_chan_data(uint8_t type, uint32_t *data) } } - /** * Select touch sensor dbias to save power in sleep mode. * diff --git a/components/hal/esp32s3/touch_sensor_hal.c b/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c similarity index 96% rename from components/hal/esp32s3/touch_sensor_hal.c rename to components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c index f4a662af59..ed667f0b81 100644 --- a/components/hal/esp32s3/touch_sensor_hal.c +++ b/components/esp_hal_touch_sens/esp32s3/touch_sensor_legacy_hal.c @@ -7,7 +7,7 @@ // The HAL layer for Touch Sensor (common part) #include "soc/soc_pins.h" -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #include "hal/touch_sensor_ll.h" #include "hal/touch_sensor_legacy_types.h" #include "soc/soc_caps.h" @@ -51,7 +51,7 @@ void touch_hal_deinit(void) touch_ll_timeout_disable(); touch_ll_waterproof_enable(false); touch_ll_denoise_enable(false); - touch_pad_t prox_pad[SOC_TOUCH_PROXIMITY_CHANNEL_NUM] = {[0 ... (SOC_TOUCH_PROXIMITY_CHANNEL_NUM - 1)] = 0}; + touch_pad_t prox_pad[SOC_TOUCH_PROXIMITY_CHANNEL_NUM] = {[0 ...(SOC_TOUCH_PROXIMITY_CHANNEL_NUM - 1)] = 0}; touch_ll_proximity_set_channel_num((const touch_pad_t *)prox_pad); touch_ll_sleep_set_channel_num(0); touch_ll_sleep_enable_proximity_sensing(false); @@ -90,7 +90,7 @@ void touch_hal_denoise_get_config(touch_pad_denoise_t *denoise) void touch_hal_denoise_enable(void) { - touch_ll_clear_channel_mask(1U << SOC_TOUCH_DENOISE_CHANNEL); + touch_ll_clear_channel_mask(1U << TOUCH_LL_GET(DENOISE_CHAN_ID)); touch_ll_denoise_enable(true); } @@ -108,7 +108,7 @@ void touch_hal_waterproof_get_config(touch_pad_waterproof_t *waterproof) void touch_hal_waterproof_enable(void) { - touch_ll_clear_channel_mask(1U << SOC_TOUCH_SHIELD_CHANNEL); + touch_ll_clear_channel_mask(1U << TOUCH_LL_GET(SHIELD_CHAN_ID)); touch_ll_waterproof_enable(true); } diff --git a/components/soc/esp32s3/touch_sensor_periph.c b/components/esp_hal_touch_sens/esp32s3/touch_sensor_periph.c similarity index 100% rename from components/soc/esp32s3/touch_sensor_periph.c rename to components/esp_hal_touch_sens/esp32s3/touch_sensor_periph.c diff --git a/components/hal/include/hal/touch_sens_hal.h b/components/esp_hal_touch_sens/include/hal/touch_sens_hal.h similarity index 99% rename from components/hal/include/hal/touch_sens_hal.h rename to components/esp_hal_touch_sens/include/hal/touch_sens_hal.h index 84fbdad205..6f0bc56629 100644 --- a/components/hal/include/hal/touch_sens_hal.h +++ b/components/esp_hal_touch_sens/include/hal/touch_sens_hal.h @@ -10,7 +10,6 @@ * See readme.md in hal/include/hal/readme.md ******************************************************************************/ - #pragma once #include "soc/soc_caps.h" @@ -105,7 +104,7 @@ typedef struct { * of the sample configurations below. */ touch_out_mode_t output_mode; /*!< Touch channel counting mode of the binarized touch output */ - #endif // SOC_TOUCH_SENSOR_VERSION == 3 +#endif // SOC_TOUCH_SENSOR_VERSION == 3 uint32_t sample_cfg_num; /*!< The sample configuration number that used for sampling */ uint32_t trigger_rise_cnt; /*!< The counter of triggered frequency points to judge whether a channel active. * For example, there are 3 sample configurations activated, and the trigger_rise_cnt is 2, diff --git a/components/hal/include/hal/touch_sens_types.h b/components/esp_hal_touch_sens/include/hal/touch_sens_types.h similarity index 100% rename from components/hal/include/hal/touch_sens_types.h rename to components/esp_hal_touch_sens/include/hal/touch_sens_types.h diff --git a/components/hal/include/hal/touch_sensor_hal.h b/components/esp_hal_touch_sens/include/hal/touch_sensor_legacy_hal.h similarity index 100% rename from components/hal/include/hal/touch_sensor_hal.h rename to components/esp_hal_touch_sens/include/hal/touch_sensor_legacy_hal.h diff --git a/components/hal/include/hal/touch_sensor_legacy_types.h b/components/esp_hal_touch_sens/include/hal/touch_sensor_legacy_types.h similarity index 100% rename from components/hal/include/hal/touch_sensor_legacy_types.h rename to components/esp_hal_touch_sens/include/hal/touch_sensor_legacy_types.h diff --git a/components/soc/include/soc/touch_sensor_periph.h b/components/esp_hal_touch_sens/include/hal/touch_sensor_periph.h similarity index 100% rename from components/soc/include/soc/touch_sensor_periph.h rename to components/esp_hal_touch_sens/include/hal/touch_sensor_periph.h diff --git a/components/hal/touch_sens_hal.c b/components/esp_hal_touch_sens/touch_sens_hal.c similarity index 95% rename from components/hal/touch_sens_hal.c rename to components/esp_hal_touch_sens/touch_sens_hal.c index 31353bdc53..54b7572919 100644 --- a/components/hal/touch_sens_hal.c +++ b/components/esp_hal_touch_sens/touch_sens_hal.c @@ -10,7 +10,6 @@ #include "hal/touch_sens_hal.h" #include "hal/touch_sens_types.h" - typedef struct { bool deep_slp_allow_pd; int deep_slp_chan; @@ -81,14 +80,14 @@ static void s_touch_hal_apply_sleep_config(void) /* Apply the particular configuration for deep sleep */ if (s_touch_slp_obj.apply_slp_cfg) { /* Save the current channel threshold first, because they will be reset by hardware after the recofniguration */ - uint32_t chan_thresh[SOC_MODULE_ATTR(TOUCH, CHAN_NUM)] = {}; - for (int i = 0; i < SOC_MODULE_ATTR(TOUCH, CHAN_NUM); i++) { + uint32_t chan_thresh[TOUCH_LL_GET(CHAN_NUM)] = {}; + for (int i = 0; i < TOUCH_LL_GET(CHAN_NUM); i++) { chan_thresh[i] = touch_ll_get_chan_active_threshold(i); } /* Reconfigure the touch sensor to use the sleep configuration */ touch_hal_config_controller(&s_touch_slp_obj.slp_cfg); /* Restore the channel threshold */ - for (int i = 0; i < SOC_MODULE_ATTR(TOUCH, CHAN_NUM); i++) { + for (int i = 0; i < TOUCH_LL_GET(CHAN_NUM); i++) { touch_ll_set_chan_active_threshold(i, chan_thresh[i]); } } diff --git a/components/hal/touch_sensor_hal.c b/components/esp_hal_touch_sens/touch_sensor_legacy_hal.c similarity index 96% rename from components/hal/touch_sensor_hal.c rename to components/esp_hal_touch_sens/touch_sensor_legacy_hal.c index 3121f03e2d..91e3dbb880 100644 --- a/components/hal/touch_sensor_hal.c +++ b/components/esp_hal_touch_sens/touch_sensor_legacy_hal.c @@ -6,7 +6,7 @@ // The HAL layer for Touch Sensor (common part) -#include "hal/touch_sensor_hal.h" +#include "hal/touch_sensor_legacy_hal.h" #include "hal/touch_sensor_legacy_types.h" #include "soc/soc_caps.h" diff --git a/components/esp_hal_usb/usb_dwc_hal.c b/components/esp_hal_usb/usb_dwc_hal.c index 2fbf7b5324..51fabde0d6 100644 --- a/components/esp_hal_usb/usb_dwc_hal.c +++ b/components/esp_hal_usb/usb_dwc_hal.c @@ -8,7 +8,7 @@ #include #include // For memset() #include // For abort() -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/chip_revision.h" #include "soc/usb_periph.h" #include "hal/usb_dwc_hal.h" diff --git a/components/esp_hal_wdt/wdt_hal_iram.c b/components/esp_hal_wdt/wdt_hal_iram.c index e423148283..d256a0abcf 100644 --- a/components/esp_hal_wdt/wdt_hal_iram.c +++ b/components/esp_hal_wdt/wdt_hal_iram.c @@ -8,7 +8,7 @@ #include #include "hal/wdt_types.h" #include "hal/wdt_hal.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" /* ---------------------------- Init and Config ----------------------------- */ diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index ff25ad3ea0..87eb9527af 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -77,9 +77,13 @@ if(NOT non_os_build) # [refactor-todo] list(APPEND priv_requires esp_driver_gpio # for GPIO and RTC (by sleep_gpio and sleep_modes) esp_timer + esp_hal_touch_sens # for touch sensor wakeup (introduced in sleep_modes.c) esp_pm) - list(APPEND priv_requires esp_mm esp_hal_mspi) + list(APPEND priv_requires esp_mm + esp_hal_mspi + esp_hal_i2s # required by `sleep_system_peripheral.c` + ) if(CONFIG_IDF_TARGET_ESP32 OR CONFIG_IDF_TARGET_ESP32S2) list(APPEND srcs "rtc_wdt.c") @@ -239,3 +243,6 @@ if(${target} STREQUAL "esp32p4") # for mipi_csi_share_hw_ctrl.c idf_component_optional_requires(PRIVATE esp_hal_cam) endif() + +# Required in `adc_share_hw_ctrl.h` +idf_component_optional_requires(PUBLIC esp_hal_ana_conv) diff --git a/components/esp_hw_support/include/esp_sleep.h b/components/esp_hw_support/include/esp_sleep.h index 72c872c703..19e9462cf4 100644 --- a/components/esp_hw_support/include/esp_sleep.h +++ b/components/esp_hw_support/include/esp_sleep.h @@ -9,7 +9,6 @@ #include #include "esp_err.h" -#include "hal/touch_sensor_legacy_types.h" #include "hal/gpio_types.h" #include "soc/soc_caps.h" diff --git a/components/esp_hw_support/port/esp32/rtc_sleep.c b/components/esp_hw_support/port/esp32/rtc_sleep.c index 64d94bdb1f..45648d6588 100644 --- a/components/esp_hw_support/port/esp32/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32/rtc_sleep.c @@ -8,7 +8,7 @@ #include "soc/soc.h" #include "soc/rtc.h" #include "soc/dport_reg.h" -#include "soc/i2s_periph.h" +#include "soc/i2s_reg.h" #include "soc/bb_reg.h" #include "soc/nrx_reg.h" #include "soc/fe_reg.h" diff --git a/components/esp_hw_support/sleep_system_peripheral.c b/components/esp_hw_support/sleep_system_peripheral.c index a9415214a2..e7582ec200 100644 --- a/components/esp_hw_support/sleep_system_peripheral.c +++ b/components/esp_hw_support/sleep_system_peripheral.c @@ -8,10 +8,13 @@ #include #include "sdkconfig.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "soc/system_periph_retention.h" #include "soc/uart_periph.h" #include "hal/timer_ll.h" +#if SOC_HAS(I2S) +#include "hal/i2s_ll.h" +#endif #include "esp_sleep.h" #include "esp_log.h" @@ -239,12 +242,14 @@ bool peripheral_domain_pd_allowed(void) #if SOC_HAS(PAU) mask.bitmap[SLEEP_RETENTION_MODULE_I2S0 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S0 % 32); -# if (SOC_MODULE_ATTR(I2S, INST_NUM) > 1) +#ifdef I2S_LL_GET +# if (I2S_LL_GET(INST_NUM) > 1) mask.bitmap[SLEEP_RETENTION_MODULE_I2S1 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S1 % 32); # endif -# if (SOC_MODULE_ATTR(I2S, INST_NUM) > 2) +# if (I2S_LL_GET(INST_NUM) > 2) mask.bitmap[SLEEP_RETENTION_MODULE_I2S2 >> 5] |= BIT(SLEEP_RETENTION_MODULE_I2S2 % 32); # endif +#endif /* I2S_LL_GET */ #endif /* SOC_HAS(PAU) */ #if SOC_I2C_SUPPORT_SLEEP_RETENTION diff --git a/components/esp_lcd/i80/i80_io_priv.h b/components/esp_lcd/i80/i80_io_priv.h index bb52e2aa5b..cffcad1bda 100644 --- a/components/esp_lcd/i80/i80_io_priv.h +++ b/components/esp_lcd/i80/i80_io_priv.h @@ -16,7 +16,7 @@ // Set the maximum log level for gptimer driver #define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE #endif -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/queue.h" diff --git a/components/esp_lcd/spi/esp_lcd_panel_io_spi.c b/components/esp_lcd/spi/esp_lcd_panel_io_spi.c index 48ed5bc0f1..1c84f5d269 100644 --- a/components/esp_lcd/spi/esp_lcd_panel_io_spi.c +++ b/components/esp_lcd/spi/esp_lcd_panel_io_spi.c @@ -97,7 +97,6 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p // if the DC line is not encoded into any spi transaction phase or it's not controlled by SPI peripheral if (io_config->dc_gpio_num >= 0) { gpio_set_level(io_config->dc_gpio_num, 0); - gpio_func_sel(io_config->dc_gpio_num, PIN_FUNC_GPIO); gpio_output_enable(io_config->dc_gpio_num); } diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index e46225dbd0..6df24fac68 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -79,11 +79,13 @@ else() # [REFACTOR-TODO] Provide system hook to release dependency reversion. # IDF-13980 esp_hal_i2c + esp_hal_i2s esp_hal_wdt esp_hal_lcd esp_hal_mcpwm esp_hal_pcnt esp_hal_cam + esp_hal_parlio esp_hal_twai LDFRAGMENTS "linker.lf" "app.lf") add_subdirectory(port) diff --git a/components/hal/CMakeLists.txt b/components/hal/CMakeLists.txt index ad8bc16951..0065192d50 100644 --- a/components/hal/CMakeLists.txt +++ b/components/hal/CMakeLists.txt @@ -3,6 +3,7 @@ idf_build_get_property(esp_tee_build ESP_TEE_BUILD) set(srcs "hal_utils.c") set(includes "platform_port/include") +set(requires) # target specific include must be added before the generic one # because of the "include_next" directive used by the efuse_hal.h @@ -95,10 +96,6 @@ elseif(NOT BOOTLOADER_BUILD) list(APPEND srcs "isp_hal.c") endif() - if(CONFIG_SOC_LP_I2S_SUPPORTED) - list(APPEND srcs "lp_i2s_hal.c") - endif() - if(CONFIG_SOC_RMT_SUPPORTED) list(APPEND srcs "rmt_hal.c") endif() @@ -107,10 +104,6 @@ elseif(NOT BOOTLOADER_BUILD) list(APPEND srcs "uhci_hal.c") endif() - if(CONFIG_SOC_I2S_SUPPORTED) - list(APPEND srcs "i2s_hal.c") - endif() - if(CONFIG_SOC_SDMMC_HOST_SUPPORTED) list(APPEND srcs "sdmmc_hal.c") endif() @@ -123,18 +116,6 @@ elseif(NOT BOOTLOADER_BUILD) list(APPEND srcs "etm_hal.c" "${target}/etm_periph.c") endif() - if(CONFIG_SOC_PARLIO_SUPPORTED) - list(APPEND srcs "parlio_hal.c") - endif() - - if(CONFIG_SOC_ADC_SUPPORTED) - list(APPEND srcs "adc_hal_common.c" "adc_oneshot_hal.c") - - if(CONFIG_SOC_ADC_DMA_SUPPORTED) - list(APPEND srcs "adc_hal.c") - endif() - endif() - if(CONFIG_SOC_ECC_SUPPORTED) list(APPEND srcs "ecc_hal.c") endif() @@ -215,16 +196,6 @@ elseif(NOT BOOTLOADER_BUILD) list(APPEND srcs "ds_hal.c") endif() - if(CONFIG_SOC_TOUCH_SENSOR_SUPPORTED) - # Source files for the legacy touch hal driver - if(CONFIG_SOC_TOUCH_SENSOR_VERSION LESS 3) - list(APPEND srcs "${target}/touch_sensor_hal.c") - list(APPEND srcs "touch_sensor_hal.c") - endif() - # Source files for the new touch hal driver - list(APPEND srcs "touch_sens_hal.c") - endif() - if(CONFIG_SOC_TEMP_SENSOR_SUPPORTED) list(APPEND srcs "temperature_sensor_hal.c") endif() @@ -238,7 +209,7 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes} PRIV_INCLUDE_DIRS ${priv_include} - REQUIRES soc esp_rom + REQUIRES ${requires} PRIV_REQUIRES esp_hal_gpio LDFRAGMENTS linker.lf) diff --git a/components/hal/emac_hal.c b/components/hal/emac_hal.c index 58ee6837bc..4e1f8ac25d 100644 --- a/components/hal/emac_hal.c +++ b/components/hal/emac_hal.c @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ #include -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #include "esp_attr.h" #include "hal/emac_hal.h" #include "hal/emac_ll.h" diff --git a/components/hal/include/hal/i2s_hal.h b/components/hal/include/hal/i2s_hal.h index f67fb6fd21..fb4b2b9313 100644 --- a/components/hal/include/hal/i2s_hal.h +++ b/components/hal/include/hal/i2s_hal.h @@ -138,7 +138,7 @@ typedef struct { * @brief Init I2S hal context * * @param hal Context of the HAL layer - * @param port_id The I2S port number, the max port number is (SOC_I2S_ATTR(INST_NUM) -1) + * @param port_id The I2S port number, the max port number is (I2S_LL_GET(INST_NUM) -1) */ void i2s_hal_init(i2s_hal_context_t *hal, int port_id); diff --git a/components/hal/mpi_hal.c b/components/hal/mpi_hal.c index 42ac404522..47ccba4c56 100644 --- a/components/hal/mpi_hal.c +++ b/components/hal/mpi_hal.c @@ -5,7 +5,7 @@ */ #include "hal/mpi_hal.h" #include "hal/mpi_ll.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" size_t mpi_hal_calc_hardware_words(size_t words) { diff --git a/components/hal/sha_hal.c b/components/hal/sha_hal.c index c0225be393..6ab4068464 100644 --- a/components/hal/sha_hal.c +++ b/components/hal/sha_hal.c @@ -11,7 +11,7 @@ #include "hal/sha_hal.h" #include "hal/sha_types.h" #include "hal/sha_ll.h" -#include "soc/soc_caps_full.h" +#include "soc/soc_caps.h" #define SHA1_STATE_LEN_WORDS (160 / 32) diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt index ed6bb4f09e..29cdee1506 100644 --- a/components/soc/CMakeLists.txt +++ b/components/soc/CMakeLists.txt @@ -64,14 +64,6 @@ if(target STREQUAL "esp32") list(APPEND srcs "${target_folder}/dport_access.c") endif() -if(CONFIG_SOC_ADC_SUPPORTED) - list(APPEND srcs "${target_folder}/adc_periph.c") -endif() - -if(CONFIG_SOC_ANA_CMPR_SUPPORTED) - list(APPEND srcs "${target_folder}/ana_cmpr_periph.c") -endif() - if(CONFIG_SOC_DEBUG_PROBE_SUPPORTED) list(APPEND srcs "${target_folder}/debug_probe_periph.c") endif() @@ -96,10 +88,6 @@ if(CONFIG_SOC_ISP_SUPPORTED) list(APPEND srcs "${target}/isp_periph.c") endif() -if(CONFIG_SOC_I2S_SUPPORTED) - list(APPEND srcs "${target_folder}/i2s_periph.c") -endif() - if(CONFIG_SOC_I3C_MASTER_SUPPORTED) list(APPEND srcs "${target_folder}/i3c_master_periph.c") endif() @@ -108,10 +96,6 @@ if(CONFIG_SOC_TEMP_SENSOR_SUPPORTED) list(APPEND srcs "${target_folder}/temperature_sensor_periph.c") endif() -if(CONFIG_SOC_PARLIO_SUPPORTED) - list(APPEND srcs "${target_folder}/parlio_periph.c") -endif() - if(CONFIG_SOC_MPI_SUPPORTED) list(APPEND srcs "${target_folder}/mpi_periph.c") endif() @@ -120,20 +104,12 @@ if(CONFIG_SOC_SDMMC_HOST_SUPPORTED) list(APPEND srcs "${target_folder}/sdmmc_periph.c") endif() -if(CONFIG_SOC_TOUCH_SENSOR_SUPPORTED) - list(APPEND srcs "${target_folder}/touch_sensor_periph.c") -endif() - if(CONFIG_SOC_IEEE802154_SUPPORTED) if(NOT target STREQUAL "esp32h4") list(APPEND srcs "${target_folder}/ieee802154_periph.c") endif() endif() -if(CONFIG_SOC_DAC_SUPPORTED) - list(APPEND srcs "${target_folder}/dac_periph.c") -endif() - if(CONFIG_SOC_SDIO_SLAVE_SUPPORTED) list(APPEND srcs "${target_folder}/sdio_slave_periph.c") endif() diff --git a/components/soc/README.md b/components/soc/README.md index 111ffefc5c..54443460d6 100644 --- a/components/soc/README.md +++ b/components/soc/README.md @@ -12,7 +12,7 @@ The `soc` component provides register-level descriptions for targets supported b ## The SoC Capabilities -There are two documents describing SoC capabilities, `soc_caps.h` and `soc_caps_full.h`. The former is a public header file, and the information in it is coarse-grained. The latter is a header file for internal developers that contains fine-grained module information. To used the soc capability macros, you should use the macro functions offered by `soc/soc_caps_eval.h`. +`soc_caps.h` file describes the SoC capabilities. To used the soc capability macros, you should use the macro functions offered by `soc/soc_caps_eval.h`. | Macro function | Description | Example | |----------------|-------------|---------| diff --git a/components/soc/esp32/include/soc/soc_caps_full.h b/components/soc/esp32/include/soc/soc_caps_full.h deleted file mode 100644 index 07f93fc7cf..0000000000 --- a/components/soc/esp32/include/soc/soc_caps_full.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 2 // Number of I2S instances - -/*------------------------------- Touch Sensor ------------------------------------*/ -#define _SOC_CAPS_TOUCH_CHAN_NUM 10 // Number of touch sensor channels diff --git a/components/soc/esp32c2/include/soc/soc_caps_full.h b/components/soc/esp32c2/include/soc/soc_caps_full.h deleted file mode 100644 index ca1d6414d9..0000000000 --- a/components/soc/esp32c2/include/soc/soc_caps_full.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" diff --git a/components/soc/esp32c3/adc_periph.c b/components/soc/esp32c3/adc_periph.c deleted file mode 100644 index 06a835d233..0000000000 --- a/components/soc/esp32c3/adc_periph.c +++ /dev/null @@ -1,27 +0,0 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "soc/adc_periph.h" - -/* Store IO number corresponding to the ADC channel number. */ -const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { - /* ADC1 */ - { - ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM - }, - /* ADC2 */ - { - ADC2_CHANNEL_0_GPIO_NUM, -1, -1, -1, -1 - } -}; diff --git a/components/soc/esp32c3/include/soc/soc_caps_full.h b/components/soc/esp32c3/include/soc/soc_caps_full.h deleted file mode 100644 index 218651f471..0000000000 --- a/components/soc/esp32c3/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 39ce24737e..81ca8869a1 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -895,18 +895,6 @@ config SOC_MCPWM_SUPPORT_SLEEP_RETENTION bool default y -config SOC_PARLIO_GROUPS - int - default 1 - -config SOC_PARLIO_TX_UNITS_PER_GROUP - int - default 1 - -config SOC_PARLIO_RX_UNITS_PER_GROUP - int - default 1 - config SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH int default 8 @@ -923,22 +911,10 @@ config SOC_PARLIO_RX_CLK_SUPPORT_GATING bool default y -config SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT - bool - default y - -config SOC_PARLIO_TRANS_BIT_ALIGN - bool - default y - config SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION bool default y -config SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA - bool - default y - config SOC_PARLIO_SUPPORT_SLEEP_RETENTION bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index c2dff77186..d47fd35781 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -363,17 +363,11 @@ // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 /*-------------------------- PARLIO CAPS --------------------------------------*/ -#define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -#define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -#define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the TX unit */ #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the RX unit */ #define SOC_PARLIO_TX_CLK_SUPPORT_GATING 1 /*!< Support gating TX clock */ #define SOC_PARLIO_RX_CLK_SUPPORT_GATING 1 /*!< Support gating RX clock */ -#define SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT 1 /*!< Support output RX clock to a GPIO */ -#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ #define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission */ -#define SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA 1 /*!< Support to treat DMA EOF as TX unit EOF */ #define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */ #define SOC_PARLIO_SUPPORT_I80_LCD 1 /*!< Support to drive I80 interfaced LCD */ diff --git a/components/soc/esp32c5/include/soc/soc_caps_full.h b/components/soc/esp32c5/include/soc/soc_caps_full.h deleted file mode 100644 index 218651f471..0000000000 --- a/components/soc/esp32c5/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 67b6feabc3..fbed991bca 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -819,18 +819,6 @@ config SOC_MCPWM_SUPPORT_SLEEP_RETENTION bool default y -config SOC_PARLIO_GROUPS - int - default 1 - -config SOC_PARLIO_TX_UNITS_PER_GROUP - int - default 1 - -config SOC_PARLIO_RX_UNITS_PER_GROUP - int - default 1 - config SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH int default 16 diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index f62e33fe3a..9d7d9a70e2 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -333,9 +333,6 @@ // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 /*-------------------------- PARLIO CAPS --------------------------------------*/ -#define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -#define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -#define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 16 /*!< Number of data lines of the TX unit */ #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 16 /*!< Number of data lines of the RX unit */ #define SOC_PARLIO_TX_RX_SHARE_INTERRUPT 1 /*!< TX and RX unit share the same interrupt source number */ diff --git a/components/soc/esp32c6/include/soc/soc_caps_full.h b/components/soc/esp32c6/include/soc/soc_caps_full.h deleted file mode 100644 index 218651f471..0000000000 --- a/components/soc/esp32c6/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32c61/include/soc/soc_caps_full.h b/components/soc/esp32c61/include/soc/soc_caps_full.h deleted file mode 100644 index 7d2d31a999..0000000000 --- a/components/soc/esp32c61/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*--------------------------- I2S CAPS ----------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 751b38e9a0..531e7dcbe5 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -815,18 +815,6 @@ config SOC_MCPWM_SUPPORT_SLEEP_RETENTION bool default y -config SOC_PARLIO_GROUPS - int - default 1 - -config SOC_PARLIO_TX_UNITS_PER_GROUP - int - default 1 - -config SOC_PARLIO_RX_UNITS_PER_GROUP - int - default 1 - config SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH int default 8 @@ -843,14 +831,6 @@ config SOC_PARLIO_RX_CLK_SUPPORT_GATING bool default y -config SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT - bool - default y - -config SOC_PARLIO_TRANS_BIT_ALIGN - bool - default y - config SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 990eb88fc8..95f9864372 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -346,15 +346,10 @@ // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 /*-------------------------- PARLIO CAPS --------------------------------------*/ -#define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -#define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -#define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the TX unit */ #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the RX unit */ #define SOC_PARLIO_TX_CLK_SUPPORT_GATING 1 /*!< Support gating TX clock */ #define SOC_PARLIO_RX_CLK_SUPPORT_GATING 1 /*!< Support gating RX clock */ -#define SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT 1 /*!< Support output RX clock to a GPIO */ -#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ #define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission. Note, 1 data-width loop transmission only avliable in chip version above 1.2 */ #define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */ diff --git a/components/soc/esp32h2/include/soc/soc_caps_full.h b/components/soc/esp32h2/include/soc/soc_caps_full.h deleted file mode 100644 index 218651f471..0000000000 --- a/components/soc/esp32h2/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32h21/include/soc/soc_caps.h b/components/soc/esp32h21/include/soc/soc_caps.h index c443d606fd..e0c7ceafd5 100644 --- a/components/soc/esp32h21/include/soc/soc_caps.h +++ b/components/soc/esp32h21/include/soc/soc_caps.h @@ -332,15 +332,10 @@ // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 /*-------------------------- PARLIO CAPS --------------------------------------*/ -// #define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -// #define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -// #define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ // #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the TX unit */ // #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the RX unit */ // #define SOC_PARLIO_TX_CLK_SUPPORT_GATING 1 /*!< Support gating TX clock */ // #define SOC_PARLIO_RX_CLK_SUPPORT_GATING 1 /*!< Support gating RX clock */ -// #define SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT 1 /*!< Support output RX clock to a GPIO */ -// #define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ /*--------------------------- MPI CAPS ---------------------------------------*/ #define SOC_MPI_MEM_BLOCKS_NUM (4) diff --git a/components/soc/esp32h21/include/soc/soc_caps_full.h b/components/soc/esp32h21/include/soc/soc_caps_full.h deleted file mode 100644 index be17586fdf..0000000000 --- a/components/soc/esp32h21/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -// #define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h index 2de3ab2de1..ffffa6ce8f 100644 --- a/components/soc/esp32h4/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -342,9 +342,6 @@ // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 /*-------------------------- PARLIO CAPS --------------------------------------*/ -// #define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -// #define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -// #define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ // #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the TX unit */ // #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 8 /*!< Number of data lines of the RX unit */ diff --git a/components/soc/esp32h4/include/soc/soc_caps_full.h b/components/soc/esp32h4/include/soc/soc_caps_full.h deleted file mode 100644 index 218651f471..0000000000 --- a/components/soc/esp32h4/include/soc/soc_caps_full.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index 2583ce365a..6aafc1629d 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -1255,18 +1255,6 @@ config SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO bool default y -config SOC_PARLIO_GROUPS - int - default 1 - -config SOC_PARLIO_TX_UNITS_PER_GROUP - int - default 1 - -config SOC_PARLIO_RX_UNITS_PER_GROUP - int - default 1 - config SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH int default 16 @@ -1283,14 +1271,6 @@ config SOC_PARLIO_RX_CLK_SUPPORT_GATING bool default y -config SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT - bool - default y - -config SOC_PARLIO_TRANS_BIT_ALIGN - bool - default y - config SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION bool default y diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index f657a7e264..9f5ed1ff72 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -464,15 +464,10 @@ #define SOC_USB_UTMI_PHY_NO_POWER_OFF_ISO 1 /*-------------------------- PARLIO CAPS --------------------------------------*/ -#define SOC_PARLIO_GROUPS 1U /*!< Number of parallel IO peripherals */ -#define SOC_PARLIO_TX_UNITS_PER_GROUP 1U /*!< number of TX units in each group */ -#define SOC_PARLIO_RX_UNITS_PER_GROUP 1U /*!< number of RX units in each group */ #define SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH 16 /*!< Number of data lines of the TX unit */ #define SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH 16 /*!< Number of data lines of the RX unit */ #define SOC_PARLIO_TX_CLK_SUPPORT_GATING 1 /*!< Support gating TX clock */ #define SOC_PARLIO_RX_CLK_SUPPORT_GATING 1 /*!< Support gating RX clock */ -#define SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT 1 /*!< Support output RX clock to a GPIO */ -#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */ #define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission */ #define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */ #define SOC_PARLIO_SUPPORT_I80_LCD 1 /*!< Support to drive I80 interfaced LCD */ diff --git a/components/soc/esp32p4/include/soc/soc_caps_full.h b/components/soc/esp32p4/include/soc/soc_caps_full.h deleted file mode 100644 index 85a101a5b3..0000000000 --- a/components/soc/esp32p4/include/soc/soc_caps_full.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 3 // Number of I2S instances - -/*------------------------------- Touch Sensor ------------------------------------*/ -#define _SOC_CAPS_TOUCH_CHAN_NUM 14 // Number of touch sensor channels diff --git a/components/soc/esp32s2/include/soc/soc_caps_full.h b/components/soc/esp32s2/include/soc/soc_caps_full.h deleted file mode 100644 index def8b48e42..0000000000 --- a/components/soc/esp32s2/include/soc/soc_caps_full.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 1 // Number of I2S instances - -/*------------------------------- Touch Sensor ------------------------------------*/ -#define _SOC_CAPS_TOUCH_CHAN_NUM 15 // Number of touch sensor channels diff --git a/components/soc/esp32s2/include/soc/soc_pins.h b/components/soc/esp32s2/include/soc/soc_pins.h index 25bac07d4d..98c20ca52d 100644 --- a/components/soc/esp32s2/include/soc/soc_pins.h +++ b/components/soc/esp32s2/include/soc/soc_pins.h @@ -9,4 +9,3 @@ #include "soc/usb_pins.h" #include "soc/gpio_pins.h" #include "soc/spi_pins.h" -#include "soc/touch_sensor_pins.h" diff --git a/components/soc/esp32s2/include/soc/touch_sensor_pins.h b/components/soc/esp32s2/include/soc/touch_sensor_pins.h deleted file mode 100644 index 6ec17be72a..0000000000 --- a/components/soc/esp32s2/include/soc/touch_sensor_pins.h +++ /dev/null @@ -1,28 +0,0 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#define SOC_TOUCH_SHIELD_CHANNEL (14) /*!< The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) */ -#define SOC_TOUCH_DENOISE_CHANNEL (0) /*!< T0 is an internal channel that does not have a corresponding external GPIO. - T0 will work simultaneously with the measured channel Tn. Finally, the actual - measured value of Tn is the value after subtracting lower bits of T0. */ - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32s3/include/soc/soc_caps_full.h b/components/soc/esp32s3/include/soc/soc_caps_full.h deleted file mode 100644 index 4eb5f4edf2..0000000000 --- a/components/soc/esp32s3/include/soc/soc_caps_full.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" - -/*------------------------------- I2S ---------------------------------------*/ -// helper macros to access module attributes -#define _SOC_CAPS_I2S_INST_NUM 2 // Number of I2S instances - -/*------------------------------- Touch Sensor ------------------------------------*/ -#define _SOC_CAPS_TOUCH_CHAN_NUM 15 // Number of touch sensor channels diff --git a/components/soc/esp32s3/include/soc/soc_pins.h b/components/soc/esp32s3/include/soc/soc_pins.h index 3d84a0afb1..9d0e178422 100644 --- a/components/soc/esp32s3/include/soc/soc_pins.h +++ b/components/soc/esp32s3/include/soc/soc_pins.h @@ -16,4 +16,3 @@ #include "soc/gpio_pins.h" #include "soc/spi_pins.h" #include "soc/sdmmc_pins.h" -#include "soc/touch_sensor_pins.h" diff --git a/components/soc/esp32s3/include/soc/touch_sensor_pins.h b/components/soc/esp32s3/include/soc/touch_sensor_pins.h deleted file mode 100644 index 70046fc649..0000000000 --- a/components/soc/esp32s3/include/soc/touch_sensor_pins.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#define SOC_TOUCH_SHIELD_CHANNEL (14) /*!< The waterproof function includes a shielded channel (TOUCH_PAD_NUM14) */ -#define SOC_TOUCH_DENOISE_CHANNEL (0) /*!< T0 is an internal channel that does not have a corresponding external GPIO. - T0 will work simultaneously with the measured channel Tn. Finally, the actual - measured value of Tn is the value after subtracting lower bits of T0. */ - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/include/soc/soc_caps_eval.h b/components/soc/include/soc/soc_caps_eval.h index b078dcc94c..f5f19946f5 100644 --- a/components/soc/include/soc/soc_caps_eval.h +++ b/components/soc/include/soc/soc_caps_eval.h @@ -10,7 +10,7 @@ * SOC Capability evaluation helpers * * These macros provide a standardized way to query SOC capabilities without directly - * accessing internal implementation macros in soc_caps_full.h and public macros in soc_caps.h. + * accessing the macros in soc_caps.h. * * The main categories of macros are: * - SOC_IS : Check if the SOC is a specific target (e.g., SOC_IS(ESP32S3)) diff --git a/components/soc/linux/include/soc/soc_caps_full.h b/components/soc/linux/include/soc/soc_caps_full.h deleted file mode 100644 index ca1d6414d9..0000000000 --- a/components/soc/linux/include/soc/soc_caps_full.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc_caps.h" -#include "soc/soc_caps_eval.h" diff --git a/components/ulp/CMakeLists.txt b/components/ulp/CMakeLists.txt index 53bbed2899..9a6c0ae019 100644 --- a/components/ulp/CMakeLists.txt +++ b/components/ulp/CMakeLists.txt @@ -96,4 +96,9 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS ${includes} - REQUIRES esp_adc esp_driver_gpio esp_driver_uart esp_driver_i2s esp_hal_i2c) + REQUIRES esp_adc + esp_driver_gpio + esp_driver_uart + esp_driver_i2s + esp_hal_i2c + esp_hal_touch_sens) diff --git a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c index d026da4e45..1d0779d9b1 100644 --- a/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c +++ b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_adc.c @@ -10,7 +10,7 @@ #include "lp_core_test_app_adc.h" #include "ulp_lp_core.h" #include "ulp_lp_core_lp_adc_shared.h" -#include "soc/adc_periph.h" +#include "hal/adc_periph.h" #include "driver/gpio.h" #include "driver/rtc_io.h" #include "driver/temperature_sensor.h" diff --git a/docs/doxygen/Doxyfile b/docs/doxygen/Doxyfile index 20c2393ac2..12caa87a43 100644 --- a/docs/doxygen/Doxyfile +++ b/docs/doxygen/Doxyfile @@ -163,12 +163,16 @@ INPUT = \ $(PROJECT_PATH)/components/esp_eth/include/esp_eth.h \ $(PROJECT_PATH)/components/esp_event/include/esp_event_base.h \ $(PROJECT_PATH)/components/esp_event/include/esp_event.h \ + $(PROJECT_PATH)/components/esp_hal_ana_conv/include/hal/adc_types.h \ + $(PROJECT_PATH)/components/esp_hal_ana_conv/include/hal/dac_types.h \ $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/gpio_types.h \ $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/rtc_io_types.h \ $(PROJECT_PATH)/components/esp_hal_gpio/include/hal/sdm_types.h \ $(PROJECT_PATH)/components/esp_hal_timg/include/hal/timer_types.h \ $(PROJECT_PATH)/components/esp_hal_i2c/include/hal/i2c_types.h \ + $(PROJECT_PATH)/components/esp_hal_i2s/include/hal/i2s_types.h \ $(PROJECT_PATH)/components/esp_hal_lcd/include/hal/lcd_types.h \ + $(PROJECT_PATH)/components/esp_hal_parlio/include/hal/parlio_types.h \ $(PROJECT_PATH)/components/esp_hal_mspi/include/hal/esp_flash_err.h \ $(PROJECT_PATH)/components/esp_hal_mspi/include/hal/spi_flash_types.h \ $(PROJECT_PATH)/components/esp_hal_twai/include/hal/twai_types.h \ @@ -256,13 +260,9 @@ INPUT = \ $(PROJECT_PATH)/components/freertos/FreeRTOS-Kernel/include/freertos/stream_buffer.h \ $(PROJECT_PATH)/components/freertos/FreeRTOS-Kernel/include/freertos/task.h \ $(PROJECT_PATH)/components/freertos/FreeRTOS-Kernel/include/freertos/timers.h \ - $(PROJECT_PATH)/components/hal/include/hal/adc_types.h \ $(PROJECT_PATH)/components/hal/include/hal/color_types.h \ - $(PROJECT_PATH)/components/hal/include/hal/dac_types.h \ - $(PROJECT_PATH)/components/hal/include/hal/i2s_types.h \ $(PROJECT_PATH)/components/hal/include/hal/ledc_types.h \ $(PROJECT_PATH)/components/hal/include/hal/mcpwm_types.h \ - $(PROJECT_PATH)/components/hal/include/hal/parlio_types.h \ $(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \ $(PROJECT_PATH)/components/hal/include/hal/rmt_types.h \ $(PROJECT_PATH)/components/hal/include/hal/sdio_slave_types.h \ diff --git a/docs/en/api-reference/peripherals/dac.rst b/docs/en/api-reference/peripherals/dac.rst index 9ad78a4a5c..64684f236e 100644 --- a/docs/en/api-reference/peripherals/dac.rst +++ b/docs/en/api-reference/peripherals/dac.rst @@ -141,4 +141,4 @@ API Reference .. include-build-file:: inc/dac_cosine.inc .. include-build-file:: inc/dac_continuous.inc .. include-build-file:: inc/components/esp_driver_dac/include/driver/dac_types.inc -.. include-build-file:: inc/components/hal/include/hal/dac_types.inc +.. include-build-file:: inc/components/esp_hal_ana_conv/include/hal/dac_types.inc diff --git a/docs/en/api-reference/peripherals/i2s.rst b/docs/en/api-reference/peripherals/i2s.rst index a7bf2e424b..e6baf9f041 100644 --- a/docs/en/api-reference/peripherals/i2s.rst +++ b/docs/en/api-reference/peripherals/i2s.rst @@ -1279,4 +1279,4 @@ I2S Types ^^^^^^^^^ .. include-build-file:: inc/components/esp_driver_i2s/include/driver/i2s_types.inc -.. include-build-file:: inc/components/hal/include/hal/i2s_types.inc +.. include-build-file:: inc/components/esp_hal_i2s/include/hal/i2s_types.inc diff --git a/docs/en/api-reference/peripherals/parlio/index.rst b/docs/en/api-reference/peripherals/parlio/index.rst index 6e58d6e7d2..3620d977c0 100644 --- a/docs/en/api-reference/peripherals/parlio/index.rst +++ b/docs/en/api-reference/peripherals/parlio/index.rst @@ -20,4 +20,4 @@ API Reference ------------- .. include-build-file:: inc/components/esp_driver_parlio/include/driver/parlio_types.inc -.. include-build-file:: inc/components/hal/include/hal/parlio_types.inc +.. include-build-file:: inc/components/esp_hal_parlio/include/hal/parlio_types.inc diff --git a/docs/en/api-reference/peripherals/parlio/parlio_tx.rst b/docs/en/api-reference/peripherals/parlio/parlio_tx.rst index 5642bd67bd..8ab52acc92 100644 --- a/docs/en/api-reference/peripherals/parlio/parlio_tx.rst +++ b/docs/en/api-reference/peripherals/parlio/parlio_tx.rst @@ -321,7 +321,7 @@ The waveform of the external clock input is shown below: After writing the BitScrambler program, we can enable it by calling :cpp:func:`parlio_tx_unit_decorate_bitscrambler`. And configure the :cpp:member:`parlio_transmit_config_t::bitscrambler_program` to point to the binary file of the BitScrambler program. Different transmission transactions can use different BitScrambler programs. The binary file must conform to the BitScrambler assembly language specification, and will be loaded into the BitScrambler's instruction memory at runtime. For details on how to write and compile the BitScrambler program, please refer to :doc:`BitScrambler Programming Guide `. - .. only:: not SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA + .. only:: esp32p4 .. note:: diff --git a/docs/zh_CN/api-reference/peripherals/dac.rst b/docs/zh_CN/api-reference/peripherals/dac.rst index fae7eed846..800f6fac43 100644 --- a/docs/zh_CN/api-reference/peripherals/dac.rst +++ b/docs/zh_CN/api-reference/peripherals/dac.rst @@ -141,4 +141,4 @@ API 参考 .. include-build-file:: inc/dac_cosine.inc .. include-build-file:: inc/dac_continuous.inc .. include-build-file:: inc/components/esp_driver_dac/include/driver/dac_types.inc -.. include-build-file:: inc/components/hal/include/hal/dac_types.inc +.. include-build-file:: inc/components/esp_hal_ana_conv/include/hal/dac_types.inc diff --git a/docs/zh_CN/api-reference/peripherals/i2s.rst b/docs/zh_CN/api-reference/peripherals/i2s.rst index 1824b62c44..73fcd0c883 100644 --- a/docs/zh_CN/api-reference/peripherals/i2s.rst +++ b/docs/zh_CN/api-reference/peripherals/i2s.rst @@ -1279,4 +1279,4 @@ I2S 类型 ^^^^^^^^ .. include-build-file:: inc/components/esp_driver_i2s/include/driver/i2s_types.inc -.. include-build-file:: inc/components/hal/include/hal/i2s_types.inc +.. include-build-file:: inc/components/esp_hal_i2s/include/hal/i2s_types.inc diff --git a/docs/zh_CN/api-reference/peripherals/parlio/index.rst b/docs/zh_CN/api-reference/peripherals/parlio/index.rst index fbc47058e2..10f27e3032 100644 --- a/docs/zh_CN/api-reference/peripherals/parlio/index.rst +++ b/docs/zh_CN/api-reference/peripherals/parlio/index.rst @@ -20,4 +20,4 @@ API 参考 ------------- .. include-build-file:: inc/components/esp_driver_parlio/include/driver/parlio_types.inc -.. include-build-file:: inc/components/hal/include/hal/parlio_types.inc +.. include-build-file:: inc/components/esp_hal_parlio/include/hal/parlio_types.inc diff --git a/docs/zh_CN/api-reference/peripherals/parlio/parlio_tx.rst b/docs/zh_CN/api-reference/peripherals/parlio/parlio_tx.rst index a55c531859..82e280e59e 100644 --- a/docs/zh_CN/api-reference/peripherals/parlio/parlio_tx.rst +++ b/docs/zh_CN/api-reference/peripherals/parlio/parlio_tx.rst @@ -321,7 +321,7 @@ TX 单元可以选择各种不同的时钟源，其中外部时钟源较为特 编写好比特调节器程序后，通过调用 :cpp:func:`parlio_tx_unit_decorate_bitscrambler` 启用比特调节器。并在 :cpp:member:`parlio_transmit_config_t::bitscrambler_program` 配置本次传输使用比特调节器程序的二进制文件。不同的传输事务可以使用不同的比特调节器程序。该二进制文件必须符合比特调节器的汇编语言规范，并且在运行时会被加载到比特调节器的指令存储器中。如何编写并编译比特调节器程序请参考 :doc:`比特调节器编程指南 `。 - .. only:: not SOC_PARLIO_TX_SUPPORT_EOF_FROM_DMA + .. only:: esp32p4 .. note:: diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index e8ca3ecec9..3574843ec5 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -461,7 +461,6 @@ components/fatfs/src/ff.h components/fatfs/src/ffconf.h components/fatfs/src/ffsystem.c components/fatfs/src/ffunicode.c -components/hal/include/hal/dac_types.h components/hal/spi_slave_hal.c components/hal/spi_slave_hal_iram.c components/idf_test/include/idf_performance.h @@ -496,7 +495,6 @@ components/soc/esp32s2/include/soc/fe_reg.h components/soc/esp32s2/include/soc/memprot_defs.h components/soc/esp32s2/include/soc/nrx_reg.h components/soc/esp32s2/include/soc/soc_ulp.h -components/soc/esp32s2/include/soc/touch_sensor_pins.h components/spi_flash/include/spi_flash_chip_generic.h components/spi_flash/spi_flash_chip_boya.c components/spi_flash/spi_flash_chip_issi.c diff --git a/tools/test_apps/system/g1_components/CMakeLists.txt b/tools/test_apps/system/g1_components/CMakeLists.txt index 0332fdf590..3aec4b7cb1 100644 --- a/tools/test_apps/system/g1_components/CMakeLists.txt +++ b/tools/test_apps/system/g1_components/CMakeLists.txt @@ -6,7 +6,27 @@ cmake_minimum_required(VERSION 3.22) set(g0_components soc hal esp_common esp_rom) # also , i.e. xtensa or riscv, will be added below set(g1_components spi_flash freertos log heap esp_libc esp_system esp_hw_support esp_mm esp_stdio) -set(COMPONENTS ${g0_components} ${g1_components} main) +# The HAL components that required by G1 components +# Most of these HAL components are required by `clk.c` in `esp_system` for peripherals clock initialization. +set(esp_hal_components + esp_hal_ana_conv + esp_hal_cam + esp_hal_dma + esp_hal_gpio + esp_hal_i2c + esp_hal_i2s + esp_hal_lcd + esp_hal_mcpwm + esp_hal_mspi + esp_hal_parlio + esp_hal_pcnt + esp_hal_timg + esp_hal_touch_sens + esp_hal_twai + esp_hal_usb + esp_hal_wdt +) +set(COMPONENTS ${g0_components} ${g1_components} ${esp_hal_components} main) include($ENV{IDF_PATH}/tools/cmake/project.cmake) @@ -18,17 +38,6 @@ set(extra_allowed_components ${CONFIG_IDF_TARGET_ARCH} ) -# Since esp_hal_* components are split from original hal component, so we can allow they are g1 components. -# But in the future, esp_hal_* components should be removed from common build. IDF-13980 -file(GLOB esp_hal_component_dirs "${idf_path}/components/esp_hal_*") -set(esp_hal_components "") -foreach(hal_dir ${esp_hal_component_dirs}) - if(IS_DIRECTORY ${hal_dir} AND EXISTS "${hal_dir}/CMakeLists.txt") - get_filename_component(hal_name ${hal_dir} NAME) - list(APPEND esp_hal_components ${hal_name}) - endif() -endforeach() - # These components are currently included into "G1" build, but shouldn't. # After removing the extra dependencies, remove the components from this list as well. set(extra_components_which_shouldnt_be_included @@ -118,7 +127,6 @@ set(expected_components ${COMPONENTS} ${extra_allowed_components} ${extra_components_which_shouldnt_be_included} - ${esp_hal_components} ) list(SORT expected_components)