From 9c9f884f3a3498911e339ea085b3fa23735e45fb Mon Sep 17 00:00:00 2001
From: liuning <liuning@espressif.com>
Date: Sat, 11 Oct 2025 11:43:39 +0800
Subject: [PATCH] bugfix(wifi): fix incomplete phy initialization due to
 absence of bb clocks at coexistence scenarios

---
 .../include/esp_private/periph_ctrl.h         | 14 ++++
 components/esp_hw_support/modem_clock.c       | 17 ++++-
 components/esp_hw_support/periph_ctrl.c       | 69 ++++++++++++++++++-
 components/esp_phy/src/phy_init.c             | 24 +------
 components/esp_phy/src/phy_init_esp32hxx.c    |  3 +
 .../hal/esp32/include/hal/clk_gate_ll.h       | 10 +++
 .../hal/esp32c2/include/hal/clk_gate_ll.h     | 12 ++++
 .../hal/esp32c3/include/hal/clk_gate_ll.h     | 12 ++++
 .../hal/esp32s2/include/hal/clk_gate_ll.h     | 12 ++++
 .../hal/esp32s3/include/hal/clk_gate_ll.h     | 12 ++++
 .../soc/esp32/include/soc/periph_defs.h       |  1 +
 .../soc/esp32c2/include/soc/periph_defs.h     |  1 +
 .../soc/esp32c2/register/soc/syscon_reg.h     |  2 +
 .../soc/esp32c3/include/soc/periph_defs.h     |  1 +
 .../soc/esp32c3/register/soc/syscon_reg.h     |  2 +
 .../soc/esp32c6/include/soc/periph_defs.h     |  3 +-
 .../soc/esp32h2/include/soc/periph_defs.h     |  3 +-
 .../soc/esp32h21/include/soc/periph_defs.h    |  3 +-
 .../soc/esp32h4/include/soc/periph_defs.h     |  3 +-
 .../soc/esp32s2/include/soc/periph_defs.h     |  1 +
 .../soc/esp32s2/register/soc/syscon_reg.h     |  3 +
 .../soc/esp32s3/include/soc/periph_defs.h     |  1 +
 .../soc/esp32s3/register/soc/syscon_reg.h     |  2 +
 23 files changed, 180 insertions(+), 31 deletions(-)

diff --git a/components/esp_hw_support/include/esp_private/periph_ctrl.h b/components/esp_hw_support/include/esp_private/periph_ctrl.h
index 005001e035..8668bf0e39 100644
--- a/components/esp_hw_support/include/esp_private/periph_ctrl.h
+++ b/components/esp_hw_support/include/esp_private/periph_ctrl.h
@@ -153,6 +153,20 @@ void wifi_module_enable(void);
  */
 void wifi_module_disable(void);
 
+/**
+ * @brief Enable phy module by un-gating related clock and de-asserting the reset signal.
+ *
+ * @note This function acquires clocks required during the PHY enable sequence.
+ */
+void phy_module_enable(void);
+
+/**
+ * @brief Disable phy module by gating related clock and asserting the reset signal.
+ *
+ * @note This function releases clocks required during the PHY enable sequence.
+ */
+void phy_module_disable(void);
+
 #undef __PERIPH_CTRL_DEPRECATE_ATTR
 
 #ifdef __cplusplus
diff --git a/components/esp_hw_support/modem_clock.c b/components/esp_hw_support/modem_clock.c
index 7d01c98640..8e1cc753af 100644
--- a/components/esp_hw_support/modem_clock.c
+++ b/components/esp_hw_support/modem_clock.c
@@ -312,8 +312,21 @@ void IRAM_ATTR modem_clock_module_mac_reset(shared_periph_module_t module)
 #define MODEM_ETM_CLOCK_DEPS    (BIT(MODEM_CLOCK_ETM))
 #define MODEM_ADC_COMMON_FE_CLOCK_DEPS  (BIT(MODEM_CLOCK_MODEM_ADC_COMMON_FE))
 #if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
-#define PHY_CALIBRATION_CLOCK_DEPS      (BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB_44M))
+#define PHY_CALIBRATION_WIFI_CLOCK_DEPS     (BIT(MODEM_CLOCK_WIFI_MAC) | BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB) | BIT(MODEM_CLOCK_WIFI_BB_44M))
+#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS (BIT(MODEM_CLOCK_WIFI_APB) | BIT(MODEM_CLOCK_WIFI_BB_44M) | BIT(MODEM_CLOCK_BT_I154_COMMON_BB))
+#else
+#define PHY_CALIBRATION_WIFI_CLOCK_DEPS     (BIT(MODEM_CLOCK_WIFI_MAC) | BIT(MODEM_CLOCK_WIFI_BB))
+#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS (BIT(MODEM_CLOCK_BT_I154_COMMON_BB))
 #endif
+#ifndef SOC_WIFI_SUPPORTED
+#undef  PHY_CALIBRATION_WIFI_CLOCK_DEPS
+#define PHY_CALIBRATION_WIFI_CLOCK_DEPS     0
+#endif
+#if !defined(SOC_BT_SUPPORTED) && !defined(SOC_IEEE802154_SUPPORTED)
+#undef  PHY_CALIBRATION_BT_I154_CLOCK_DEPS
+#define PHY_CALIBRATION_BT_I154_CLOCK_DEPS 0
+#endif
+#define PHY_CALIBRATION_CLOCK_DEPS          (PHY_CALIBRATION_WIFI_CLOCK_DEPS | PHY_CALIBRATION_BT_I154_CLOCK_DEPS)
 
 static IRAM_ATTR uint32_t modem_clock_get_module_deps(shared_periph_module_t module)
 {
@@ -331,9 +344,7 @@ static IRAM_ATTR uint32_t modem_clock_get_module_deps(shared_periph_module_t mod
 #if SOC_BT_SUPPORTED
         case PERIPH_BT_MODULE:                  deps = BLE_CLOCK_DEPS;                  break;
 #endif
-#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
         case PERIPH_PHY_CALIBRATION_MODULE:     deps = PHY_CALIBRATION_CLOCK_DEPS;      break;
-#endif
 #if SOC_IEEE802154_SUPPORTED
         case PERIPH_IEEE802154_MODULE:          deps = IEEE802154_CLOCK_DEPS;           break;
 #endif
diff --git a/components/esp_hw_support/periph_ctrl.c b/components/esp_hw_support/periph_ctrl.c
index 61c1553862..d12d53c11f 100644
--- a/components/esp_hw_support/periph_ctrl.c
+++ b/components/esp_hw_support/periph_ctrl.c
@@ -131,7 +131,10 @@ void wifi_module_enable(void)
     modem_clock_module_enable(PERIPH_WIFI_MODULE);
 #else
     esp_os_enter_critical_safe(&periph_spinlock);
-    periph_ll_wifi_module_enable_clk_clear_rst();
+    if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
+        periph_ll_wifi_module_enable_clk_clear_rst();
+    }
+    ref_counts[PERIPH_WIFI_MODULE]++;
     esp_os_exit_critical_safe(&periph_spinlock);
 #endif
 }
@@ -142,8 +145,70 @@ void wifi_module_disable(void)
     modem_clock_module_disable(PERIPH_WIFI_MODULE);
 #else
     esp_os_enter_critical_safe(&periph_spinlock);
-    periph_ll_wifi_module_disable_clk_set_rst();
+    ref_counts[PERIPH_WIFI_MODULE]--;
+    if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
+        periph_ll_wifi_module_disable_clk_set_rst();
+    }
     esp_os_exit_critical_safe(&periph_spinlock);
 #endif
 }
 #endif // CONFIG_ESP_WIFI_ENABLED
+
+#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED
+// PERIPH_WIFI_BT_COMMON_MODULE is enabled outside
+IRAM_ATTR void phy_module_enable(void)
+{
+#if SOC_MODEM_CLOCK_IS_INDEPENDENT
+    modem_clock_module_enable(PERIPH_PHY_CALIBRATION_MODULE);
+#else
+    esp_os_enter_critical_safe(&periph_spinlock);
+#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
+    periph_ll_phy_calibration_module_enable_clk_clear_rst();
+    if (ref_counts[PERIPH_RNG_MODULE] == 0) {
+        periph_ll_enable_clk_clear_rst(PERIPH_RNG_MODULE);
+    }
+    ref_counts[PERIPH_RNG_MODULE]++;
+#endif
+#if SOC_WIFI_SUPPORTED
+    if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
+        periph_ll_wifi_module_enable_clk_clear_rst();
+    }
+    ref_counts[PERIPH_WIFI_MODULE]++;
+#endif
+#if SOC_BT_SUPPORTED
+    if (ref_counts[PERIPH_BT_MODULE] == 0) {
+        periph_ll_enable_clk_clear_rst(PERIPH_BT_MODULE);
+    }
+    ref_counts[PERIPH_BT_MODULE]++;
+#endif
+    esp_os_exit_critical_safe(&periph_spinlock);
+#endif
+}
+
+// PERIPH_WIFI_BT_COMMON_MODULE is disabled outside
+IRAM_ATTR void phy_module_disable(void)
+{
+#if SOC_MODEM_CLOCK_IS_INDEPENDENT
+    modem_clock_module_disable(PERIPH_PHY_CALIBRATION_MODULE);
+#else
+    esp_os_enter_critical_safe(&periph_spinlock);
+#if SOC_BT_SUPPORTED
+    ref_counts[PERIPH_BT_MODULE]--;
+    if (ref_counts[PERIPH_BT_MODULE] == 0) {
+        periph_ll_disable_clk_set_rst(PERIPH_BT_MODULE);
+    }
+#endif
+#if SOC_WIFI_SUPPORTED
+    ref_counts[PERIPH_WIFI_MODULE]--;
+    if (ref_counts[PERIPH_WIFI_MODULE] == 0) {
+        periph_ll_wifi_module_disable_clk_set_rst();
+    }
+#endif
+#if SOC_WIFI_SUPPORTED || SOC_BT_SUPPORTED
+    // Do not disable PHY clock and RNG clock
+    ref_counts[PERIPH_RNG_MODULE]--;
+#endif
+    esp_os_exit_critical_safe(&periph_spinlock);
+#endif
+}
+#endif  //#if SOC_BT_SUPPORTED || SOC_WIFI_SUPPORTED || SOC_IEEE802154_SUPPORTED
diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index 5a3858ebe6..4d97c1ebc0 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -272,22 +272,6 @@ IRAM_ATTR void esp_phy_common_clock_disable(void)
     wifi_bt_common_module_disable();
 }
 
-#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
-IRAM_ATTR void esp_phy_calibration_clock_enable(esp_phy_modem_t modem)
-{
-    if (modem == PHY_MODEM_BT || modem == PHY_MODEM_IEEE802154) {
-        modem_clock_module_enable(PERIPH_PHY_CALIBRATION_MODULE);
-    }
-}
-
-IRAM_ATTR void esp_phy_calibration_clock_disable(esp_phy_modem_t modem)
-{
-    if (modem == PHY_MODEM_BT || modem == PHY_MODEM_IEEE802154) {
-        modem_clock_module_disable(PERIPH_PHY_CALIBRATION_MODULE);
-    }
-}
-#endif
-
 #if SOC_PM_MODEM_RETENTION_BY_BACKUPDMA
 static inline void phy_digital_regs_store(void)
 {
@@ -316,9 +300,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
         phy_update_wifi_mac_time(false, s_phy_rf_en_ts);
 #endif
         esp_phy_common_clock_enable();
-#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
-        esp_phy_calibration_clock_enable(modem);
-#endif
+        phy_module_enable();
         if (s_is_phy_calibrated == false) {
             esp_phy_load_cal_and_init();
             s_is_phy_calibrated = true;
@@ -360,9 +342,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
             phy_ant_update();
             phy_ant_clr_update_flag();
         }
-#if SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT
-        esp_phy_calibration_clock_disable(modem);
-#endif
+        phy_module_disable();
     }
     phy_set_modem_flag(modem);
 #if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_ESP_PHY_DISABLE_PLL_TRACK
diff --git a/components/esp_phy/src/phy_init_esp32hxx.c b/components/esp_phy/src/phy_init_esp32hxx.c
index a3de469155..83000c57a9 100644
--- a/components/esp_phy/src/phy_init_esp32hxx.c
+++ b/components/esp_phy/src/phy_init_esp32hxx.c
@@ -9,6 +9,7 @@
 #include "esp_phy_init.h"
 #include "esp_private/phy.h"
 #include "esp_timer.h"
+#include "esp_private/periph_ctrl.h"
 
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
 #include "esp_private/esp_modem_clock.h"
@@ -106,6 +107,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
 #if SOC_MODEM_CLOCK_IS_INDEPENDENT
         modem_clock_module_enable(PERIPH_PHY_MODULE);
 #endif
+        phy_module_enable();
         if (!s_phy_is_enabled) {
             register_chipv7_phy(NULL, NULL, PHY_RF_CAL_FULL);
             phy_version_print();
@@ -116,6 +118,7 @@ void esp_phy_enable(esp_phy_modem_t modem)
 #if !CONFIG_ESP_PHY_DISABLE_PLL_TRACK
         phy_track_pll_init();
 #endif
+        phy_module_disable();
     }
     phy_set_modem_flag(modem);
     // Immediately track pll when phy enabled.
diff --git a/components/hal/esp32/include/hal/clk_gate_ll.h b/components/hal/esp32/include/hal/clk_gate_ll.h
index b5071a5749..9e5509ccce 100644
--- a/components/hal/esp32/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32/include/hal/clk_gate_ll.h
@@ -158,6 +158,16 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
     DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
+static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
+{
+    // No clock bit only for phy calibration on ESP32
+}
+
+static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
+{
+    // No clock bit only for phy calibration on ESP32
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32c2/include/hal/clk_gate_ll.h b/components/hal/esp32c2/include/hal/clk_gate_ll.h
index 6795cc8b2d..f302a02cc8 100644
--- a/components/hal/esp32c2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32c2/include/hal/clk_gate_ll.h
@@ -131,6 +131,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
     DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
+static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32c3/include/hal/clk_gate_ll.h b/components/hal/esp32c3/include/hal/clk_gate_ll.h
index 8fae92f31b..30db324b5d 100644
--- a/components/hal/esp32c3/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32c3/include/hal/clk_gate_ll.h
@@ -144,6 +144,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
     DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
+static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32s2/include/hal/clk_gate_ll.h b/components/hal/esp32s2/include/hal/clk_gate_ll.h
index 37462735aa..2d8008c01e 100644
--- a/components/hal/esp32s2/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32s2/include/hal/clk_gate_ll.h
@@ -140,6 +140,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
     DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
 }
 
+static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_PHY_EN_M);
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_PHY_EN_M);
+    DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, 0);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32s3/include/hal/clk_gate_ll.h b/components/hal/esp32s3/include/hal/clk_gate_ll.h
index afa103303d..d92406aa03 100644
--- a/components/hal/esp32s3/include/hal/clk_gate_ll.h
+++ b/components/hal/esp32s3/include/hal/clk_gate_ll.h
@@ -153,6 +153,18 @@ static inline void periph_ll_wifi_module_disable_clk_set_rst(void)
     DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
 }
 
+static inline void periph_ll_phy_calibration_module_enable_clk_clear_rst(void)
+{
+    DPORT_SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
+static inline void periph_ll_phy_calibration_module_disable_clk_set_rst(void)
+{
+    DPORT_CLEAR_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_PHY_EN_M);
+    DPORT_SET_PERI_REG_MASK(SYSTEM_CORE_RST_EN_REG, 0);
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/soc/esp32/include/soc/periph_defs.h b/components/soc/esp32/include/soc/periph_defs.h
index f76453d92b..9274f0ce79 100644
--- a/components/soc/esp32/include/soc/periph_defs.h
+++ b/components/soc/esp32/include/soc/periph_defs.h
@@ -25,6 +25,7 @@ typedef enum {
     PERIPH_BT_MODULE,
     PERIPH_WIFI_BT_COMMON_MODULE,
     PERIPH_BT_BASEBAND_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
 } shared_periph_module_t;
 
diff --git a/components/soc/esp32c2/include/soc/periph_defs.h b/components/soc/esp32c2/include/soc/periph_defs.h
index 23665dd317..cdf1ea3835 100644
--- a/components/soc/esp32c2/include/soc/periph_defs.h
+++ b/components/soc/esp32c2/include/soc/periph_defs.h
@@ -20,6 +20,7 @@ typedef enum {
     PERIPH_BT_MODULE,
     PERIPH_WIFI_BT_COMMON_MODULE,
     PERIPH_SYSTIMER_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
 } shared_periph_module_t;
 
diff --git a/components/soc/esp32c2/register/soc/syscon_reg.h b/components/soc/esp32c2/register/soc/syscon_reg.h
index 3bebe8268e..2f3732609a 100644
--- a/components/soc/esp32c2/register/soc/syscon_reg.h
+++ b/components/soc/esp32c2/register/soc/syscon_reg.h
@@ -178,6 +178,8 @@ extern "C" {
 #define SYSTEM_WIFI_CLK_BT_EN_S  0
 /* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
 #define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
+/* Mask for clock bits used by phy calibration, bit 22, 29, 30, 31 */
+#define SYSTEM_WIFI_CLK_PHY_EN_M    0xE0400000
 
 /* Digital team to check */
 //bluetooth baseband bit11
diff --git a/components/soc/esp32c3/include/soc/periph_defs.h b/components/soc/esp32c3/include/soc/periph_defs.h
index d97ccd4239..4d8771e3a8 100644
--- a/components/soc/esp32c3/include/soc/periph_defs.h
+++ b/components/soc/esp32c3/include/soc/periph_defs.h
@@ -22,6 +22,7 @@ typedef enum {
     PERIPH_BT_MODULE,
     PERIPH_WIFI_BT_COMMON_MODULE,
     PERIPH_SYSTIMER_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
 } shared_periph_module_t;
 
diff --git a/components/soc/esp32c3/register/soc/syscon_reg.h b/components/soc/esp32c3/register/soc/syscon_reg.h
index 8c6103aee2..8e63e6b0c3 100644
--- a/components/soc/esp32c3/register/soc/syscon_reg.h
+++ b/components/soc/esp32c3/register/soc/syscon_reg.h
@@ -177,6 +177,8 @@ extern "C" {
 #define SYSTEM_WIFI_CLK_BT_EN_S  0
 /* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
 #define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
+/* Mask for clock bits used by phy calibration, bit 22 */
+#define SYSTEM_WIFI_CLK_PHY_EN_M    0x400000
 
 /* Digital team to check */
 //bluetooth baseband bit11
diff --git a/components/soc/esp32c6/include/soc/periph_defs.h b/components/soc/esp32c6/include/soc/periph_defs.h
index 7ded3cfb17..e2cf08c8f7 100644
--- a/components/soc/esp32c6/include/soc/periph_defs.h
+++ b/components/soc/esp32c6/include/soc/periph_defs.h
@@ -36,12 +36,13 @@ typedef enum {
     PERIPH_ANA_I2C_MASTER_MODULE,
     PERIPH_MODEM_ETM_MODULE,
     PERIPH_MODEM_ADC_COMMON_FE_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
     /*  !!! Don't append soc modules here !!! */
 } shared_periph_module_t;
 
 #define PERIPH_MODEM_MODULE_MIN PERIPH_WIFI_MODULE
-#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
+#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
 #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
 #define IS_MODEM_MODULE(periph)  ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
 
diff --git a/components/soc/esp32h2/include/soc/periph_defs.h b/components/soc/esp32h2/include/soc/periph_defs.h
index ad7183462e..7b3a440ba2 100644
--- a/components/soc/esp32h2/include/soc/periph_defs.h
+++ b/components/soc/esp32h2/include/soc/periph_defs.h
@@ -34,12 +34,13 @@ typedef enum {
     PERIPH_ANA_I2C_MASTER_MODULE,
     PERIPH_MODEM_ETM_MODULE,
     PERIPH_MODEM_ADC_COMMON_FE_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
     /*  !!! Don't append soc modules here !!! */
 } shared_periph_module_t;
 
 #define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
-#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
+#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
 #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
 #define IS_MODEM_MODULE(periph)  ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
 
diff --git a/components/soc/esp32h21/include/soc/periph_defs.h b/components/soc/esp32h21/include/soc/periph_defs.h
index 798e342ebc..b0d4a22e18 100644
--- a/components/soc/esp32h21/include/soc/periph_defs.h
+++ b/components/soc/esp32h21/include/soc/periph_defs.h
@@ -26,12 +26,13 @@ typedef enum {
     PERIPH_ANA_I2C_MASTER_MODULE,
     PERIPH_MODEM_ETM_MODULE,
     PERIPH_MODEM_ADC_COMMON_FE_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
     /*  !!! Don't append soc modules here !!! */
 } shared_periph_module_t;
 
 #define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
-#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
+#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
 #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
 #define IS_MODEM_MODULE(periph)  ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
 
diff --git a/components/soc/esp32h4/include/soc/periph_defs.h b/components/soc/esp32h4/include/soc/periph_defs.h
index f047baf829..c0d692be42 100644
--- a/components/soc/esp32h4/include/soc/periph_defs.h
+++ b/components/soc/esp32h4/include/soc/periph_defs.h
@@ -26,12 +26,13 @@ typedef enum {
     PERIPH_ANA_I2C_MASTER_MODULE,
     PERIPH_MODEM_ETM_MODULE,
     PERIPH_MODEM_ADC_COMMON_FE_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
     /*  !!! Don't append soc modules here !!! */
 } shared_periph_module_t;
 
 #define PERIPH_MODEM_MODULE_MIN PERIPH_BT_MODULE
-#define PERIPH_MODEM_MODULE_MAX PERIPH_MODEM_ADC_COMMON_FE_MODULE
+#define PERIPH_MODEM_MODULE_MAX PERIPH_PHY_CALIBRATION_MODULE
 #define PERIPH_MODEM_MODULE_NUM (PERIPH_MODEM_MODULE_MAX - PERIPH_MODEM_MODULE_MIN + 1)
 #define IS_MODEM_MODULE(periph)  ((periph>=PERIPH_MODEM_MODULE_MIN) && (periph<=PERIPH_MODEM_MODULE_MAX))
 
diff --git a/components/soc/esp32s2/include/soc/periph_defs.h b/components/soc/esp32s2/include/soc/periph_defs.h
index 55fe0ec19e..933356b1f8 100644
--- a/components/soc/esp32s2/include/soc/periph_defs.h
+++ b/components/soc/esp32s2/include/soc/periph_defs.h
@@ -22,6 +22,7 @@ typedef enum {
     PERIPH_WIFI_MODULE,
     PERIPH_WIFI_BT_COMMON_MODULE,
     PERIPH_SYSTIMER_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
 } shared_periph_module_t;
 
diff --git a/components/soc/esp32s2/register/soc/syscon_reg.h b/components/soc/esp32s2/register/soc/syscon_reg.h
index 129ac57f2b..8af2536372 100644
--- a/components/soc/esp32s2/register/soc/syscon_reg.h
+++ b/components/soc/esp32s2/register/soc/syscon_reg.h
@@ -445,6 +445,9 @@ extern "C" {
 /* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
 #define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
 #define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M
+/* Mask for clock bits used by phy calibration, bit 22 */
+#define SYSTEM_WIFI_CLK_PHY_EN_M    0x400000
+#define DPORT_WIFI_CLK_PHY_EN_M     SYSTEM_WIFI_CLK_PHY_EN_M
 
 /* Digital team to check */
 //bluetooth baseband bit11
diff --git a/components/soc/esp32s3/include/soc/periph_defs.h b/components/soc/esp32s3/include/soc/periph_defs.h
index 24b7ddf0eb..7056074291 100644
--- a/components/soc/esp32s3/include/soc/periph_defs.h
+++ b/components/soc/esp32s3/include/soc/periph_defs.h
@@ -24,6 +24,7 @@ typedef enum {
     PERIPH_BT_MODULE,
     PERIPH_WIFI_BT_COMMON_MODULE,
     PERIPH_SYSTIMER_MODULE,
+    PERIPH_PHY_CALIBRATION_MODULE,
     PERIPH_MODULE_MAX
 } shared_periph_module_t;
 
diff --git a/components/soc/esp32s3/register/soc/syscon_reg.h b/components/soc/esp32s3/register/soc/syscon_reg.h
index 75a58fcdb5..edddc0302c 100644
--- a/components/soc/esp32s3/register/soc/syscon_reg.h
+++ b/components/soc/esp32s3/register/soc/syscon_reg.h
@@ -178,6 +178,8 @@ extern "C" {
 #define SYSTEM_WIFI_CLK_BT_EN_S  0
 /* Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7, 8, 9, 10, 19, 20, 21, 22, 23 */
 #define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x78078F
+/* Mask for clock bits used by phy calibration, bit 22 */
+#define SYSTEM_WIFI_CLK_PHY_EN_M    0x400000
 
 //bluetooth baseband bit11
 #define SYSTEM_BT_BASEBAND_EN BIT(11)