From a4b817d0fe6b527a4526ce7b8a87fd889447395f Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Fri, 3 Apr 2026 17:21:11 +0800 Subject: [PATCH] fix(cpu): fix CSR_PRV_MODE not defined for S31 --- components/riscv/include/riscv/csr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/riscv/include/riscv/csr.h b/components/riscv/include/riscv/csr.h index cbb8773da1..04c72e1a88 100644 --- a/components/riscv/include/riscv/csr.h +++ b/components/riscv/include/riscv/csr.h @@ -205,7 +205,7 @@ extern "C" { /* Espressif's custom CSR for the current privilege mode */ #if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 #define CSR_PRV_MODE 0xC10 -#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4 +#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32S31 #define CSR_PRV_MODE 0x810 #endif