From a85c62eacbf1c46fbf6c993f89ff88f14d647106 Mon Sep 17 00:00:00 2001 From: Song Ruo Jing Date: Wed, 11 Feb 2026 21:07:16 +0800 Subject: [PATCH] fix(uart): tx write bytes fails to use non-default tx fifo empty threshold Users may see tx write bytes fails to feed data into tx fifo in time even if the tx fifo empty threshold has been set to a large value. --- components/esp_driver_uart/include/driver/uart.h | 10 +++++----- components/esp_driver_uart/src/uart.c | 9 ++++++--- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/components/esp_driver_uart/include/driver/uart.h b/components/esp_driver_uart/include/driver/uart.h index 1c6623a597..cf30c9ada3 100644 --- a/components/esp_driver_uart/include/driver/uart.h +++ b/components/esp_driver_uart/include/driver/uart.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -364,7 +364,7 @@ esp_err_t uart_enable_rx_intr(uart_port_t uart_num); esp_err_t uart_disable_rx_intr(uart_port_t uart_num); /** - * @brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT) + * @brief Disable UART TX interrupt (TX_FIFO_EMPTY INTERRUPT) * * @param uart_num UART port number * @@ -375,11 +375,11 @@ esp_err_t uart_disable_rx_intr(uart_port_t uart_num); esp_err_t uart_disable_tx_intr(uart_port_t uart_num); /** - * @brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT) + * @brief Enable UART TX interrupt (TX_FIFO_EMPTY INTERRUPT) * * @param uart_num UART port number, the max port number is (UART_NUM_MAX -1). - * @param enable 1: enable; 0: disable - * @param thresh Threshold of TX interrupt, 0 ~ UART_HW_FIFO_LEN(uart_num) + * @param enable Set to 1 to enable the interrupt + * @param thresh Threshold of TX FIFO empty interrupt, 0 ~ UART_HW_FIFO_LEN(uart_num). If -1 is given, threshold configuration will be skipped. * * @return * - ESP_OK Success diff --git a/components/esp_driver_uart/src/uart.c b/components/esp_driver_uart/src/uart.c index eddd248928..9ecca3abaa 100644 --- a/components/esp_driver_uart/src/uart.c +++ b/components/esp_driver_uart/src/uart.c @@ -693,11 +693,14 @@ esp_err_t uart_disable_tx_intr(uart_port_t uart_num) esp_err_t uart_enable_tx_intr(uart_port_t uart_num, int enable, int thresh) { + (void)enable; ESP_RETURN_ON_FALSE((uart_num < UART_NUM_MAX), ESP_FAIL, UART_TAG, "uart_num error"); ESP_RETURN_ON_FALSE((thresh < UART_HW_FIFO_LEN(uart_num)), ESP_FAIL, UART_TAG, "empty intr threshold error"); uart_hal_clr_intsts_mask(&(uart_context[uart_num].hal), UART_INTR_TXFIFO_EMPTY); UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock)); - uart_hal_set_txfifo_empty_thr(&(uart_context[uart_num].hal), thresh); + if (thresh != -1) { + uart_hal_set_txfifo_empty_thr(&(uart_context[uart_num].hal), thresh); + } uart_hal_ena_intr_mask(&(uart_context[uart_num].hal), UART_INTR_TXFIFO_EMPTY); UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock)); return ESP_OK; @@ -1651,7 +1654,7 @@ static int uart_tx_all(uart_port_t uart_num, const char *src, size_t size, bool xRingbufferSend(p_uart_obj[uart_num]->tx_ring_buf, (void *)(src + offset), send_size, portMAX_DELAY); size -= send_size; offset += send_size; - uart_enable_tx_intr(uart_num, 1, UART_THRESHOLD_NUM(uart_num, UART_EMPTY_THRESH_DEFAULT)); + uart_enable_tx_intr(uart_num, 1, -1); } } } else { @@ -1661,7 +1664,7 @@ static int uart_tx_all(uart_port_t uart_num, const char *src, size_t size, bool uint32_t sent = uart_enable_tx_write_fifo(uart_num, (const uint8_t *) src, size); if (sent < size) { p_uart_obj[uart_num]->tx_waiting_fifo = true; - uart_enable_tx_intr(uart_num, 1, UART_THRESHOLD_NUM(uart_num, UART_EMPTY_THRESH_DEFAULT)); + uart_enable_tx_intr(uart_num, 1, -1); } size -= sent; src += sent;