diff --git a/components/esp_hal_regi2c/test_apps/main/test_regi2c.h b/components/esp_hal_regi2c/test_apps/main/test_regi2c.h
index eca63b75c0..e5deedccd1 100644
--- a/components/esp_hal_regi2c/test_apps/main/test_regi2c.h
+++ b/components/esp_hal_regi2c/test_apps/main/test_regi2c.h
@@ -36,7 +36,19 @@ extern "C" {
 #define TEST_REG_MASK_MSB   I2C_APLL_OC_DVDD_MSB
 #define TEST_REG_MASK_LSB   I2C_APLL_OC_DVDD_LSB
 
-#elif CONFIG_IDF_TARGET_ESP32H4 || CONFIG_IDF_TARGET_ESP32S31
+#elif CONFIG_IDF_TARGET_ESP32H4
+
+#include "soc/regi2c_saradc.h"
+#define TEST_BLOCK          I2C_SAR_ADC
+#define TEST_HOST_ID        I2C_SAR_ADC_HOSTID
+/* ADC_SAR1_INITIAL_CODE_LOW_ADDR: register 0, bits [7:0] — full 8-bit */
+#define TEST_REG_FULL       ADC_SAR1_INITIAL_CODE_LOW_ADDR
+/* ADC_SAR1_INITIAL_CODE_HIGH_ADDR: register 1, bits [3:0] — 4-bit field */
+#define TEST_REG_MASK       ADC_SAR1_INITIAL_CODE_HIGH_ADDR
+#define TEST_REG_MASK_MSB   ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB
+#define TEST_REG_MASK_LSB   ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB
+
+#elif CONFIG_IDF_TARGET_ESP32S31
 
 #include "soc/regi2c_saradc.h"
 #define TEST_BLOCK          I2C_SARADC