From c0fcd5cbcd4c9cd6c546d822d963e748a52ac054 Mon Sep 17 00:00:00 2001 From: Alexey Lapshin Date: Wed, 28 Jan 2026 13:01:48 +0700 Subject: [PATCH] fix(panic): fix _bss_end alignment for esp32s2 and esp32s3 --- components/esp_system/ld/esp32s2/sections.ld.in | 2 +- components/esp_system/ld/esp32s3/sections.ld.in | 2 +- components/esp_system/port/soc/esp32s2/system_internal.c | 2 +- components/esp_system/port/soc/esp32s3/system_internal.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/components/esp_system/ld/esp32s2/sections.ld.in b/components/esp_system/ld/esp32s2/sections.ld.in index 90b827e82e..067f120077 100644 --- a/components/esp_system/ld/esp32s2/sections.ld.in +++ b/components/esp_system/ld/esp32s2/sections.ld.in @@ -333,7 +333,7 @@ SECTIONS mutable[dram0_bss] /* mutable libs end */ - ALIGNED_SYMBOL(8, _bss_end) + ALIGNED_SYMBOL(16, _bss_end) } > dram0_0_seg .flash.appdesc : ALIGN(0x10) diff --git a/components/esp_system/ld/esp32s3/sections.ld.in b/components/esp_system/ld/esp32s3/sections.ld.in index 3d4d8257c4..d0f6a13c9a 100644 --- a/components/esp_system/ld/esp32s3/sections.ld.in +++ b/components/esp_system/ld/esp32s3/sections.ld.in @@ -283,7 +283,7 @@ SECTIONS mutable[dram0_bss] /* mutable libs end */ - ALIGNED_SYMBOL(8, _bss_end) + ALIGNED_SYMBOL(16, _bss_end) } > dram0_0_seg ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), diff --git a/components/esp_system/port/soc/esp32s2/system_internal.c b/components/esp_system/port/soc/esp32s2/system_internal.c index d7ca06c5e6..7d49c83748 100644 --- a/components/esp_system/port/soc/esp32s2/system_internal.c +++ b/components/esp_system/port/soc/esp32s2/system_internal.c @@ -97,7 +97,7 @@ void esp_restart_noos(void) // If stack_addr is from External Memory (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM is used) // then need to switch SP to Internal Memory otherwise // we will get the "Cache disabled but cached memory region accessed" error after Cache_Read_Disable. - uint32_t new_sp = ALIGN_DOWN(_bss_end, 16); + uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16); SET_STACK(new_sp); } #endif diff --git a/components/esp_system/port/soc/esp32s3/system_internal.c b/components/esp_system/port/soc/esp32s3/system_internal.c index 0d1e072d99..378c48f34f 100644 --- a/components/esp_system/port/soc/esp32s3/system_internal.c +++ b/components/esp_system/port/soc/esp32s3/system_internal.c @@ -102,7 +102,7 @@ void esp_restart_noos(void) // If stack_addr is from External Memory (CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM is used) // then need to switch SP to Internal Memory otherwise // we will get the "Cache disabled but cached memory region accessed" error after Cache_Read_Disable. - uint32_t new_sp = ALIGN_DOWN(_bss_end, 16); + uint32_t new_sp = ALIGN_DOWN((uint32_t)&_bss_end, 16); SET_STACK(new_sp); } #endif