From c2a371a20dee342de0c842f3aa8a65acea9da74a Mon Sep 17 00:00:00 2001 From: hebinglin Date: Wed, 1 Apr 2026 11:52:01 +0800 Subject: [PATCH] change(esp_hw_support): allow rtc_periph pd when top pd for esp32h4 eco1 --- components/esp_hw_support/sleep_modes.c | 4 ++-- components/soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c6/include/soc/soc_caps.h | 2 ++ components/soc/esp32h4/include/soc/Kconfig.soc_caps.in | 8 ++++++++ components/soc/esp32h4/include/soc/soc_caps.h | 4 +++- 5 files changed, 19 insertions(+), 3 deletions(-) diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index e1599cf94b..4138fa6a5b 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -2962,9 +2962,9 @@ static SLEEP_FN_ATTR uint32_t get_power_down_flags(void) } #endif -#if CONFIG_IDF_TARGET_ESP32C6 +#if SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH if (!(pd_flags & PMU_SLEEP_PD_TOP)) { - // TOP power domain depends on the RTC_PERIPH power domain on ESP32C6, RTC_PERIPH should only be disabled when the TOP domain is down. + // TOP power domain depends on the RTC_PERIPH power domain on ESP32C6 and ESP32H4, RTC_PERIPH should only be disabled when the TOP domain is down. pd_flags &= ~RTC_SLEEP_PD_RTC_PERIPH; } #endif diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 0b268501ba..bacda29e73 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -1203,6 +1203,10 @@ config SOC_PM_RETENTION_MODULE_NUM int default 32 +config SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH + bool + default y + config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 05d60318dd..91ade7b782 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -497,6 +497,8 @@ #define SOC_PM_RETENTION_MODULE_NUM (32) +#define SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH (1) + /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/ #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1) #define SOC_MODEM_CLOCK_IS_INDEPENDENT (1) diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in index 17d21fbebb..4fd30da02e 100644 --- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in @@ -1011,6 +1011,10 @@ config SOC_PM_SUPPORT_MAC_BB_PD bool default y +config SOC_PM_SUPPORT_RTC_PERIPH_PD + bool + default y + config SOC_PM_SUPPORT_PMU_CLK_ICG bool default y @@ -1051,6 +1055,10 @@ config SOC_PM_RETENTION_MODULE_NUM int default 64 +config SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH + bool + default y + config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h index 3e744fac91..8a2b6bf444 100644 --- a/components/soc/esp32h4/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -481,7 +481,7 @@ #define SOC_PM_SUPPORT_TOP_PD (1) #define SOC_PM_SUPPORT_HP_AON_PD (1) #define SOC_PM_SUPPORT_MAC_BB_PD (1) -// #define SOC_PM_SUPPORT_RTC_PERIPH_PD (1) // TODOļ¼š [ESP32H4] PM-484 +#define SOC_PM_SUPPORT_RTC_PERIPH_PD (1) // #define SOC_PM_SUPPORT_PMU_MODEM_STATE (1) // /* macro redefine for pass esp_wifi headers md5sum check */ @@ -500,6 +500,8 @@ #define SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE (1) #define SOC_PM_RETENTION_MODULE_NUM (64) +#define SOC_PM_TOP_DEPENDS_ON_RTC_PERIPH (1) // In ESP32H4, RTC_PERIPH should be pd only together with TOP, otherwise there is some current leak. + /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/ #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1)