From acb49e952066f8b9dccc40bbd4bfb0babe3a5ac1 Mon Sep 17 00:00:00 2001 From: Song Ruo Jing Date: Sat, 28 Feb 2026 19:03:17 +0800 Subject: [PATCH 1/2] fix(rtcio): RTC GPIO configuration should be written if LP IO clock exists --- components/esp_driver_gpio/src/gpio.c | 3 -- components/esp_driver_gpio/src/rtc_io.c | 20 +++++++---- .../esp32c5/include/hal/rtc_io_ll.h | 4 ++- .../esp32c6/include/hal/rtc_io_ll.h | 4 ++- .../esp32c61/include/hal/rtc_io_ll.h | 4 ++- .../esp32h4/include/hal/rtc_io_ll.h | 4 ++- .../esp32p4/include/hal/rtc_io_ll.h | 4 ++- .../esp32s2/include/hal/rtc_io_ll.h | 4 ++- .../esp32s3/include/hal/rtc_io_ll.h | 4 ++- .../esp32s31/include/hal/rtc_io_ll.h | 4 ++- .../include/esp_private/io_mux.h | 21 +++++++++--- components/esp_hw_support/port/esp32/io_mux.c | 10 +++++- .../esp_hw_support/port/esp32c5/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32c6/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32c61/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32h2/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32h21/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32h4/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32p4/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32s2/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32s3/io_mux.c | 33 ++++++++++++------- .../esp_hw_support/port/esp32s31/io_mux.c | 33 ++++++++++++------- .../soc/esp32c2/register/soc/io_mux_reg.h | 2 -- .../soc/esp32c3/register/soc/io_mux_reg.h | 2 -- .../soc/esp32c5/register/soc/io_mux_reg.h | 2 -- .../soc/esp32c6/register/soc/io_mux_reg.h | 2 -- .../soc/esp32c61/register/soc/io_mux_reg.h | 2 -- .../soc/esp32h2/register/soc/io_mux_reg.h | 2 -- .../soc/esp32h21/register/soc/io_mux_reg.h | 2 -- .../soc/esp32h4/register/soc/io_mux_reg.h | 2 -- .../esp32p4/register/hw_ver1/soc/io_mux_reg.h | 2 -- .../esp32p4/register/hw_ver3/soc/io_mux_reg.h | 2 -- .../soc/esp32s2/register/soc/io_mux_reg.h | 2 -- .../soc/esp32s3/register/soc/io_mux_reg.h | 4 --- .../soc/esp32s31/register/soc/io_mux_reg.h | 2 -- 35 files changed, 272 insertions(+), 172 deletions(-) diff --git a/components/esp_driver_gpio/src/gpio.c b/components/esp_driver_gpio/src/gpio.c index 3993889b57..6b7e863ff4 100644 --- a/components/esp_driver_gpio/src/gpio.c +++ b/components/esp_driver_gpio/src/gpio.c @@ -487,9 +487,6 @@ esp_err_t gpio_config_as_analog(gpio_num_t gpio_num) #if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED if (rtc_gpio_is_valid_gpio(gpio_num)) { rtc_gpio_deinit(gpio_num); - rtc_gpio_set_direction(gpio_num, RTC_GPIO_MODE_DISABLED); - rtc_gpio_pullup_dis(gpio_num); - rtc_gpio_pulldown_dis(gpio_num); } #endif return ESP_OK; diff --git a/components/esp_driver_gpio/src/rtc_io.c b/components/esp_driver_gpio/src/rtc_io.c index ef6ae489e2..48926b0bcb 100644 --- a/components/esp_driver_gpio/src/rtc_io.c +++ b/components/esp_driver_gpio/src/rtc_io.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -64,13 +64,19 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num) { ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error"); RTCIO_ENTER_CRITICAL(); - // Select Gpio as Digital Gpio - rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_LL_FUNC_DIGITAL); - - // TODO: IDF-14951 Turning off the lp io clock might affect other lp peripherals. Temporary disabled. -#if SOC_LP_IO_CLOCK_IS_INDEPENDENT && !CONFIG_IDF_TARGET_ESP32H4 - io_mux_force_disable_lp_io_clock(gpio_num); + if (io_mux_is_lp_io_in_use(gpio_num)) { + // Select GPIO as Digital GPIO + rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_LL_FUNC_DIGITAL); +#if SOC_RTCIO_INPUT_OUTPUT_SUPPORTED + // Disable any configuration of the RTC IO that may affect the GPIO behavior + rtc_gpio_set_direction(gpio_num, RTC_GPIO_MODE_DISABLED); + rtc_gpio_pullup_dis(gpio_num); + rtc_gpio_pulldown_dis(gpio_num); #endif +#if SOC_LP_IO_CLOCK_IS_INDEPENDENT + io_mux_force_disable_lp_io_clock(gpio_num); +#endif + } RTCIO_EXIT_CRITICAL(); return ESP_OK; diff --git a/components/esp_hal_gpio/esp32c5/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32c5/include/hal/rtc_io_ll.h index 1666673132..29cdf79cdb 100644 --- a/components/esp_hal_gpio/esp32c5/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32c5/include/hal/rtc_io_ll.h @@ -25,7 +25,9 @@ #include "hal/misc.h" #include "hal/assert.h" -#define RTCIO_LL_PIN_FUNC 1 +#define RTCIO_LL_PIN_FUNC 1 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-6 correspond to gpio 0-6 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32c6/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32c6/include/hal/rtc_io_ll.h index f5c536db84..34049ee3b5 100644 --- a/components/esp_hal_gpio/esp32c6/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32c6/include/hal/rtc_io_ll.h @@ -24,7 +24,9 @@ #include "hal/misc.h" #include "hal/assert.h" -#define RTCIO_LL_PIN_FUNC 0 +#define RTCIO_LL_PIN_FUNC 0 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-7 correspond to gpio 0-7 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32c61/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32c61/include/hal/rtc_io_ll.h index d8da5115c7..fb3a9aebc5 100644 --- a/components/esp_hal_gpio/esp32c61/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32c61/include/hal/rtc_io_ll.h @@ -25,7 +25,9 @@ #include "hal/misc.h" #include "hal/assert.h" -#define RTCIO_LL_PIN_FUNC 1 +#define RTCIO_LL_PIN_FUNC 1 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-6 correspond to gpio 0-6 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32h4/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32h4/include/hal/rtc_io_ll.h index 5e6034974b..e253703a9e 100644 --- a/components/esp_hal_gpio/esp32h4/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32h4/include/hal/rtc_io_ll.h @@ -25,7 +25,9 @@ #include "hal/misc.h" #include "hal/assert.h" -#define RTCIO_LL_PIN_FUNC 1 +#define RTCIO_LL_PIN_FUNC 1 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-5 correspond to gpio 0-5 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32p4/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32p4/include/hal/rtc_io_ll.h index 14705bd2fd..8348f8a5e6 100644 --- a/components/esp_hal_gpio/esp32p4/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32p4/include/hal/rtc_io_ll.h @@ -25,7 +25,9 @@ #include "hal/assert.h" #include "hal/config.h" -#define RTCIO_LL_PIN_FUNC 1 // LP_GPIO function +#define RTCIO_LL_PIN_FUNC 1 // LP_GPIO function + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-15 correspond to gpio 0-15 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32s2/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32s2/include/hal/rtc_io_ll.h index 6f26a35b3f..8ee834fa5b 100644 --- a/components/esp_hal_gpio/esp32s2/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32s2/include/hal/rtc_io_ll.h @@ -22,7 +22,9 @@ #include "soc/rtc_cntl_reg.h" #include "soc/sens_struct.h" -#define RTCIO_LL_PIN_FUNC 0 +#define RTCIO_LL_PIN_FUNC 0 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-21 correspond to gpio 0-21 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32s3/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32s3/include/hal/rtc_io_ll.h index c60be49961..65ea59a43a 100644 --- a/components/esp_hal_gpio/esp32s3/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32s3/include/hal/rtc_io_ll.h @@ -26,7 +26,9 @@ #include "soc/sens_struct.h" #include "soc/rtc_cntl_reg.h" -#define RTCIO_LL_PIN_FUNC 0 +#define RTCIO_LL_PIN_FUNC 0 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-21 correspond to gpio 0-21 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hal_gpio/esp32s31/include/hal/rtc_io_ll.h b/components/esp_hal_gpio/esp32s31/include/hal/rtc_io_ll.h index b7d6b8d1f5..251e9b8e9e 100644 --- a/components/esp_hal_gpio/esp32s31/include/hal/rtc_io_ll.h +++ b/components/esp_hal_gpio/esp32s31/include/hal/rtc_io_ll.h @@ -24,7 +24,9 @@ #include "hal/misc.h" #include "hal/assert.h" -#define RTCIO_LL_PIN_FUNC 1 +#define RTCIO_LL_PIN_FUNC 1 + +#define RTCIO_LL_GPIO_NUM_OFFSET 0 // rtcio 0-7 correspond to gpio 0-7 #ifdef __cplusplus extern "C" { diff --git a/components/esp_hw_support/include/esp_private/io_mux.h b/components/esp_hw_support/include/esp_private/io_mux.h index 71a9613949..1636e4459e 100644 --- a/components/esp_hw_support/include/esp_private/io_mux.h +++ b/components/esp_hw_support/include/esp_private/io_mux.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -11,7 +11,6 @@ #include "soc/clk_tree_defs.h" #include "soc/gpio_num.h" #include "soc/soc_caps.h" -#include "soc/io_mux_reg.h" #ifdef __cplusplus extern "C" { @@ -32,8 +31,8 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src); #if SOC_LP_IO_CLOCK_IS_INDEPENDENT typedef struct { - uint8_t rtc_io_enabled_cnt[MAX_RTC_GPIO_NUM + 1]; - uint32_t rtc_io_using_mask; + uint8_t rtc_io_enabled_cnt[SOC_RTCIO_PIN_COUNT]; + uint32_t rtc_io_using_mask : SOC_RTCIO_PIN_COUNT; } rtc_io_status_t; /** @@ -45,12 +44,24 @@ typedef struct { void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable); /** - * Force disable one LP_IO to clock dependency + * @brief Force disable one LP_IO to clock dependency + * * @param gpio_num GPIO number */ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num); #endif +#if SOC_RTCIO_PIN_COUNT > 0 +/** + * @brief Check if the LP_IO is in use + * + * @param gpio_num GPIO number + * + * @return true if the LP_IO is in use, false otherwise + */ +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num); +#endif + #ifdef __cplusplus } #endif diff --git a/components/esp_hw_support/port/esp32/io_mux.c b/components/esp_hw_support/port/esp32/io_mux.c index d17a300030..bfc960f549 100644 --- a/components/esp_hw_support/port/esp32/io_mux.c +++ b/components/esp_hw_support/port/esp32/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -11,3 +11,11 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) // IO MUX clock source is not selectable return ESP_OK; } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + // ESP32 does not have SOC_LP_IO_CLOCK_IS_INDEPENDENT + // which means we don't need LP_IO clock management + // So we just always return true here + return true; +} diff --git a/components/esp_hw_support/port/esp32c5/io_mux.c b/components/esp_hw_support/port/esp32c5/io_mux.c index d1410a5e39..4b50b8b96e 100644 --- a/components/esp_hw_support/port/esp32c5/io_mux.c +++ b/components/esp_hw_support/port/esp32c5/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -49,17 +49,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -74,10 +75,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -85,3 +87,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32c6/io_mux.c b/components/esp_hw_support/port/esp32c6/io_mux.c index e6352f8d9b..b0682682a0 100644 --- a/components/esp_hw_support/port/esp32c6/io_mux.c +++ b/components/esp_hw_support/port/esp32c6/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -48,17 +48,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -73,10 +74,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -84,3 +86,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32c61/io_mux.c b/components/esp_hw_support/port/esp32c61/io_mux.c index 058cf4cf52..c67ed6eec6 100644 --- a/components/esp_hw_support/port/esp32c61/io_mux.c +++ b/components/esp_hw_support/port/esp32c61/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -43,17 +43,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -68,10 +69,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -79,3 +81,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32h2/io_mux.c b/components/esp_hw_support/port/esp32h2/io_mux.c index 255442aaf0..3f9b01c80f 100644 --- a/components/esp_hw_support/port/esp32h2/io_mux.c +++ b/components/esp_hw_support/port/esp32h2/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -43,17 +43,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -68,10 +69,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -79,3 +81,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32h21/io_mux.c b/components/esp_hw_support/port/esp32h21/io_mux.c index 5a6b68890e..d0ffa2462f 100644 --- a/components/esp_hw_support/port/esp32h21/io_mux.c +++ b/components/esp_hw_support/port/esp32h21/io_mux.c @@ -1,6 +1,6 @@ /* - * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -44,17 +44,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -69,10 +70,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -80,3 +82,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32h4/io_mux.c b/components/esp_hw_support/port/esp32h4/io_mux.c index 5f02ac37de..d714f9f4a1 100644 --- a/components/esp_hw_support/port/esp32h4/io_mux.c +++ b/components/esp_hw_support/port/esp32h4/io_mux.c @@ -1,6 +1,6 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -44,17 +44,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -69,10 +70,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -80,3 +82,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32p4/io_mux.c b/components/esp_hw_support/port/esp32p4/io_mux.c index 12e6b4ae66..bf59c7dcba 100644 --- a/components/esp_hw_support/port/esp32p4/io_mux.c +++ b/components/esp_hw_support/port/esp32p4/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -53,17 +53,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert((gpio_num != GPIO_NUM_NC) && (gpio_num <= MAX_RTC_GPIO_NUM) && "RTCIO number error"); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -78,10 +79,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert((gpio_num != GPIO_NUM_NC) && (gpio_num <= MAX_RTC_GPIO_NUM) && "RTCIO number error"); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -89,3 +91,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32s2/io_mux.c b/components/esp_hw_support/port/esp32s2/io_mux.c index 895f009bfb..0340d271e9 100644 --- a/components/esp_hw_support/port/esp32s2/io_mux.c +++ b/components/esp_hw_support/port/esp32s2/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -31,17 +31,18 @@ static rtc_io_status_t s_rtc_io_status = { void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -56,10 +57,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -67,3 +69,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32s3/io_mux.c b/components/esp_hw_support/port/esp32s3/io_mux.c index 895f009bfb..0340d271e9 100644 --- a/components/esp_hw_support/port/esp32s3/io_mux.c +++ b/components/esp_hw_support/port/esp32s3/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -31,17 +31,18 @@ static rtc_io_status_t s_rtc_io_status = { void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -56,10 +57,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert(gpio_num != GPIO_NUM_NC); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -67,3 +69,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/esp_hw_support/port/esp32s31/io_mux.c b/components/esp_hw_support/port/esp32s31/io_mux.c index 00de979a01..e0ad487946 100644 --- a/components/esp_hw_support/port/esp32s31/io_mux.c +++ b/components/esp_hw_support/port/esp32s31/io_mux.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -53,17 +53,18 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { - assert((gpio_num != GPIO_NUM_NC) && (gpio_num <= MAX_RTC_GPIO_NUM) && "RTCIO number error"); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); if (enable) { - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask |= (1ULL << gpio_num); + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask |= (1ULL << rtc_io_num); } - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]++; - } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] > 0)) { - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num]--; - if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]++; + } else if (!enable && (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0)) { + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num]--; + if (s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] == 0) { + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); } } RTCIO_RCC_ATOMIC() { @@ -78,10 +79,11 @@ void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) { - assert((gpio_num != GPIO_NUM_NC) && (gpio_num <= MAX_RTC_GPIO_NUM) && "RTCIO number error"); + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); esp_os_enter_critical(&s_io_mux_spinlock); - s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] = 0; - s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << gpio_num); + s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] = 0; + s_rtc_io_status.rtc_io_using_mask &= ~(1ULL << rtc_io_num); if (s_rtc_io_status.rtc_io_using_mask == 0) { RTCIO_RCC_ATOMIC() { rtcio_ll_enable_io_clock(false); @@ -89,3 +91,10 @@ void io_mux_force_disable_lp_io_clock(gpio_num_t gpio_num) } esp_os_exit_critical(&s_io_mux_spinlock); } + +bool io_mux_is_lp_io_in_use(gpio_num_t gpio_num) +{ + uint32_t rtc_io_num = gpio_num - RTCIO_LL_GPIO_NUM_OFFSET; + assert(rtc_io_num < SOC_RTCIO_PIN_COUNT); + return s_rtc_io_status.rtc_io_enabled_cnt[rtc_io_num] > 0; +} diff --git a/components/soc/esp32c2/register/soc/io_mux_reg.h b/components/soc/esp32c2/register/soc/io_mux_reg.h index 4d12c30907..501b5a921f 100644 --- a/components/soc/esp32c2/register/soc/io_mux_reg.h +++ b/components/soc/esp32c2/register/soc/io_mux_reg.h @@ -122,8 +122,6 @@ #define GPIO_PAD_PULLDOWN(num) do{PIN_PULLUP_DIS(IOMUX_REG_GPIO##num);PIN_PULLDWN_EN(IOMUX_REG_GPIO##num);}while(0) #define GPIO_PAD_SET_DRV(num, drv) PIN_SET_DRV(IOMUX_REG_GPIO##num, drv) -#define MAX_RTC_GPIO_NUM 5 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE #define PIN_CTRL (REG_IO_MUX_BASE +0x00) diff --git a/components/soc/esp32c3/register/soc/io_mux_reg.h b/components/soc/esp32c3/register/soc/io_mux_reg.h index a34b9ddfa9..4b3837ce8e 100644 --- a/components/soc/esp32c3/register/soc/io_mux_reg.h +++ b/components/soc/esp32c3/register/soc/io_mux_reg.h @@ -133,8 +133,6 @@ #define USB_INT_PHY0_DM_GPIO_NUM 18 #define USB_INT_PHY0_DP_GPIO_NUM 19 -#define MAX_RTC_GPIO_NUM 5 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE #define PIN_CTRL (REG_IO_MUX_BASE +0x00) #define PAD_POWER_SEL BIT(15) diff --git a/components/soc/esp32c5/register/soc/io_mux_reg.h b/components/soc/esp32c5/register/soc/io_mux_reg.h index e1ea5672e2..dbcb314379 100644 --- a/components/soc/esp32c5/register/soc/io_mux_reg.h +++ b/components/soc/esp32c5/register/soc/io_mux_reg.h @@ -133,8 +133,6 @@ extern "C" { #define USB_INT_PHY0_DM_GPIO_NUM 13 #define USB_INT_PHY0_DP_GPIO_NUM 14 -#define MAX_RTC_GPIO_NUM 6 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE // definitions above are inherited from previous version of code, should double check diff --git a/components/soc/esp32c6/register/soc/io_mux_reg.h b/components/soc/esp32c6/register/soc/io_mux_reg.h index 6fed96a37a..94649705ea 100644 --- a/components/soc/esp32c6/register/soc/io_mux_reg.h +++ b/components/soc/esp32c6/register/soc/io_mux_reg.h @@ -139,8 +139,6 @@ #define USB_INT_PHY0_DM_GPIO_NUM 12 #define USB_INT_PHY0_DP_GPIO_NUM 13 -#define MAX_RTC_GPIO_NUM 7 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE #define PIN_CTRL (REG_IO_MUX_BASE +0x00) diff --git a/components/soc/esp32c61/register/soc/io_mux_reg.h b/components/soc/esp32c61/register/soc/io_mux_reg.h index cea6f49cb9..2d7f6144a4 100644 --- a/components/soc/esp32c61/register/soc/io_mux_reg.h +++ b/components/soc/esp32c61/register/soc/io_mux_reg.h @@ -109,8 +109,6 @@ extern "C" { #define USB_INT_PHY0_DM_GPIO_NUM 12 #define USB_INT_PHY0_DP_GPIO_NUM 13 -#define MAX_RTC_GPIO_NUM 6 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE // definitions above are inherited from previous version of code, should double check diff --git a/components/soc/esp32h2/register/soc/io_mux_reg.h b/components/soc/esp32h2/register/soc/io_mux_reg.h index bb04bae180..93997ad6d9 100644 --- a/components/soc/esp32h2/register/soc/io_mux_reg.h +++ b/components/soc/esp32h2/register/soc/io_mux_reg.h @@ -151,8 +151,6 @@ #define USB_INT_PHY0_DM_GPIO_NUM 26 #define USB_INT_PHY0_DP_GPIO_NUM 27 -#define MAX_RTC_GPIO_NUM 14 // GPIO7~14 are the pads with LP function - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE #define PIN_CTRL (REG_IO_MUX_BASE +0x00) diff --git a/components/soc/esp32h21/register/soc/io_mux_reg.h b/components/soc/esp32h21/register/soc/io_mux_reg.h index 9e6335e1d4..04816175c5 100644 --- a/components/soc/esp32h21/register/soc/io_mux_reg.h +++ b/components/soc/esp32h21/register/soc/io_mux_reg.h @@ -144,8 +144,6 @@ extern "C" { #define USB_INT_PHY0_DM_GPIO_NUM 17 #define USB_INT_PHY0_DP_GPIO_NUM 18 -#define MAX_RTC_GPIO_NUM 11 // GPIO5~11 are the pads with LP function - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE diff --git a/components/soc/esp32h4/register/soc/io_mux_reg.h b/components/soc/esp32h4/register/soc/io_mux_reg.h index ab940315ff..cd2a020114 100644 --- a/components/soc/esp32h4/register/soc/io_mux_reg.h +++ b/components/soc/esp32h4/register/soc/io_mux_reg.h @@ -137,8 +137,6 @@ extern "C" { #define USB_OTG_INT_PHY_DM_GPIO_NUM USB_INT_PHY1_DM_GPIO_NUM #define USB_OTG_INT_PHY_DP_GPIO_NUM USB_INT_PHY1_DP_GPIO_NUM -#define MAX_RTC_GPIO_NUM 5 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE // definitions above are inherited from previous version of code, should double check diff --git a/components/soc/esp32p4/register/hw_ver1/soc/io_mux_reg.h b/components/soc/esp32p4/register/hw_ver1/soc/io_mux_reg.h index 36fba3a52d..9b61a5ce70 100644 --- a/components/soc/esp32p4/register/hw_ver1/soc/io_mux_reg.h +++ b/components/soc/esp32p4/register/hw_ver1/soc/io_mux_reg.h @@ -185,8 +185,6 @@ #define USB_OTG_INT_PHY_DM_GPIO_NUM USB_INT_PHY1_DM_GPIO_NUM #define USB_OTG_INT_PHY_DP_GPIO_NUM USB_INT_PHY1_DP_GPIO_NUM -#define MAX_RTC_GPIO_NUM 15 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE diff --git a/components/soc/esp32p4/register/hw_ver3/soc/io_mux_reg.h b/components/soc/esp32p4/register/hw_ver3/soc/io_mux_reg.h index 47478cfef9..0cc45c871b 100644 --- a/components/soc/esp32p4/register/hw_ver3/soc/io_mux_reg.h +++ b/components/soc/esp32p4/register/hw_ver3/soc/io_mux_reg.h @@ -185,8 +185,6 @@ #define USB_OTG_INT_PHY_DM_GPIO_NUM USB_INT_PHY1_DM_GPIO_NUM #define USB_OTG_INT_PHY_DP_GPIO_NUM USB_INT_PHY1_DP_GPIO_NUM -#define MAX_RTC_GPIO_NUM 15 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE diff --git a/components/soc/esp32s2/register/soc/io_mux_reg.h b/components/soc/esp32s2/register/soc/io_mux_reg.h index 66f2b1c2c0..d89a6949c8 100644 --- a/components/soc/esp32s2/register/soc/io_mux_reg.h +++ b/components/soc/esp32s2/register/soc/io_mux_reg.h @@ -143,8 +143,6 @@ #define GPIO_PAD_PULLUP(num) do{PIN_PULLUP_DIS(IOMUX_REG_GPIO##num);PIN_PULLDWN_EN(IOMUX_REG_GPIO##num);}while(0) #define GPIO_PAD_SET_DRV(num, drv) PIN_SET_DRV(IOMUX_REG_GPIO##num, drv) -#define MAX_RTC_GPIO_NUM 21 - #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE #define PIN_CTRL (REG_IO_MUX_BASE +0x00) #define PAD_POWER_SEL BIT(15) diff --git a/components/soc/esp32s3/register/soc/io_mux_reg.h b/components/soc/esp32s3/register/soc/io_mux_reg.h index c3b1984eec..0fa4a8486c 100644 --- a/components/soc/esp32s3/register/soc/io_mux_reg.h +++ b/components/soc/esp32s3/register/soc/io_mux_reg.h @@ -151,10 +151,6 @@ #define SD_DATA3_GPIO_NUM 10 #define USB_INT_PHY0_DM_GPIO_NUM 19 #define USB_INT_PHY0_DP_GPIO_NUM 20 -#define XTAL32K_P_GPIO_NUM 15 -#define XTAL32K_N_GPIO_NUM 16 - -#define MAX_RTC_GPIO_NUM 21 #define REG_IO_MUX_BASE DR_REG_IO_MUX_BASE diff --git a/components/soc/esp32s31/register/soc/io_mux_reg.h b/components/soc/esp32s31/register/soc/io_mux_reg.h index 1eecf95009..612903aa34 100644 --- a/components/soc/esp32s31/register/soc/io_mux_reg.h +++ b/components/soc/esp32s31/register/soc/io_mux_reg.h @@ -139,8 +139,6 @@ #define PIN_FUNC_GPIO 1 -#define MAX_RTC_GPIO_NUM 7 - #define USB_INT_PHY0_DM_GPIO_NUM 33 #define USB_INT_PHY0_DP_GPIO_NUM 34 From d4005779e08624ad27fb142b8e34d8fe4b3dd075 Mon Sep 17 00:00:00 2001 From: Song Ruo Jing Date: Mon, 2 Mar 2026 15:21:35 +0800 Subject: [PATCH 2/2] fix(uart): improve uart rx glitch filter test case failing rate Not all IO glitch simulation functions were in iram before, making the glitch too long to be filtered. --- .../test_apps/uart/main/test_uart.c | 16 +++++++++------- .../esp_hal_gpio/esp32/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32c2/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32c3/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32c5/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32c6/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32c61/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32h2/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32h21/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32h4/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32p4/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32s2/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32s3/include/hal/gpio_ll.h | 1 + .../esp_hal_gpio/esp32s31/include/hal/gpio_ll.h | 1 + 14 files changed, 22 insertions(+), 7 deletions(-) diff --git a/components/esp_driver_uart/test_apps/uart/main/test_uart.c b/components/esp_driver_uart/test_apps/uart/main/test_uart.c index 2bce25f10c..b1797ecd42 100644 --- a/components/esp_driver_uart/test_apps/uart/main/test_uart.c +++ b/components/esp_driver_uart/test_apps/uart/main/test_uart.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -730,10 +730,8 @@ IRAM_ATTR static void uart_signal_inject_glitch_task(void *param) rtcio_ll_set_level(rtc_gpio_num, 1); #endif - // esp_rom_delay_us(1000); // wait for uart write task to start sending data - while (1) { - // make sure the glitch is always less than 5us + // make sure the glitch is always less than 6us portDISABLE_INTERRUPTS(); if (uart_num < SOC_UART_HP_NUM) { esp_rom_gpio_connect_out_signal(tx_pin, SIG_GPIO_OUT_IDX, false, false); @@ -761,10 +759,14 @@ TEST_CASE("uart rx glitch filter (read write test + auto baud rate detection tes port_param.tx_pin_num = port_param.rx_pin_num; // let tx and rx use the same pin uart_port_t uart_num = port_param.port_num; - // High speed clock source may not able to filter a 5us glitch, therefore, lower the source clock frequency + // High speed clock source may not able to filter a 6us glitch, therefore, lower the source clock frequency if (uart_num < SOC_UART_HP_NUM) { -#if SOC_UART_SUPPORT_XTAL_CLK +#if SOC_UART_SUPPORT_XTAL_CLK && (CONFIG_XTAL_FREQ == 40) port_param.default_src_clk = UART_SCLK_XTAL; +#elif SOC_UART_SUPPORT_RTC_CLK + port_param.default_src_clk = UART_SCLK_RTC; +#elif SOC_UART_SUPPORT_REF_TICK + port_param.default_src_clk = UART_SCLK_REF_TICK; #endif } uart_config_t uart_config = { @@ -775,7 +777,7 @@ TEST_CASE("uart rx glitch filter (read write test + auto baud rate detection tes .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, .source_clk = port_param.default_src_clk, #if !UART_LL_GLITCH_FILT_ONLY_ON_AUTOBAUD - .rx_glitch_filt_thresh = 5000, // filter all glitches with width less than 5us + .rx_glitch_filt_thresh = 6000, // filter all glitches with width less than 6us #endif }; diff --git a/components/esp_hal_gpio/esp32/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32/include/hal/gpio_ll.h index 27e2392e20..8797fbc5fb 100644 --- a/components/esp_hal_gpio/esp32/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32/include/hal/gpio_ll.h @@ -739,6 +739,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32c2/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32c2/include/hal/gpio_ll.h index 3bf9d6ba0a..0b720bf20f 100644 --- a/components/esp_hal_gpio/esp32c2/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32c2/include/hal/gpio_ll.h @@ -545,6 +545,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32c3/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32c3/include/hal/gpio_ll.h index 994e28b5cf..d4455f0a46 100644 --- a/components/esp_hal_gpio/esp32c3/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32c3/include/hal/gpio_ll.h @@ -542,6 +542,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32c5/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32c5/include/hal/gpio_ll.h index abb564288b..1abf8a4927 100644 --- a/components/esp_hal_gpio/esp32c5/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32c5/include/hal/gpio_ll.h @@ -529,6 +529,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32c6/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32c6/include/hal/gpio_ll.h index 3555142344..701d20e225 100644 --- a/components/esp_hal_gpio/esp32c6/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32c6/include/hal/gpio_ll.h @@ -493,6 +493,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32c61/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32c61/include/hal/gpio_ll.h index c937b139fb..4b4b259691 100644 --- a/components/esp_hal_gpio/esp32c61/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32c61/include/hal/gpio_ll.h @@ -529,6 +529,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32h2/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32h2/include/hal/gpio_ll.h index 933d9d0160..283926d021 100644 --- a/components/esp_hal_gpio/esp32h2/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32h2/include/hal/gpio_ll.h @@ -539,6 +539,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32h21/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32h21/include/hal/gpio_ll.h index 31122c4576..22a7535ae5 100644 --- a/components/esp_hal_gpio/esp32h21/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32h21/include/hal/gpio_ll.h @@ -520,6 +520,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32h4/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32h4/include/hal/gpio_ll.h index 035b658b99..beffbc5b64 100644 --- a/components/esp_hal_gpio/esp32h4/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32h4/include/hal/gpio_ll.h @@ -538,6 +538,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->funcn_out_sel_cfg[gpio_num].oe_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32p4/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32p4/include/hal/gpio_ll.h index 642dd4a8d0..995df50856 100644 --- a/components/esp_hal_gpio/esp32p4/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32p4/include/hal/gpio_ll.h @@ -655,6 +655,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32s2/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32s2/include/hal/gpio_ll.h index cd537f6527..f6139c1332 100644 --- a/components/esp_hal_gpio/esp32s2/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32s2/include/hal/gpio_ll.h @@ -560,6 +560,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32s3/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32s3/include/hal/gpio_ll.h index 589336aa45..e345424e0b 100644 --- a/components/esp_hal_gpio/esp32s3/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32s3/include/hal/gpio_ll.h @@ -562,6 +562,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO diff --git a/components/esp_hal_gpio/esp32s31/include/hal/gpio_ll.h b/components/esp_hal_gpio/esp32s31/include/hal/gpio_ll.h index 48eb78b2fa..6b36735d03 100644 --- a/components/esp_hal_gpio/esp32s31/include/hal/gpio_ll.h +++ b/components/esp_hal_gpio/esp32s31/include/hal/gpio_ll.h @@ -582,6 +582,7 @@ static inline void gpio_ll_set_input_signal_matrix_source(gpio_dev_t *hw, uint32 * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG * @param oen_inv True if the output enable needs to be inverted, otherwise False. */ +__attribute__((always_inline)) static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv) { hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv; // control valid only when using gpio matrix to route signal to the IO