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feat(bootloader_support): Support FE XTS-AES-256 using Key Manager for ESP32-C5

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harshal.patil
2025-11-05 08:32:19 +05:30
parent f73cfa5def
commit 0c3c284819
26 changed files with 95 additions and 15 deletions
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components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+3 -3
View File
@@ -286,7 +286,7 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
if (block == EFUSE_BLK9 && (
#if SOC_FLASH_ENCRYPTION_XTS_AES_256
#if SOC_EFUSE_XTS_AES_KEY_256
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif
@@ -301,10 +301,10 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
if (purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY ||
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
#ifdef SOC_EFUSE_XTS_AES_KEY_256
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
#endif //#ifdef SOC_EFUSE_XTS_AES_KEY_256
#if SOC_EFUSE_ECDSA_KEY
purpose == ESP_EFUSE_KEY_PURPOSE_ECDSA_KEY ||
#endif
components/efuse/test_apps/main/with_key_purposes/test_efuse_keys.c
+5 -5
View File
@@ -57,7 +57,7 @@ TEST_CASE("Test efuse API blocks burning XTS and ECDSA keys into BLOCK9", "[efus
uint8_t key[32] = {0};
esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY;
TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
#if SOC_FLASH_ENCRYPTION_XTS_AES_256
#if SOC_EFUSE_XTS_AES_KEY_256
purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1;
TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2;
@@ -86,7 +86,7 @@ static esp_err_t s_check_key(esp_efuse_block_t num_key, void* wr_key)
TEST_ASSERT_TRUE(esp_efuse_get_key_dis_write(num_key));
if (purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY ||
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
#ifdef SOC_EFUSE_XTS_AES_KEY_256
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif
@@ -180,7 +180,7 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
esp_efuse_purpose_t purpose = g_purpose;
#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
if (num_key == EFUSE_BLK9 && (
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
#ifdef SOC_EFUSE_XTS_AES_KEY_256
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
@@ -224,7 +224,7 @@ TEST_CASE("Test 1 esp_efuse_write_key for FPGA", "[efuse]")
#else
ESP_EFUSE_KEY_PURPOSE_RESERVED,
#endif
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
#ifdef SOC_EFUSE_XTS_AES_KEY_256
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1,
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2,
#else
@@ -300,7 +300,7 @@ TEST_CASE("Test esp_efuse_write_keys", "[efuse]")
esp_efuse_block_t key_block = EFUSE_BLK_MAX;
enum { BLOCKS_NEEDED1 = 2 };
#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
#ifdef SOC_EFUSE_XTS_AES_KEY_256
esp_efuse_purpose_t purpose1[BLOCKS_NEEDED1] = {
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1,
ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2,