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Merge branch 'fix/c61_wp_bp_nums' into 'master'
Fix number of available BPs/WPs for esp32c61 Closes DOC-13852 See merge request espressif/esp-idf!45888
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@@ -8,8 +8,8 @@ Configure {IDF_TARGET_NAME} Built-in JTAG Interface
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:link_to_translation:`zh_CN:[中文]`
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{IDF_TARGET_JTAG_PIN_Dneg:default="Not Updated!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19", esp32h2="GPIO26", esp32p4="GPIO24"}
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{IDF_TARGET_JTAG_PIN_Dpos:default="Not Updated!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20", esp32h2="GPIO27", esp32p4="GPIO25"}
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{IDF_TARGET_JTAG_PIN_Dneg:default="Not Updated!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19", esp32h2="GPIO26", esp32p4="GPIO24", esp32c5="GPIO13", esp32c61="GPIO12", esp32h4="GPIO13", esp32h21="GPIO17"}
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{IDF_TARGET_JTAG_PIN_Dpos:default="Not Updated!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20", esp32h2="GPIO27", esp32p4="GPIO25", esp32c5="GPIO14", esp32c61="GPIO13", esp32h4="GPIO14", esp32h21="GPIO18"}
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{IDF_TARGET_NAME} has built-in JTAG circuitry and can be debugged without any additional chip. Only a USB cable connected to the D+/D- pins is necessary. For dev kits without an exposed USB Serial Jtag connector, a USB breakout cable can be used. The necessary connections are shown in the following section.
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@@ -10,8 +10,13 @@ This section provides collection of all tips and quirks referred to from various
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Breakpoints and Watchpoints Available
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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{IDF_TARGET_NAME} debugger supports {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} hardware implemented breakpoints and 64 software ones. Hardware breakpoints are implemented by {IDF_TARGET_NAME} chip's logic and can be set anywhere in the code: either in flash or IRAM program's regions. Additionally there are 2 types of software breakpoints implemented by OpenOCD: flash (up to 32) and IRAM (up to 32) breakpoints. Currently GDB can not set software breakpoints in flash. So until this limitation is removed those breakpoints have to be emulated by OpenOCD as hardware ones (see :ref:`below <jtag-debugging-tip-where-breakpoints>` for details). {IDF_TARGET_NAME} also supports {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} watchpoints, so {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} variables can be watched for change or read by the GDB command ``watch myVariable``. Note that menuconfig option :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` uses the last watchpoint and will not provide expected results, if you also try to use it within OpenOCD/GDB. See menuconfig's help for detailed description.
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.. only:: CONFIG_IDF_TARGET_ARCH_XTENSA
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{IDF_TARGET_NAME} debugger supports {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} hardware implemented breakpoints and 64 software ones. Hardware breakpoints are implemented by {IDF_TARGET_NAME} chip's logic and can be set anywhere in the code: either in flash or IRAM program's regions. Additionally there are 2 types of software breakpoints implemented by OpenOCD: flash (up to 32) and IRAM (up to 32) breakpoints. Currently GDB can not set software breakpoints in flash. So until this limitation is removed those breakpoints have to be emulated by OpenOCD as hardware ones (see :ref:`below <jtag-debugging-tip-where-breakpoints>` for details). {IDF_TARGET_NAME} also supports {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} watchpoints, so {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} variables can be watched for change or read by the GDB command ``watch myVariable``. Note that menuconfig option :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` uses the last watchpoint and will not provide expected results, if you also try to use it within OpenOCD/GDB. See menuconfig's help for detailed description.
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.. only:: CONFIG_IDF_TARGET_ARCH_RISCV
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{IDF_TARGET_NAME} debugger supports {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} hardware implemented breakpoints and an unlimited number of software ones. Hardware breakpoints are implemented by {IDF_TARGET_NAME} chip's logic and can be set anywhere in the code: either in flash or IRAM program's regions. Additionally there are 2 types of software breakpoints implemented by OpenOCD: flash (up to 32) and IRAM (unlimited) breakpoints. Currently GDB can not set software breakpoints in flash. So until this limitation is removed those breakpoints have to be emulated by OpenOCD as hardware ones (see :ref:`below <jtag-debugging-tip-where-breakpoints>` for details). {IDF_TARGET_NAME} also supports {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} watchpoints, so {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} variables can be watched for change or read by the GDB command ``watch myVariable``. Note that menuconfig option :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` uses the last watchpoint and will not provide expected results, if you also try to use it within OpenOCD/GDB. See menuconfig's help for detailed description.
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.. _jtag-debugging-tip-where-breakpoints:
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@@ -8,8 +8,8 @@
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:link_to_translation:`en:[English]`
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{IDF_TARGET_JTAG_PIN_Dneg:default="未更新!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19", esp32h2="GPIO26", esp32p4="GPIO24"}
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{IDF_TARGET_JTAG_PIN_Dpos:default="未更新!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20", esp32h2="GPIO27", esp32p4="GPIO25"}
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{IDF_TARGET_JTAG_PIN_Dneg:default="未更新!", esp32c3="GPIO18", esp32c6="GPIO12", esp32s3="GPIO19", esp32h2="GPIO26", esp32p4="GPIO24", esp32c5="GPIO13", esp32c61="GPIO12", esp32h4="GPIO13", esp32h21="GPIO17"}
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{IDF_TARGET_JTAG_PIN_Dpos:default="未更新!", esp32c3="GPIO19", esp32c6="GPIO13", esp32s3="GPIO20", esp32h2="GPIO27", esp32p4="GPIO25", esp32c5="GPIO14", esp32c61="GPIO13", esp32h4="GPIO14", esp32h21="GPIO18"}
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{IDF_TARGET_NAME} 内置了 JTAG 电路,无需额外的芯片即可进行调试。只需将 USB 线连接到 D+/D- 引脚即可。对于没有外露 USB 串行 JTAG 连接器的开发板,可以使用 USB 转接线。所需的连接方式将在下一节中介绍。
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@@ -10,8 +10,13 @@
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可用的断点和观察点
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^^^^^^^^^^^^^^^^^^
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{IDF_TARGET_NAME} 调试器支持 {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} 个硬件断点和 64 个软件断点。硬件断点是由 {IDF_TARGET_NAME} 芯片内部的逻辑电路实现的,能够设置在代码的任何位置:flash 或者 IRAM 的代码区域。除此以外,OpenOCD 实现了两种软件断点:flash 断点(最多 32 个)和 IRAM 断点(最多 32 个)。目前 GDB 无法在 flash 中设置软件断点,因此除非解决此限制,否则这些断点只能由 OpenOCD 模拟为硬件断点(详细信息可以参阅 :ref:`下文 <jtag-debugging-tip-where-breakpoints>`)。{IDF_TARGET_NAME} 还支持 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个观察点,所以可以观察 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个变量的变化或者通过 GDB 命令 ``watch myVariable`` 来读取变量的值。请注意 menuconfig 中的 :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` 选项会使用最后一个观察点,如果你想在 OpenOCD 或者 GDB 中再次尝试使用这个观察点,可能不会得到预期的结果。详情请查看 menuconfig 中的帮助文档。
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.. only:: CONFIG_IDF_TARGET_ARCH_XTENSA
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{IDF_TARGET_NAME} 调试器支持 {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} 个硬件断点和 64 个软件断点。硬件断点是由 {IDF_TARGET_NAME} 芯片内部的逻辑电路实现的,能够设置在代码的任何位置:flash 或者 IRAM 的代码区域。除此以外,OpenOCD 实现了两种软件断点:flash 断点(最多 32 个)和 IRAM 断点(最多 32 个)。目前 GDB 无法在 flash 中设置软件断点,因此除非解决此限制,否则这些断点只能由 OpenOCD 模拟为硬件断点(详细信息可以参阅 :ref:`下文 <jtag-debugging-tip-where-breakpoints>`)。{IDF_TARGET_NAME} 还支持 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个观察点,所以可以观察 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个变量的变化或者通过 GDB 命令 ``watch myVariable`` 来读取变量的值。请注意 menuconfig 中的 :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` 选项会使用最后一个观察点,如果你想在 OpenOCD 或者 GDB 中再次尝试使用这个观察点,可能不会得到预期的结果。详情请查看 menuconfig 中的帮助文档。
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.. only:: CONFIG_IDF_TARGET_ARCH_RISCV
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{IDF_TARGET_NAME} 调试器支持 {IDF_TARGET_SOC_CPU_BREAKPOINTS_NUM} 个硬件断点和无限数量的软件断点。硬件断点是由 {IDF_TARGET_NAME} 芯片内部的逻辑电路实现的,能够设置在代码的任何位置:flash 或者 IRAM 的代码区域。除此以外,OpenOCD 实现了两种软件断点:flash 断点(最多 32 个)和 IRAM 断点(无限数量)。目前 GDB 无法在 flash 中设置软件断点,因此除非解决此限制,否则这些断点只能由 OpenOCD 模拟为硬件断点(详细信息可以参阅 :ref:`下文 <jtag-debugging-tip-where-breakpoints>`)。{IDF_TARGET_NAME} 还支持 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个观察点,所以可以观察 {IDF_TARGET_SOC_CPU_WATCHPOINTS_NUM} 个变量的变化或者通过 GDB 命令 ``watch myVariable`` 来读取变量的值。请注意 menuconfig 中的 :ref:`CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK` 选项会使用最后一个观察点,如果你想在 OpenOCD 或者 GDB 中再次尝试使用这个观察点,可能不会得到预期的结果。详情请查看 menuconfig 中的帮助文档。
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.. _jtag-debugging-tip-where-breakpoints:
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