fix(adc): fix ESP32 ADC continuous loss sample times

This commit is contained in:
gaoxu
2025-10-22 10:11:18 +08:00
parent c76d25edc1
commit 97a3b51d11
10 changed files with 17 additions and 10 deletions
+4
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@@ -344,6 +344,10 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
adc_hal_digi_connect(true);
adc_hal_digi_enable(true);
#if ADC_LL_DEFAULT_CONV_LIMIT_EN
adc_ll_digi_convert_limit_enable(false);
#endif
return ESP_OK;
}
+5 -2
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -7,6 +7,7 @@
#pragma once
#include <stdbool.h>
#include "esp_rom_sys.h"
#include "hal/adc_types.h"
#include "hal/misc.h"
#include "hal/assert.h"
@@ -48,7 +49,7 @@ extern "C" {
//On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_LL_DEFAULT_CONV_LIMIT_NUM != 0`
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 1
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
/*---------------------------------------------------------------
PWDET (Power Detect)
@@ -158,6 +159,8 @@ static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num)
*/
static inline void adc_ll_digi_convert_limit_enable(bool enable)
{
//ESP32 has a hardware limitaton, meas_num_limit can only be cleared after ADC enters sample phase(10~15us after start)
esp_rom_delay_us(60);
SYSCON.saradc_ctrl2.meas_num_limit = enable;
}
+1 -1
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@@ -62,7 +62,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
/**
* Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automatically cleared,
+1 -1
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@@ -62,7 +62,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32C5 supported to manage power mode
/*---------------------------------------------------------------
+1 -1
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@@ -61,7 +61,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32C6 supported to manage power mode
/*---------------------------------------------------------------
+1 -1
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@@ -62,7 +62,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32C61 supported to manage power mode
/*---------------------------------------------------------------
+1 -1
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@@ -62,7 +62,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32H2 supported to manage power mode
/*---------------------------------------------------------------
+1 -1
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@@ -61,7 +61,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32P4 supported to manage power mode
/*---------------------------------------------------------------
+1 -1
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@@ -61,7 +61,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
/*---------------------------------------------------------------
PWDET (Power Detect)
+1 -1
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@@ -63,7 +63,7 @@ extern "C" {
#define ADC_LL_CLKM_DIV_B_DEFAULT 1
#define ADC_LL_CLKM_DIV_A_DEFAULT 0
#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10
#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 255
/*---------------------------------------------------------------
PWDET (Power Detect)