deep sleep: close rf to optimize sleep current

components/esp_wifi/include/esp_phy_init.h

@@ -153,6 +153,12 @@ esp_err_t esp_phy_store_cal_data_to_nvs(const esp_phy_calibration_data_t* cal_da
  */
 esp_err_t esp_phy_erase_cal_data_in_nvs(void);
 
+/**
+ * @brief Get phy initialize status
+ * @return  return true if phy is already initialized.
+ */
+bool esp_phy_is_initialized(void);
+
 /**
  * @brief Enable PHY and RF module
  *

components/esp_wifi/src/phy_init.c

@@ -210,6 +210,11 @@ static inline void phy_digital_regs_load(void)
     }
 }
 
+bool esp_phy_is_initialized(void)
+{
+    return s_is_phy_calibrated;
+}
+
 void esp_phy_enable(void)
 {
     _lock_acquire(&s_phy_access_lock);

components/soc/src/esp32/rtc_sleep.c

@@ -211,6 +211,12 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
     REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DBIAS_WAK, cfg.rtc_dbias_wak);
     REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_WAK, cfg.dig_dbias_wak);
     REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_SLP, cfg.dig_dbias_slp);
+
+    extern bool esp_phy_is_initialized(void);
+    if (esp_phy_is_initialized()){
+        extern void phy_close_rf(void);
+        phy_close_rf();
+    }
 }
 
 void rtc_sleep_set_wakeup_time(uint64_t t)

components/soc/src/esp32s2/rtc_sleep.c

@@ -108,6 +108,12 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
         CLEAR_PERI_REG_MASK(RTC_CNTL_ANA_CONF_REG,
                             RTC_CNTL_CKGEN_I2C_PU | RTC_CNTL_PLL_I2C_PU |
                             RTC_CNTL_RFRX_PBUS_PU | RTC_CNTL_TXRF_I2C_PU);
+
+        extern bool esp_phy_is_initialized(void);
+        if (esp_phy_is_initialized()){
+            extern void phy_close_rf(void);
+            phy_close_rf();
+        }
     } else {
 	SET_PERI_REG_MASK(RTC_CNTL_REG, RTC_CNTL_REGULATOR_FORCE_PU);
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_DG_WRAP_PD_EN);