espressif/esp-idf
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7 Commits

Author SHA1 Message Date
armando 41e854d7df fix(mspi): fixed mspi dma burst timing issue 2026-01-09 10:37:49 +08:00
armando 71a09b82a4 change(cache): when vaddr is not cacheable, msync will return not supported 2025-08-11 01:53:16 +00:00
morris fb4b590941 refactor(dma)!: remove deprecated functions 2025-06-12 12:24:58 +08:00
Armando 0a1503897c feat(cache): support esp_cache_msync for instructions 2023-09-22 14:19:41 +08:00
Armando da8afe7c78 feat(cache): added direction selection to esp_cache_msync API 
ESP_CACHE_MSYNC_FLAG_DIR_C2M: From cache to memory
ESP_CACHE_MSYNC_FLAG_DIR_M2C: From memory to cache

By default, if no direction flag is set, it will fallback C2M direction.

For M2C direction, now this API will do an invalidation.
 2023-07-11 11:19:10 +08:00
Armando abb03b8dc4 doc: added memory management programming guides 2023-03-22 16:33:52 +08:00
Armando fda9746bb8 esp_mm: cache_msync API 2023-02-28 10:42:22 +08:00