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154 Commits

Author SHA1 Message Date
Omar Chebib c27c33a832 fix(riscv): implement a workaround for Zcmp hardware bug 2026-04-10 15:03:09 +08:00
Marius Vikhammer a4b817d0fe fix(cpu): fix CSR_PRV_MODE not defined for S31 2026-04-07 09:37:39 +08:00
Omar Chebib 38abf98216 feat: add support for PIE coprocessor on the ESP32-S31 2026-03-31 13:27:16 +08:00
Alexey Lapshin 31810ae993 feat(esp_libc): make picolibc default libc 2025-12-03 13:31:42 +07:00
Alexey Lapshin 8b1bb83af7 Merge branch 'feature/dynamic_flags_in_toolchain_cmake' into 'master' 
feat(build): propagate compiler flags from files to toolchain.cmake

Closes IDF-11323

See merge request espressif/esp-idf!42966
 2025-11-17 07:52:41 +04:00
Alexey Lapshin 0c1d917f78 feat(build): propagate compiler flags from files to toolchain.cmake 
This change improves build consistency across external projects integrated
through CMake by ensuring that compiler flags defined in configuration files
are passed correctly to the toolchain. It covers the majority of use cases,
as external projects are typically also CMake-based. For projects that use
a custom build system, users will still need to specify the required flags
manually.
 2025-11-14 21:04:54 +07:00
harshal.patil c66ef46f99 feat(cpu_region_protect): Extend PMP memprot for ESP32-P4 V3 2025-11-05 13:34:47 +05:30
hebinglin 6d51f0ea8b fix(esp_hw_support): resolved setting mie to disable interrupts failed in sleep flow 2025-10-31 14:37:25 +08:00
Alexey Lapshin 6ed3fe13ca fix(build): add workaround for cm.push that triggers interrupt 2025-09-24 21:30:56 +07:00
Omar Chebib e1c2ddeab6 Merge branch 'fix/esp32p4_eco5_clic' into 'master' 
fix: get rid of the hardware workarounds for the latest ESP32P4 revision

Closes IDF-13409, IDF-13781, and IDF-13782

See merge request espressif/esp-idf!41719
 2025-09-19 15:00:21 +08:00
Marius Vikhammer 99935402b9 fix(interrupts): removed deprecated intr_types.h and interrupt_deprecated.h headers 
intr_types.h has been replaced by esp_intr_types.h and the deprecated esprv_intc_*
from interrupt_deprecated.h have been replaced by the more generic
esprv_* functions.
 2025-09-10 15:06:27 +08:00
Omar Chebib cea17beaba fix: get rid of the hardware workarounds for the latest ESP32P4 revision 2025-09-03 17:35:26 +08:00
armando 179d00a6f8 feat(p4): p4 rev3 real chip support 2025-08-28 17:56:16 +08:00
Alexey Lapshin b25cb2906c fix(freertos): fix xesppie registers save/restore 2025-08-25 11:58:21 +07:00
Alexey Lapshin 1f8096359d fix(riscv): split enable_fpu() to enable_fpu() and clear_fpu() 2025-08-25 11:58:15 +07:00
Laukik Hase 340de9823a feat(esp_tee): Support for ESP32-C5 - the rest of the components 2025-08-13 14:08:59 +05:30
Omar Chebib 03f4744497 feat(riscv): add support for the DSP coprocessor 2025-08-07 14:40:30 +08:00
harshal.patil 60ff4bca9b refactor(esp_system): Update all references of the memory protection configs 2025-08-04 11:43:01 +05:30
harshal.patil 5c6c73ece4 change(riscv): Remove redundant definition of MEMPROT_ISR 2025-08-04 11:43:01 +05:30
Laukik Hase f2b0f256ab fix(esp_rom): Patch the esp_rom_delay_us API to use U-mode cycle CSR 2025-07-25 09:54:42 +05:30
armando bcf04e356b resolve comments, to squash 2025-07-10 06:24:32 +00:00
armando dfb0662de2 feat(esp32p4): support eco5 on fpga 2025-07-10 06:24:32 +00:00
laokaiyao db85cd02be refactor(esp32c61): bus_monitor backward compatible refactor 2025-04-08 22:50:04 +08:00
Chen Jichang 6c4271d4bb feat(esp32h4): disable unsupported build 2025-03-28 14:41:29 +08:00
Omar Chebib 0bc169e735 fix(freertos): optimize HWLP context switch by disabling it when unused 2025-03-13 11:11:24 +08:00
Omar Chebib c26879d29e fix(freertos): workaround a hardware bug related to HWLP coprocessor 
This commit manually sets the HWLP context to dirty when a Task that needs it is scheduled it.
 2025-03-13 11:11:24 +08:00
Chen Jichang 30f2578e75 fix(esp32h4): fix g0 component build 2025-03-04 16:17:18 +08:00
Chen Jichang 62700fa36f feat(esp32h4): add soc register header files (stage2_3) 
add soc headers made by hand
 2025-02-24 12:20:27 +08:00
Jiang Jiang Jian 44a27d3113 Merge branch 'fix/disable_wfe_feature_for_e906_chips' into 'master' 
change(esp_hw_support): disable CPU wait-for-event mode on cpu start

See merge request espressif/esp-idf!36388
 2025-02-11 11:30:29 +08:00
Laukik Hase c4eec756f3 refactor(esp_tee): Revised the secure service ID numbering scheme 
Also:
- Split the secure service table into two parts: one DRAM-resident and the
  other DROM-resident. The former holds the services invoked when the cache is
  disabled or suspended while the latter holds rest of the services.
 2025-01-23 12:39:19 +05:30
wuzhenghui 121f56ef6d change(esp_hw_support): disable CPU wait-for-event mode on cpu start 2025-01-14 21:34:44 +08:00
Laukik Hase e51d2c1da3 feat(esp_tee): Support for ESP-TEE - riscv component 2024-12-02 12:20:04 +05:30
Mahavir Jain 2a6be654cd Merge branch 'ci/enable_memprot_tests_for_esp32c61' into 'master' 
Clear PMA entries before usage and enable tests for ESP32-C61

Closes IDF-10932

See merge request espressif/esp-idf!33438
 2024-09-20 21:32:18 +08:00
Alexey Gerenkov 9ca231e76e change(build): Use integrated assembler with Clang for RISCV chips 2024-09-18 21:40:39 +03:00
harshal.patil 7667d9ebbe fix(cpu_region_protect): Reset PMA entries before using them 
- ROM uses some PMA entries so we clear such PMA entries before using them in ESP-IDF
 2024-09-18 10:25:18 +05:30
Liu Xiao Yu 52175a6548 Merge branch 'refactor/supplement_plic_intr_rv_util_apis' into 'master' 
refactor(intr): add plic and intc interrupt rv util apis

See merge request espressif/esp-idf!33244
 2024-09-12 15:28:24 +08:00
Xiaoyu Liu 8a608da2b0 refactor(intr): add plic and intc interrupt rv util apis 
refactor(intr): remove the extra instructions in plic and intc
 2024-09-11 18:26:07 +08:00
Armando 17fc026c48 fix(pma): fixed pma 15 occupied by rom on c5 issue 2024-09-10 11:12:02 +08:00
Marius Vikhammer 6e51c0525d fix(wdt): changed register dump on non panic task WDT to be more descriptive 
Closes https://github.com/espressif/esp-idf/issues/14400
 2024-08-22 10:48:26 +08:00
Armando 893c04702f feat(riscv): added api to disable branch predictor 2024-08-14 14:34:34 +08:00
Omar Chebib f06b235709 fix(riscv): fix a that affected mintstatus CSR value in the CLIC 2024-07-26 13:56:40 +08:00
Armando c880f697da feat(panic): supported more cache error cactch 2024-07-11 15:26:13 +08:00
laokaiyao 21f870ecd5 remove(c5beta3): remove c5 beta3 system files 2024-06-17 12:02:15 +08:00
Marius Vikhammer eb24a57728 feat(intr): basic interrupt/freertos support for C61 2024-06-12 09:25:47 +08:00
Omar Chebib 82668dd3fe fix(riscv): make HWLP feature use direct saving of lazy saving 2024-05-21 17:27:46 +08:00
Omar Chebib 55acc5e5e7 feat(riscv): add support for PIE coprocessor and HWLP feature 
FreeRTOS tasks may now freely use the PIE coprocessor and HWLP feature.
Just like the FPU, usiing these coprocessors result in the task being pinned
to the core it is currently running on.
 2024-05-20 10:47:58 +08:00
Marius Vikhammer 4b4f4c200a fix(interrupt): fixed interrupt thresholds not working on C5 2024-05-14 10:56:22 +08:00
Alexey Lapshin 6f2de1fb23 fix(system): esp32p4: fix mepc when load/store failure occurred 2024-04-18 19:49:19 +04:00
Omar Chebib f6e935e013 fix(esp32c5): add CLIC interrupt controller support for the ESP32-C5 2024-04-16 10:38:14 +08:00
Mahavir Jain 166fa7acac fix: minor warning related to missing parenthesis 2024-04-14 21:16:34 +05:30