Commit Graph

719 Commits

Author SHA1 Message Date
Chen Jichang 7ef7c9f3a1 feat(lcd): re-support i80 lcd and support underrun inerrupt on p4 rev 3.0 2025-12-30 19:00:57 +08:00
Chen Chen 851ffae394 fix(intr_alloc): Fix ISR allocate methods in several drivers 2025-12-25 15:02:16 +08:00
Chen Chen 8ad7d769aa fix(i2c_master): Add i2c master timeout range check
Closes https://github.com/espressif/esp-idf/issues/17930
2025-12-10 17:55:59 +08:00
peter.marcisovsky f17f6ae7ae feat(usb_host): Add power and clock gating LL, HAL
- part of suspend/resume (remote wakeup) sequences
2025-12-04 17:09:22 +08:00
Song Ruo Jing 222d81976a fix(gpio): oe control by register only take effect when func sel is GPIO 2025-11-24 11:38:07 +08:00
Tomas Rezucha d06f5bf78a feat(usb/host): Add USB Host support to ESP32-P4 v3 2025-11-03 17:27:33 +08:00
morris 8a94f1957c Merge branch 'feat/uart_dma_support_v5.4' into 'release/v5.4'
feat(uhci): Add uhci(uart-dma) support on current chips (backport v5.4)

See merge request espressif/esp-idf!41517
2025-08-29 13:49:56 +08:00
C.S.M f148acc534 feat(uhci): Add uhci (uart-dma) support on current chips 2025-08-26 16:06:49 +08:00
laokaiyao 37d7edd6cb feat(i2s): add PLL240M clock source on S3 and C6
Closes https://github.com/espressif/esp-idf/issues/17056
2025-08-26 15:21:32 +08:00
morris b8ea51b2aa Merge branch 'bugfix/ledc_update_duty_wait_v5.4' into 'release/v5.4'
fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 (v5.4)

See merge request espressif/esp-idf!41273
2025-08-15 18:15:59 +08:00
Song Ruo Jing a194b02246 fix(ledc): duty_start bit should wait for its self-clear before next set on esp32 2025-08-14 19:07:06 +08:00
Song Ruo Jing 67a2dfa293 fix(lp_io): w1ts/w1tc register access performance is improved
by avoiding "read-modify-write" operation. The registers designed to be
write only.
2025-08-13 21:24:19 +08:00
gaoxu 9a2997e25c feat(lcd_cam): add lc_dma_int value atomic protect for lcd and cam 2025-07-07 15:33:43 +08:00
gaoxu a0578c231d feat(cam): add esp32s3 dvp cam support 2025-07-07 14:25:50 +08:00
Song Ruo Jing ec373b51b8 fix(uart): correct C3/S3 module enable porcedure to avoid undesired line noise 2025-05-27 14:15:33 +08:00
Song Ruo Jing 8f231272f6 fix(gpio): fix IO output enable control
oen_sel and oen_inv_sel fields from func_out_sel_cfg register
2025-05-20 15:30:26 +08:00
Song Ruo Jing f61b453a25 fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access 2025-05-20 15:30:26 +08:00
Song Ruo Jing 6cffc5c994 fix(gpio): fix pu, pd, drv value incorrect from gpio_dump_io_configuration on esp32
Closes https://github.com/espressif/esp-idf/issues/14931
2025-05-20 15:30:14 +08:00
C.S.M 94cbc9bbac fix(i2c): Fix that fsm reset cause i2c scl frequency changed on esp32s2 2025-04-29 16:58:36 +08:00
laokaiyao 8e6a7845b7 fix(touch): fixed tie option take no effect 2025-04-21 20:45:50 +08:00
igor.masar c9c0e8b63e fix(usb/hal/dwc): Correct host channel number calculation
The hardware field `ghwcfg2.numhstchnl` is zero-based, meaning the actual
number of available host channels is `numhstchnl + 1`. This off-by-one
error caused the USB Host controller to report N-1 channels instead of N,
leading to premature "No more HCD channels available" errors when
connecting multiple devices.

This issue affects ESP32-S2, ESP32-S3, and ESP32-P4.
2025-04-03 23:53:01 +08:00
morris ff8c836be3 Merge branch 'feat/allow_setting_rmt_group_prescale_v5.4' into 'release/v5.4'
refactor(rmt): set group clock prescale dynamically (v5.4)

See merge request espressif/esp-idf!36737
2025-04-02 10:15:16 +08:00
morris 13baf981ca Merge branch 'bugfix/sdmmc_high_prio_timeout_v5.4' into 'release/v5.4'
fix(sdmmc): move DMA descriptor refilling into the ISR (v5.4)

See merge request espressif/esp-idf!37694
2025-04-02 10:13:22 +08:00
Ivan Grokhotkov 4bd2322993 fix(sdmmc): move DMA descriptor refilling into the ISR
Previously, as DMA descriptors were processed, the task performing
SDMMC transfer would get woken up and would refill the descriptors.
This design didn't work correctly when higher priority tasks occupied
the CPU for too long, resulting in SDMMC transfer timing out.

This change moves DMA descriptor refilling into SDMMC ISR. Now the
"DMA done" interrupt is delivered back to task context only when
the entire transfer is completed.

Closes https://github.com/espressif/esp-idf/issues/13934
2025-03-12 10:30:53 +08:00
Song Ruo Jing e774dbfd0f fix(uart): LP UART does not have the pre-divider for its clock source
Closes https://github.com/espressif/esp-idf/issues/15427
2025-03-10 15:29:09 +08:00
Chen Jichang fc5d2e1bae refactor(rmt): set group clock prescale dynamically
Closes https://github.com/espressif/esp-idf/issues/14760
2025-02-26 14:17:12 +08:00
wuzhenghui 8e6ec50bcc fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management 2025-02-21 09:50:42 +08:00
morris cf392937b6 Merge branch 'feature/flash_software_resume_v5.4' into 'release/v5.4'
feat(spi_flash): Add config for adding auto check status after suspend to improve performance (backport v5.4)

See merge request espressif/esp-idf!36525
2025-02-20 10:52:17 +08:00
Tomas Rezucha 4e4c9dc726 fix(usb/host): Set SCHED_INFO for all channels
Although the hardware documentation suggests that SCHED_INFO is only used
for periodic channels, empirical evidence shows that omitting this configuration
on non-periodic channels can cause them to freeze.
Therefore, we set this field for all channels to ensure reliable operation.
2025-02-06 08:17:59 +01:00
Mahavir Jain 649f9a72ae Merge branch 'feat/support_aes_pseudo_round_func_in_esp32h2_eco5_v5.4' into 'release/v5.4'
Support AES and XTS-AES's pseudo round function in ESP32H2-ECO5 (v5.4)

See merge request espressif/esp-idf!36463
2025-01-23 13:20:20 +08:00
morris 206b3a22ad Merge branch 'feat/spi_std_timing_and_bit_trans_v5.4' into 'release/v5.4'
feat(driver_spi): support adjust master rx to standard timing (v5.4)

See merge request espressif/esp-idf!36399
2025-01-23 10:38:07 +08:00
harshal.patil b06a4c198a feat(bootloader_support): Permanently enable XTS-AES pseudo rounds when FE release mode is enabled 2025-01-21 12:28:23 +05:30
C.S.M 82b3f5413c feat(spi_flash): Add config for adding auto check status after suspend to improve performance 2025-01-21 14:50:23 +08:00
wanckl 6c6454357c feat(driver_spi): support using SPI_DEVICE_STD_TIMING to adjust master rx in standard timing 2025-01-17 10:51:47 +08:00
Tomas Rezucha ac3a3f801d feat(hal/usb): Explicitly enable clock and reset USB WRAP on init 2025-01-08 09:25:42 +01:00
morris cfc878a650 Merge branch 'refactor/cleanup_usb_phy_backport_v5.4' into 'release/v5.4'
fix(usb/host): Fix reaction on High-Speed NYET packet (backport v5.4)

See merge request espressif/esp-idf!36119
2025-01-08 10:22:50 +08:00
Jiang Jiang Jian f58ca2bde3 Merge branch 'fix/fix_flash_clock_changed_after_sleep_bak_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix mspi clock freq changed after lightsleep (v5.4)

See merge request espressif/esp-idf!36002
2025-01-07 10:55:43 +08:00
Jiang Jiang Jian 7cd2a1483e Merge branch 'fix/fix_p4_deepsleep_io_leakage_v5.4' into 'release/v5.4'
fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage (v5.4)

See merge request espressif/esp-idf!36008
2025-01-07 10:53:13 +08:00
morris 0646301e81 Merge branch 'feat/rgb_lcd_increase_pclk_v5.4' into 'release/v5.4'
feat(lcd): increase the upper limit of pclk frequency for RGB LCD (v5.4)

See merge request espressif/esp-idf!35928
2025-01-06 15:09:42 +08:00
morris da06959166 Merge branch 'bugfix/uart_8_16_bit_access_v5.4' into 'release/v5.4'
fix(uart): fix 8/16-bit uart register access (v5.4)

See merge request espressif/esp-idf!35958
2025-01-06 14:59:09 +08:00
Tomas Rezucha 8e35c7854d fix(usb/host): Fix reaction on High-Speed NYET packet
In Scatter-Gather DMA mode, the USB-DWC will automatically enable
PING protocol if an OUT packet is NACKed by the High-Speed device.
The PING bit must be manually reset.
2025-01-02 10:57:14 +01:00
wuzhenghui 0609f9111e fix(esp_hw_support): fix mspi clock freq changed after lightsleep 2024-12-26 19:25:48 +08:00
wuzhenghui c7c70a8ec6 fix(esp_hw_support): fix esp32p4 JTAG pad deepsleep current leakage 2024-12-26 16:03:42 +08:00
Song Ruo Jing 7167b04e6e fix(uart): fix 8/16-bit uart register access 2024-12-25 15:32:06 +08:00
morris 00f21c37fe feat(lcd): increase the upper limit of pclk frequency for RGB LCD 2024-12-25 10:29:08 +08:00
laokaiyao f2f74b8b89 fix(i2s): add check for the tdm frame bits num 2024-12-24 12:12:31 +08:00
morris 85e86626ff refactor(i2c): rename some LL functions according to TRM descriptions 2024-11-22 10:14:22 +08:00
morris e422e12f17 Merge branch 'feat/dynamic_usb_hal_backport_v5.4' into 'release/v5.4'
feat(hal/usb): Make USB-DWC HAL&LL configuration independent backport v5.4

See merge request espressif/esp-idf!34812
2024-11-18 21:40:16 +08:00
Tomas Rezucha 68a95f5c94 feat(hal/usb): Make USB-DWC HAL&LL configuration independent
Previously, we included symbols from soc/usb_dwc_cfg.h and configured
the HAL and LL according to it. Now we get the configuration in runtime
from USB-DWC registers.

Added missing definition for USB FS peripheral on ESP32-P4.
2024-11-15 00:36:10 +08:00
C.S.M 56625cda88 feat(i2c_slave): refactor i2c slave api to version 2 inorder to solve some existing problem 2024-11-14 18:02:15 +08:00