fcafa0de5d
test(ulp): added larger delay in ULP FSM I_WR_REG instruction test
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Test is flakey, could possibly be due to the ULP occasionally needing
a bit more time to start up.
2025-11-17 16:23:41 +08:00
5173e81565
ci(ulp): reset board between ulp-fsm tests
2025-10-24 11:33:22 +08:00
ea68500941
Merge branch 'bugfix/lp_core_array_bounds_p4_v5.4' into 'release/v5.4'
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fix(lp_core): fixed array-bound warning when compiling on P4 with -Os (v5.4)
See merge request espressif/esp-idf!41614
2025-09-01 10:52:46 +08:00
7c90e1c6b4
fix(lp_core): fixed array-bound warning when compiling on P4 with -Os
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Closes https://github.com/espressif/esp-idf/issues/17054
2025-08-29 13:17:53 +08:00
74b003cfa1
ci(ulp): fixed default config not running in CI
2025-08-29 09:56:45 +08:00
6b75576db2
change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status
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This commit updates the LP I2C and LP UART drivers to use the raw
interrupt status without enabling the interrupts.
2025-05-19 10:33:21 +02:00
33aca83c63
change(ci): remove esp32c5 from readme since esp32c5 skipped CI build
2025-04-25 17:13:27 +08:00
b227da9b2b
ci(adc): enable P4 ADC test and correct ADC performance thresh
2025-04-01 15:05:36 +08:00
1e5308211d
fix(lp_uart): Fixed flaky LP UART unit tests
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This commit fixes some flaky LP UART multi device tests. It also adds
code to put the HP core to light sleep for few tests.
2025-02-17 10:29:04 +01:00
8406735635
fix(lp_core): updated lp rom newlib API addresses
2024-10-24 10:45:55 +08:00
56af6b5fc4
test(sleep): vad wakeup hp core test
2024-10-16 17:27:27 +08:00
60c005d1dc
test(vad): vad wakeup test
2024-10-16 17:27:27 +08:00
564d777018
Merge branch 'feature/lp_core_40_mhz' into 'master'
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feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
Closes IDF-10203
See merge request espressif/esp-idf!32450
2024-09-20 10:57:15 +08:00
00eb97725b
feat(system): support choosing xtal as rtc-fast clock src on P4 and C5
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With xtal as rtc-fast clock source the LP-Core can run at twice the default
clock frequency. 40 MHz as opposed to 20 MHz.
2024-09-19 17:30:44 +08:00
6abe40e590
Merge branch 'feature/optimize_esp32p4_active_power_eco1' into 'master'
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feat(system): Optimize esp32p4 active state power consumption
Closes PM-103 and IDF-7688
See merge request espressif/esp-idf!32950
2024-09-11 23:15:29 +08:00
c41d432397
fix(ulp): fix uart driver delete order in lp uart test case
2024-09-11 10:53:00 +08:00
594880dae4
test(lp_adc): Added LP Core unit tests for testing LP ADC
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Added a unit test to verify that LP ADC1 works and can be read from the
LP Core.
2024-09-10 08:45:11 +02:00
692eb01fe1
fix(lp-core): fixed ULP shared mem address being wrong on P4
2024-07-23 14:12:18 +08:00
d70383422b
feat(lp-core): add reduced footprint print functions
2024-07-19 09:48:20 +08:00
92bf402911
Merge branch 'feature/ulp_hp_core_printf_debug' into 'master'
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feat(ulp): add option for routing LP-printf to HP console
See merge request espressif/esp-idf!32166
2024-07-18 16:03:27 +08:00
74a04c140c
feat(ulp): add option for routing LP-printf to HP console
2024-07-17 17:16:40 +08:00
9b387caf19
fix(etm): add ulp etm ll functions
2024-07-16 10:04:18 +08:00
d1132ddfa2
Merge branch 'feature/lp_core_etm' into 'master'
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feat(lp-core): added support for using ETM events as wake-up source
Closes IDF-10201 and IDF-6360
See merge request espressif/esp-idf!31810
2024-07-08 12:23:03 +08:00
de2a66ebe0
feat(lp-core): added support for using ETM events as wake-up source
2024-07-08 11:04:34 +08:00
41d39a419f
fix(pmp): fixed alignment of PMP addr for RTC mem on C5
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Also refactored it for C6/H2/C61 to keep the approach consistent between targets
2024-07-04 16:24:46 +08:00
cb22b8aaf7
ci(esp32c5): enable c5 target test
2024-07-02 16:45:49 +08:00
70a0b4a1bf
test: Added LP core unit tests for LP SPI
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This commit adds tests for LP SPI master and LP SPI slave devices.
2024-06-26 13:43:55 +02:00
aae3aa5e5f
feat(lp-core): bringup lp-core for C5 MP
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LP-Core is now able to boot and run on C5 MP chip.
2024-06-19 09:18:47 +08:00
cca222948a
fix(esp_driver_gpio): manage lp_io module clock by driver
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Closes https://github.com/espressif/esp-idf/issues/13683
2024-06-05 17:56:37 +08:00
de77d04358
feat(ulp): add lp core panic handler
2024-05-28 14:42:59 +08:00
3fd3c37507
Merge branch 'fix/fix_flaky_lp_uart_tests' into 'master'
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Fixed unstable LP UART tests and added new tests
Closes IDFCI-2137
See merge request espressif/esp-idf!30524
2024-05-27 14:39:14 +08:00
7a89223aed
fix(lp_core_test): fixed race-condition in lp core tests
2024-05-15 10:50:23 +08:00
76b7d12329
Merge branch 'feature/lp_core_interrupts' into 'master'
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feat(ulp): support interrupts for C6/P4 LP core
Closes IDFGH-11986 and IDF-7200
See merge request espressif/esp-idf!30399
2024-04-29 14:36:54 +08:00
c5a513cf49
feat(ulp): support interrupts for C6/P4 LP core
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Closes https://github.com/espressif/esp-idf/issues/13059
2024-04-28 17:03:23 +08:00
3cbe88427e
test(lp-core): Added unit test for lp_core_printf
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This commit adds a unit test for the lp_core_printf API.
2024-04-26 16:56:48 +02:00
be8a0568c5
test(lp-core): Fixed unstable LP UART tests
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This commit fixes some flaky LP UART unit tests.
2024-04-26 14:32:16 +02:00
df7e51fb8d
feat(lp-uart): Added unit tests for LP UART when used from LP Core
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This commit adds unit tests for the LP UART peripheral.
2024-04-22 18:34:48 +02:00
1fa59c442b
fix(ulp): fixed lp-core not booting during sleep
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LP core was unable to boot when system was in deepsleep.
This was due to lp uart init in LP rom using XTAL as clk source,
which is normally powered down during sleep.
This would cause lp uart to get stuck while printing ROM output,
and the app would never boot.
Also fixed wrong wakeup cause used by HP core for ULP wake up
2024-04-18 11:36:30 +08:00
5228dc348b
feat(lp_i2c): Added LP I2C support on the esp32p4
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This commit adds support for the LP I2C peripheral to be used from the
LP core on the esp32p4.
2024-03-26 08:31:54 +01:00
a32fb07e7b
feat(ulp): add basic support for running lp core on C5
2024-03-13 17:37:29 +08:00
1c015a3f0d
feat(ulp-riscv): Added unit test for RTC I2C
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This commit adds a unit-test for RTC I2C operation on the ULP RISC-V.
2024-02-21 11:46:19 +01:00
dff1e5df88
feat(lp_core): add support for lp timer and lp gpio on P4
2024-02-06 09:41:20 +08:00
1bcfde4e7f
fix(ulp): enable astyle linter and format ULP component
2024-01-22 11:43:38 +08:00
13dd2c9aae
Merge branch 'contrib/github_pr_12785' into 'master'
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Provide ulp_adc_deinit() API to fix ADC1 handle leakage (GitHub PR)
Closes IDFGH-11673
See merge request espressif/esp-idf!27916
2024-01-12 12:03:52 +08:00
d76334d83a
Merge branch 'test/fix_lp_core_config_mismatch_issue' into 'master'
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test: fix lp_core config file name mismatch issue
See merge request espressif/esp-idf!28217
2024-01-04 20:22:13 +08:00
c05b6533ce
change(ulp): added test for ulp adc init/deinit
2024-01-04 10:55:25 +08:00
3c5a4f9e8a
ci(p4): added todo jira for disabled tests on p4
2024-01-04 09:36:38 +08:00
1ab742b3c3
ci(p4): enable esp32p4 target test
2024-01-04 09:34:55 +08:00
d1f5497f43
test: fix lp_core config file name mismatch issue
2024-01-02 09:36:01 +01:00
0c067fcb05
feat(ulp/lp_core): Added basic support for building and running a LP-Core app on ESP32P4
2023-11-29 10:50:40 +08:00
Marius Vikhammer
Sudeep Mohanty
wuzhenghui
gaoxu
Armando
laokaiyao
Fu Hanxi