Add ESP32-S31 USB DWC/UTMI LL headers, SoC register structures, peripheral
descriptors, capabilities, and linker mappings so the HS OTG controller and
UTMI PHY can be built in esp_hal_usb.
Introduce SOC_USB_FSLS_PHY_NUM on USB-OTG targets to separate FSLS USB_WRAP
support from OTG/UTMI support. Use it to gate usb_wrap, the USB PHY driver,
docs, and example build rules on targets without an FSLS PHY.
Also add UTMI data pulldown control to the HAL, clear the boot-time DWC
suspend state on ESP32-S31, alias the legacy internal PHY target to UTMI for
backward compatibility, and extend usb_phy tests for UTMI-only targets.
- Removed conditional definitions for various RCC_ATOMIC macros across
multiple files, replacing them with a unified PERIPH_RCC_ATOMIC() macro.
- Updated instances where specific RCC_ATOMIC macros were used to ensure
consistent usage of PERIPH_RCC_ATOMIC().
- Deleted unused uart_share_hw_ctrl.h file as its functionality is now
integrated into the new structure.
Moved USB PHY source and headers from `usb/` to `esp_hw_support/`
to better reflect their hardware-specific nature.
Replaced use of public GPIO driver APIs with internal LL (Low-Level) APIs
for more precise hardware control and alignment with ESP-IDF HAL best practices.
Deleted deprecated PHY helper functions.
Consolidated all SoC-specific declarations under `usb_periph.h`.
BREAKING CHANGE: deprecated USB PHY APIs have been removed; update
callers to use the new interfaces in esp_hw_support/usb_phy.h