The esp_secure_boot_verify_sbv2_signature_block() and esp_secure_boot_verify_rsa_signature_block()
APIs need and use the verified_digest argument only for BOOTLOADER_BUILD, but the argument is
not used in the application code, and the value present in verified_digest is considered invalid.
Thus, allow passing NULL as the verified_digest parameter to help some save space.
This commit global variables such as ESPTOOLPY, ESPSECUREPY, ESPEFUSEPY,
ESPMONITOR and ESPTOOLPY_CHIP from the project_include.cmake file of
esptool_py component. All other components which use these variables
have been updated to fetch the same from esptool_py component's
properties.
This commit establishes the foundation for making the esptool_py
component idempotent.
The following changes are made in this commit:
- Removes unnecessary dependency of esp_wifi component on esptool_py.
- Add missing esptool_py dependencies to components which directly use
esptool_py specific functions or variables but do not declare a public
or private dependency.
This commit renames all registers in xtensa/specreg.h to by adding the
prefix XT_REG_. This is done to avoid naming collisions with similar
variable names. A new register file, viz., xt_specreg.h is created. The
previous names are still available to use but have been deprecated.
Closes https://github.com/espressif/esp-idf/issues/12723
Merges https://github.com/espressif/esp-idf/pull/16040
For secure app verification during OTA update case, the image was
getting memory mapped twice and hence the failure in verification.
Modified from memory mapped flash read to SPI flash read approach
for the MMU page size from image header.
Regression from 07318a4987
Closes https://github.com/espressif/esp-idf/issues/15936
flash 32-bit-addr is an experimental feature that has multiple
dependencies, e.g. flash chip vendor, etc.
If CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH can be enabled
successfully and tests are passed, we can allow images to be
placed on higher-than-16MB flash addresses
This commit removes the disabling of the LP Timer interrupt from the
bootloader clock configuration routine. This allows the LP Timer
interrupt to be visible to the LP Core after HP CPU boots up.
Closes https://github.com/espressif/esp-idf/issues/15751
This commit have updated check for max chip revision along with min chip revision.
Also added qemu based pytest to verify chip revision while performing OTA.
C.S.M
harshal.patil
Sudeep Mohanty
Song Ruo Jing
Armando (Dou Yiwen)
morris
Aditya Patwardhan
Alexey Lapshin
Nebojsa Cvetkovic
Konstantin Kondrashov
Laukik Hase
Nilesh Kale
Mahavir Jain
chaijie@espressif.com
Omar Chebib
Gao Xu
Chen Jichang