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https://github.com/espressif/esp-idf.git
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igor.masar
9ab7d5eb03
Add ESP32-S31 USB DWC/UTMI LL headers, SoC register structures, peripheral descriptors, capabilities, and linker mappings so the HS OTG controller and UTMI PHY can be built in esp_hal_usb. Introduce SOC_USB_FSLS_PHY_NUM on USB-OTG targets to separate FSLS USB_WRAP support from OTG/UTMI support. Use it to gate usb_wrap, the USB PHY driver, docs, and example build rules on targets without an FSLS PHY. Also add UTMI data pulldown control to the HAL, clear the boot-time DWC suspend state on ESP32-S31, alias the legacy internal PHY target to UTMI for backward compatibility, and extend usb_phy tests for UTMI-only targets.
35 lines
899 B
C
35 lines
899 B
C
/*
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* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/usb_utmi_ll.h"
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#include "hal/usb_utmi_hal.h"
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void _usb_utmi_hal_init(usb_utmi_hal_context_t *hal)
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{
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hal->dev = &USB_UTMI;
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_usb_utmi_ll_enable_bus_clock(true);
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_usb_utmi_ll_reset_register();
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/*
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Additional setting to solve missing DCONN event on ESP32P4 (IDF-9953).
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Note: On ESP32P4, the HP_SYSTEM_OTG_SUSPENDM is not connected to 1 by hardware.
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For correct detection of the device detaching, internal signal should be set to 1 by the software.
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*/
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usb_utmi_ll_enable_precise_detection(true);
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usb_utmi_ll_configure_ls(hal->dev, true);
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}
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void usb_utmi_hal_enable_data_pulldowns(bool enable)
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{
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usb_utmi_ll_enable_data_pulldowns(enable);
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}
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void _usb_utmi_hal_disable(void)
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{
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_usb_utmi_ll_enable_bus_clock(false);
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}
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