mirror of
https://github.com/espressif/esp-idf.git
synced 2026-04-27 19:13:21 +00:00
Marius Vikhammer
c34049a323
The ROM patch for chips missing clock source configuration in wdt_hal_init was re-implementing the full function in IRAM. Instead, delegate to the ROM version and only append the missing clock configuration afterwards, saving ~550 bytes of IRAM.
57 lines
2.1 KiB
C
57 lines
2.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include "hal/config.h"
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#include "soc/soc_caps.h"
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#include "soc/chip_revision.h"
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#include "esp_rom_caps.h"
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#include "hal/efuse_hal.h"
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#include "hal/mwdt_periph.h"
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#include "hal/wdt_hal.h"
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#if ESP_ROM_WDT_INIT_PATCH
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extern void rom_wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr);
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extern void rom_wdt_hal_deinit(wdt_hal_context_t *hal);
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void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
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{
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// ROM version omits clock source config for MWDT — delegate to ROM then fix up
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rom_wdt_hal_init(hal, wdt_inst, prescaler, enable_intr);
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if (hal->inst != WDT_RWDT) {
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mwdt_ll_write_protect_disable(hal->mwdt_dev);
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mwdt_ll_set_clock_source(hal->mwdt_dev, MWDT_CLK_SRC_DEFAULT);
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mwdt_ll_enable_clock(hal->mwdt_dev, true);
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mwdt_ll_write_protect_enable(hal->mwdt_dev);
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}
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}
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void wdt_hal_deinit(wdt_hal_context_t *hal)
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{
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// ROM version omits mwdt_ll_enable_clock(false) — delegate to ROM then fix up
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if (hal->inst != WDT_RWDT) {
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mwdt_ll_write_protect_disable(hal->mwdt_dev);
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mwdt_ll_enable_clock(hal->mwdt_dev, false);
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mwdt_ll_write_protect_enable(hal->mwdt_dev);
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}
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rom_wdt_hal_deinit(hal);
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}
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#if SOC_IS(ESP32P4) && (HAL_CONFIG(CHIP_SUPPORT_MIN_REV) <= 301)
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extern void rom_wdt_hal_config_stage(wdt_hal_context_t *hal, wdt_stage_t stage, uint32_t timeout, wdt_stage_action_t behavior);
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/* rwdt_ll_config_stage is implemented erroneously in ESP32P4 rom code, TODO: PM-654*/
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void wdt_hal_config_stage(wdt_hal_context_t *hal, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
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{
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if ((hal->inst == WDT_RWDT && stage == WDT_STAGE0) && !ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 302)) {
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timeout_ticks = timeout_ticks >> (1 + REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_WDT_DELAY_SEL));
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}
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rom_wdt_hal_config_stage(hal, stage, timeout_ticks, behavior);
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}
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#endif // SOC_IS(ESP32P4)
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#endif // ESP_ROM_WDT_INIT_PATCH
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