mirror of
https://github.com/espressif/esp-idf.git
synced 2026-04-28 03:23:14 +00:00
hebinglin
82 lines
2.7 KiB
C
82 lines
2.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2016-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_attr.h"
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#include "esp_sleep.h"
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#include "esp_private/pm_trace.h"
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#include "driver/gpio.h"
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#include "soc/soc.h"
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#include "soc/gpio_reg.h"
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#include "freertos/FreeRTOS.h"
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/* GPIOs to use for tracing of esp_pm events.
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* Array structure: s_trace_io[core_id][event_type]
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* - First dimension: core_id, indexed from 0 to (portNUM_PROCESSORS - 1)
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* - Second dimension: event_type, indexed by esp_pm_trace_event_t enum values
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*
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* Event type mapping (second dimension index):
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* 0: ESP_PM_TRACE_IDLE
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* 1: ESP_PM_TRACE_TICK
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* 2: ESP_PM_TRACE_FREQ_SWITCH
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* 3: ESP_PM_TRACE_CCOMPARE_UPDATE
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* 4: ESP_PM_TRACE_ISR_HOOK
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* 5: ESP_PM_TRACE_SLEEP
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*
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* NOTE: These GPIOs can be modified for debugging purposes.
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* WARNING: Do not use GPIOs that are utilized as MSPI IOs, otherwise the chip may crash.
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*/
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static const int DRAM_ATTR s_trace_io[portNUM_PROCESSORS][ESP_PM_TRACE_TYPE_MAX] = {
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#if CONFIG_IDF_TARGET_ESP32
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{BIT(4), BIT(16), BIT(18), BIT(19), BIT(25), BIT(27)}, // Core 0
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#if portNUM_PROCESSORS > 1
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{BIT(5), BIT(17), BIT(18), BIT(19), BIT(26), BIT(27)}, // Core 1
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#endif
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#elif CONFIG_IDF_TARGET_ESP32S2
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{BIT(4), BIT(16), BIT(18), BIT(19), BIT(20), BIT(21)}, // Core 0
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#elif CONFIG_IDF_TARGET_ESP32S3
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{BIT(4), BIT(6), BIT(14), BIT(15), BIT(16), BIT(18)}, // Core 0
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#if portNUM_PROCESSORS > 1
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{BIT(5), BIT(7), BIT(14), BIT(15), BIT(17), BIT(18)}, // Core 1
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#endif
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#elif CONFIG_IDF_TARGET_ESP32H2
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{BIT(2), BIT(4), BIT(6), BIT(7), BIT(8), BIT(10)}, // Core 0
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#elif CONFIG_IDF_TARGET_ESP32C5
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{BIT(2), BIT(4), BIT(6), BIT(7), BIT(8), BIT(23)}, // Core 0
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#else
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{BIT(2), BIT(4), BIT(6), BIT(7), BIT(8), BIT(18)}, // Core 0
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#if portNUM_PROCESSORS > 1
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{BIT(3), BIT(5), BIT(6), BIT(7), BIT(9), BIT(18)}, // Core 1
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#endif
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#endif
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};
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void esp_pm_trace_init(void)
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{
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for (int core = 0; core < portNUM_PROCESSORS; core++) {
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for (int event = 0; event < ESP_PM_TRACE_TYPE_MAX; event++) {
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int io = __builtin_ffs(s_trace_io[core][event]);
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if (io == 0) {
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continue;
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}
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gpio_set_direction(io - 1, GPIO_MODE_OUTPUT);
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}
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}
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#if SOC_PM_SUPPORT_RTC_PERIPH_PD
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/* to force tracing GPIOs to keep state */
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esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);
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#endif
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}
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void IRAM_ATTR esp_pm_trace_enter(esp_pm_trace_event_t event, int core_id)
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{
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REG_WRITE(GPIO_OUT_W1TS_REG, s_trace_io[core_id][event]);
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}
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void IRAM_ATTR esp_pm_trace_exit(esp_pm_trace_event_t event, int core_id)
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{
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REG_WRITE(GPIO_OUT_W1TC_REG, s_trace_io[core_id][event]);
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}
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