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espressif
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esp-idf
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20bbd2af42ea3d5583e080d790b3abdfd4e86ec0
esp-idf
/
components
/
ulp
/
ulp_riscv
T
History
wuzhenghui
51205a8fd8
fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management
2025-02-19 16:02:25 +08:00
..
include
fix(ulp): enable astyle linter and format ULP component
2024-01-22 11:43:38 +08:00
shared
/include
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
ulp_core
fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management
2025-02-19 16:02:25 +08:00
ulp_riscv_i2c.c
fix(lp-i2c): Fixed the generation of spurious I2C start with lp-i2c
2024-07-11 12:37:04 +02:00
ulp_riscv_lock.c
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
ulp_riscv.c
fix(ulp): enable astyle linter and format ULP component
2024-01-22 11:43:38 +08:00
wuzhenghui