KonstantinKondrashov 0a71dce1ef reset_reasons: EFUSE_RST is treated as POWERON_RST ...

ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.

2022-06-22 17:56:32 +08:00

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esp32/rom

spi_flash: move the unlock patch to bootloader and add support for GD

2021-10-11 10:52:52 +08:00

esp32c3/rom

efuse: update efuse name (backport v4.3)

2022-05-31 14:42:05 +08:00

esp32s2/rom

reset_reasons: EFUSE_RST is treated as POWERON_RST

2022-06-22 17:56:32 +08:00

esp32s3/rom

efuse: update efuse name (backport v4.3)

2022-05-31 14:42:05 +08:00

esp_rom_crc.h

esp_rom: extract common CRC apis into esp_rom_crc.h

2020-06-23 16:40:14 +08:00

esp_rom_efuse.h

esp_rom: extract common efuse apis into esp_rom_efuse.h

2020-07-15 10:40:50 +08:00

esp_rom_gpio.h

soc: combine xxx_caps.h into one soc_caps.h

2020-10-17 16:10:15 +08:00

esp_rom_md5.h

esp_rom: Allow passing any type of data pointer to md5, remove unchecked size on digest pointer

2021-05-30 23:21:14 +00:00

esp_rom_sys.h

esp_rom: added esp_rom_install_uart_printf

2020-12-11 11:45:10 +08:00

esp_rom_uart.h

Whitespace: Automated whitespace fixes (large commit)

2020-11-11 07:36:35 +00:00