mirror of https://github.com/espressif/esp-idf.git synced 2026-04-27 19:13:21 +00:00

Files

T

morris f2d62bba74 feat(gdma): expose interrupt priority as a configurable option

- Add intr_priority field to gdma_channel_t structure
- Add intr_bind_name field to gdma_signal_conn_t for interrupt binding
- Validate intr_priority during channel allocation (must be 0-3)
- Use ESP_INTR_FLAG_SHARED_PRIVATE instead of ESP_INTR_FLAG_SHARED
- Use esp_intr_alloc_info() with bind_by.name for shared interrupts
- Add interrupt priority configuration test case
- Update all gdma_periph.c files with pair-specific bind names (gdma_gXpY)

2026-04-01 10:42:22 +08:00

include/driver

docs: fix anonymous flags in various structs

2025-11-19 23:12:17 +08:00

src

feat(gdma): expose interrupt priority as a configurable option

2026-04-01 10:42:22 +08:00

test_apps

refactor(pcnt): use private shared interrupt groups

2026-03-27 22:53:14 +08:00

CMakeLists.txt

feat(hal): graudate the PCNT hal driver into a new component

2025-11-13 16:52:45 +08:00

Kconfig

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linker.lf

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README.md

fix(pcnt): fix the accum_value missing when overflow

2025-07-02 11:27:15 +08:00

README.md

PCNT Driver Design

Concurrency

The count value and the overflow state of the count value are located in different registers, resulting in the software being unable to obtain information from both of them in the same read instruction.

The race condition case is as follow:

sequenceDiagram
    participant HW as PCNT Hardware
    participant CPU0_ISR as CPU0_ISR
    participant CPU1_Task as CPU1_Task (pcnt_unit_get_count)
    participant REG as Reg and Soft accum counter State

    CPU1_Task->>CPU1_Task: Call pcnt_unit_get_count()
    Note over REG: intr_status = 0<br/>cnt_reg = cnt_value<br/>accum_value = old_value
    CPU1_Task->>CPU1_Task: portENTER_CRITICAL_SAFE()
    CPU1_Task->>REG: Read intr_status
    Note over CPU1_Task: intr_status=0, no need to do compensation
    HW->>REG: Overflow interrupt triggered
    Note over REG: intr_status = 1<br/>cnt_reg = 0<br/>accum_value = old_value
    REG->>CPU0_ISR: ISR is called
    CPU0_ISR->>CPU0_ISR: try portENTER_CRITICAL_SAFE() but spin

    CPU1_Task->>REG: Read cnt_reg(0) + accum_value(old)
    CPU1_Task->>CPU1_Task: portEXIT_CRITICAL_SAFE()

    CPU0_ISR->>CPU0_ISR: portENTER_CRITICAL_SAFE()
    CPU0_ISR->>REG: Clear interrupt status and update accum_value
    Note over REG: intr_status = 0<br/>accum_value = new_value
    CPU0_ISR->>CPU0_ISR: portEXIT_CRITICAL_SAFE()
    
    Note over CPU0_ISR: Process events
    Note over CPU1_Task: Return incorrect count ❌

In the software, we determine whether to perform compensation by checking whether the count value exceeds half of the limit. This can prevent counting errors when the overflow frequency is not high.