mirror of
https://github.com/espressif/esp-idf.git
synced 2026-04-27 11:03:11 +00:00
Sahil Yadav
132 lines
4.0 KiB
C
132 lines
4.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_log.h"
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#include "driver/spi_slave.h"
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#include "driver/gpio.h"
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#include "ble_spi_slave.h"
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/*
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SPI receiver (slave) example.
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This example is supposed to work together with a NimBLE module acting as SPI master.
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It uses the standard SPI pins (MISO, MOSI, SCLK, CS) to transmit logs over in a
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half-duplex fashion, that is, the master puts data on the MOSI pin, while the MISO pins
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remain inactive.
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*/
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//Dummy callback called after a transaction is queued and ready for pickup by master.
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static void my_post_setup_cb(spi_slave_transaction_t *trans)
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{
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return;
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}
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//Dummy callback called after transaction is sent/received.
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static void my_post_trans_cb(spi_slave_transaction_t *trans)
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{
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return;
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}
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//Main application
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void app_main(void)
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{
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int n = 0;
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esp_err_t ret;
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spi_slave_transaction_t t = {0};
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//Configuration for the SPI bus
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spi_bus_config_t buscfg = {
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.mosi_io_num = GPIO_MOSI,
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.miso_io_num = -1,
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.sclk_io_num = GPIO_SCLK,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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};
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//Configuration for the SPI slave interface
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spi_slave_interface_config_t slvcfg = {
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.mode = 0,
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.spics_io_num = GPIO_CS,
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.queue_size = 3,
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.flags = 0,
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.post_setup_cb = my_post_setup_cb,
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.post_trans_cb = my_post_trans_cb
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};
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//Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
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gpio_set_pull_mode(GPIO_MOSI, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(GPIO_SCLK, GPIO_PULLUP_ONLY);
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gpio_set_pull_mode(GPIO_CS, GPIO_PULLUP_ONLY);
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/**
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* The default drive capability on esp32 is GPIO_DRIVE_CAP_2 (~20 mA).
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* When connecting master devices that uses a source/sink current lower or higher than GPIO_DRIVER_CAP_DEFAULT.
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* Using a drive strength that does not match the requirements of the connected device can cause issues
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* such as unreliable switching, or damage to the GPIO pin or external device.
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*
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* - GPIO_DRIVE_CAP_0: ~5 mA
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* - GPIO_DRIVE_CAP_1: ~10 mA
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* - GPIO_DRIVE_CAP_2: ~20 mA
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* - GPIO_DRIVE_CAP_3: ~40 mA
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gpio_set_drive_capability(GPIO_MOSI, GPIO_DRIVE_CAP_3);
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gpio_set_drive_capability(GPIO_SCLK, GPIO_DRIVE_CAP_3);
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gpio_set_drive_capability(GPIO_CS, GPIO_DRIVE_CAP_3);
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**/
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//Initialize SPI slave interface
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ret = spi_slave_initialize(RCV_HOST, &buscfg, &slvcfg, SPI_DMA_CH_AUTO);
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assert(ret == ESP_OK);
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// For SPI DMA, buffers should be word-aligned.
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WORD_ALIGNED_ATTR uint8_t recvbuf[1024];
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while (1) {
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//Clear receive buffer, set send buffer to something sane
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memset(recvbuf, 0x00, 1024);
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//Set up a transaction of 1024 bytes to receive
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t.length = 1024 * 8;
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t.tx_buffer = NULL;
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t.rx_buffer = recvbuf;
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/* This call enables the SPI slave interface to receive to the recvbuf. The transaction is
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* initialized by the SPI master, however, so it will not actually happen until the master starts a hardware transaction
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* by pulling CS low and pulsing the clock etc.
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*/
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ret = spi_slave_transmit(RCV_HOST, &t, portMAX_DELAY);
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/* Get the actual number of bytes received */
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int rcv_bytes = t.trans_len / 8;
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if (rcv_bytes == 0) {
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rcv_bytes = 1024; // Fallback if hardware didn't report exact length
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}
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/* Print the binary buffer in safe 32-byte chunks */
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for (int i = 0; i < rcv_bytes; i++) {
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// Print the raw byte (ignoring null-terminators)
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printf("%02X ", recvbuf[i]);
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// Break the line to prevent ESP-IDF terminal truncation
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if ((i + 1) % 32 == 0 || i == rcv_bytes - 1) {
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printf("\n");
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}
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}
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n++;
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}
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}
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