Files
esp-idf/components/esp_hal_dma/esp32c61/include/hal/gdma_ll.h
T

52 lines
1.3 KiB
C

/*
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/pcr_struct.h"
#include "hal/ahb_dma_ll.h"
#define GDMA_LL_GET(_attr) GDMA_LL_ ## _attr
#define GDMA_LL_INST_NUM 1
#define GDMA_LL_PAIRS_PER_INST GDMA_LL_AHB_PAIRS_PER_GROUP
#define GDMA_LL_AHB_PSRAM_CAPABLE 1
#define GDMA_LL_AHB_BURST_SIZE_ADJUSTABLE 1 // AHB GDMA supports adjustable burst size
#define GDMA_LL_MAX_BURST_SIZE_PSRAM 32 // PSRAM controller doesn't support burst access with size > 32 bytes
#define GDMA_LL_ACCESS_ENCRYPTION_MEM_ALIGNMENT 16 // The alignment of the memory and size when DMA accesses encrypted memory
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable the bus clock for the DMA module
*/
static inline void _gdma_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.gdma_conf.gdma_clk_en = enable;
}
#define gdma_ll_enable_bus_clock(...) _gdma_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the DMA module
*/
static inline void _gdma_ll_reset_register(int group_id)
{
(void)group_id;
PCR.gdma_conf.gdma_rst_en = 1;
PCR.gdma_conf.gdma_rst_en = 0;
}
#define gdma_ll_reset_register(...) _gdma_ll_reset_register(__VA_ARGS__)
#ifdef __cplusplus
}
#endif