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espressif/esp-idf
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d488bb7bacca80e6089bdf070bb1e10324d31dbb
esp-idf/components/soc
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krzychb d488bb7bac Provided more meaningful parameter names by renaming 'bit_num' to 'duty_resolution' and 'div_num' to 'clock_divider'
2017-11-15 08:08:12 +01:00
..
esp32
Provided more meaningful parameter names by renaming 'bit_num' to 'duty_resolution' and 'div_num' to 'clock_divider'
2017-11-15 08:08:12 +01:00
include/soc
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00
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