Mahavir Jain 4ad401f872 Merge branch 'bugfix/update_ecdsa_api_for_c5' into 'master' ...

fix(hal): update ECDSA API to set register values correctly for ESP32C5

See merge request espressif/esp-idf!31219

2024-06-04 12:14:01 +08:00

..

beta3/include/hal

feat(gdma): set burst size and return alignment constraint

2024-05-24 22:43:55 +08:00

include/hal

Merge branch 'bugfix/update_ecdsa_api_for_c5' into 'master'

2024-06-04 12:14:01 +08:00

mp/include/hal

feat(gdma): set burst size and return alignment constraint

2024-05-24 22:43:55 +08:00

clk_tree_hal.c

feat(esp_hw_support): support esp32p4 clock output

2024-04-17 15:09:49 +08:00

efuse_hal.c

feat: enabled ecdsa support for c5

2024-05-28 17:33:05 +05:30

modem_clock_hal.c

change(pm): esp32c5 hardware does not have clk_fe_cal_160m_en

2024-03-26 19:59:05 +08:00

pau_hal.c

fix(ci): bypass c5mp ci check

2024-04-10 20:45:49 +08:00

pmu_hal.c

change(esp32c5): update soc files for esp32c5 beta3

2023-12-28 10:23:15 +08:00