463 lines
14 KiB
C
463 lines
14 KiB
C
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/******************************************************************************/
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/*** include files ***/
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/******************************************************************************/
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#include "i2s_data_bus.h"
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#include <driver/periph_ctrl.h>
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#include <esp_heap_caps.h>
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#include <rom/lldesc.h>
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#include <soc/i2s_reg.h>
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#include <soc/i2s_struct.h>
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#include <soc/rtc.h>
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#include "esp_err.h"
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#include "esp_lcd_panel_io.h"
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#include "esp_log.h"
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/******************************************************************************/
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/*** macro definitions ***/
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/******************************************************************************/
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#define USER_I2S_REG 0
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/******************************************************************************/
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/*** type definitions ***/
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/******************************************************************************/
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static const char* TAG = "I80";
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/// DMA descriptors for front and back line buffer.
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/// We use two buffers, so one can be filled while the other
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/// is transmitted.
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typedef struct {
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volatile lldesc_t* dma_desc_a;
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volatile lldesc_t* dma_desc_b;
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/// Front and back line buffer.
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uint8_t* buf_a;
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uint8_t* buf_b;
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} i2s_parallel_state_t;
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static esp_lcd_panel_io_handle_t io_handle = NULL;
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/******************************************************************************/
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/*** local function prototypes ***/
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/******************************************************************************/
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#if USER_I2S_REG
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/**
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* @brief Initializes a DMA descriptor.
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*/
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static void fill_dma_desc(volatile lldesc_t* dmadesc,
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uint8_t* buf,
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i2s_bus_config* cfg);
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/**
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* @brief Address of the currently front DMA descriptor, which uses only the
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* lower 20bits (according to TRM)
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*/
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static uint32_t dma_desc_addr();
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/**
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* @brief Set up a GPIO as output and route it to a signal.
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*/
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static void gpio_setup_out(int32_t gpio, int32_t sig, bool invert);
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#endif
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#if USER_I2S_REG
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/**
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* @brief Resets "Start Pulse" signal when the current row output is done.
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*/
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static void IRAM_ATTR i2s_int_hdl(void* arg);
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#endif
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/******************************************************************************/
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/*** exported variables ***/
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/******************************************************************************/
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/******************************************************************************/
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/*** local variables ***/
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/******************************************************************************/
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#if USER_I2S_REG
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/**
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* @brief Indicates which line buffer is currently back / front.
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*/
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static int32_t current_buffer = 0;
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#endif
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/**
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* @brief The I2S state instance.
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*/
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static i2s_parallel_state_t i2s_state;
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static intr_handle_t gI2S_intr_handle = NULL;
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/**
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* @brief Indicates the device has finished its transmission and is ready again.
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*/
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static volatile bool output_done = true;
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/**
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* @brief The start pulse pin extracted from the configuration for use in
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* the "done" interrupt.
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*/
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// static gpio_num_t start_pulse_pin;
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static uint8_t buffer[(960 + 32) / 4] = {0};
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/******************************************************************************/
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/*** exported functions ***/
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/******************************************************************************/
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#if USER_I2S_REG
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volatile uint8_t IRAM_ATTR* i2s_get_current_buffer() {
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return current_buffer ? i2s_state.dma_desc_a->buf : i2s_state.dma_desc_b->buf;
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}
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#else
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volatile uint8_t IRAM_ATTR* i2s_get_current_buffer() {
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return buffer;
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}
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#endif
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#if USER_I2S_REG
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bool IRAM_ATTR i2s_is_busy() {
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// DMA and FIFO must be done
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#ifdef CONFIG_IDF_TARGET_ESP32
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return !output_done || !I2S1.state.tx_idle;
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#elif CONFIG_IDF_TARGET_ESP32S3
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// i2s_dev_t *dev = &I2S0;
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return !output_done || !I2S1.state.tx_idle;
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#else
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#error "Unknown SOC"
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#endif
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}
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#else
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bool IRAM_ATTR i2s_is_busy() {
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return !output_done;
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}
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#endif
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#if USER_I2S_REG
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void IRAM_ATTR i2s_switch_buffer() {
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// either device is done transmitting or the switch must be away from the
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// buffer currently used by the DMA engine.
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#if CONFIG_IDF_TARGET_ESP32
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while (i2s_is_busy() && dma_desc_addr() != I2S1.out_link.addr)
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;
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#elif CONFIG_IDF_TARGET_ESP32S3
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i2s_dev_t* dev = &I2S0;
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#else
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#error "Unknown SOC"
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#endif
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current_buffer = !current_buffer;
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}
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#else
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void IRAM_ATTR i2s_switch_buffer() {}
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#endif
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#if USER_I2S_REG
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void IRAM_ATTR i2s_start_line_output() {
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output_done = false;
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#ifdef CONFIG_IDF_TARGET_ESP32
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i2s_dev_t* dev = &I2S1;
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#elif CONFIG_IDF_TARGET_ESP32S3
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i2s_dev_t* dev = &I2S0;
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#else
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#error "Unknown SOC"
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#endif
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dev->conf.tx_start = 0;
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dev->conf.tx_reset = 1;
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dev->conf.tx_fifo_reset = 1;
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dev->conf.rx_fifo_reset = 1;
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dev->conf.tx_reset = 0;
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dev->conf.tx_fifo_reset = 0;
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dev->conf.rx_fifo_reset = 0;
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dev->out_link.addr = dma_desc_addr();
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dev->out_link.start = 1;
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// sth is pulled up through peripheral interrupt
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gpio_set_level(start_pulse_pin, 0);
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dev->conf.tx_start = 1;
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}
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#else
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void IRAM_ATTR i2s_start_line_output() {
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output_done = false;
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esp_lcd_panel_io_tx_color(io_handle, 0, buffer, (960 + 32) / 4);
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}
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#endif
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#if !USER_I2S_REG
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static bool notify_trans_done(esp_lcd_panel_io_handle_t panel_io,
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esp_lcd_panel_io_event_data_t* edata,
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void* user_ctx) {
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// gpio_set_level(start_pulse_pin, 1);
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output_done = true;
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return output_done;
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}
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#endif
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#if USER_I2S_REG
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void i2s_bus_init(i2s_bus_config* cfg) {
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// TODO: Why?
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gpio_num_t I2S_GPIO_BUS[] = {cfg->data_6, cfg->data_7, cfg->data_4,
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cfg->data_5, cfg->data_2, cfg->data_3,
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cfg->data_0, cfg->data_1};
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gpio_set_direction(cfg->start_pulse, GPIO_MODE_OUTPUT);
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gpio_set_level(cfg->start_pulse, 1);
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// store pin in global variable for use in interrupt.
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start_pulse_pin = cfg->start_pulse;
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// Use I2S1 with no signal offset (for some reason the offset seems to be
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// needed in 16-bit mode, but not in 8 bit mode.
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int32_t signal_base = I2S1O_DATA_OUT0_IDX;
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// Setup and route GPIOS
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for (int32_t x = 0; x < 8; x++) {
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gpio_setup_out(I2S_GPIO_BUS[x], signal_base + x, false);
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}
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// Invert word select signal
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gpio_setup_out(cfg->clock, I2S1O_WS_OUT_IDX, true);
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periph_module_enable(PERIPH_I2S1_MODULE);
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#ifdef CONFIG_IDF_TARGET_ESP32
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i2s_dev_t* dev = &I2S1;
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#elif CONFIG_IDF_TARGET_ESP32S3
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i2s_dev_t* dev = &I2S0;
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#else
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#error "Unknown SOC"
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#endif
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// Initialize device
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dev->conf.tx_reset = 1;
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dev->conf.tx_reset = 0;
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// Reset DMA
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dev->lc_conf.in_rst = 1;
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dev->lc_conf.in_rst = 0;
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dev->lc_conf.out_rst = 1;
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dev->lc_conf.out_rst = 0;
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// Setup I2S config. See section 12 of Technical Reference Manual
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// Enable LCD mode
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dev->conf2.val = 0;
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dev->conf2.lcd_en = 1;
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// Enable FRAME1-Mode (See technical reference manual)
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dev->conf2.lcd_tx_wrx2_en = 1;
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dev->conf2.lcd_tx_sdx2_en = 0;
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// Set to 8 bit parallel output
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dev->sample_rate_conf.val = 0;
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dev->sample_rate_conf.tx_bits_mod = 8;
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// Half speed of bit clock in LCD mode.
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// (Smallest possible divider according to the spec).
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dev->sample_rate_conf.tx_bck_div_num = 2;
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// #if defined(CONFIG_EPD_DISPLAY_TYPE_ED097OC4_LQ)
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// Initialize Audio Clock (APLL) for 120 Mhz.
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rtc_clk_apll_enable(1, 0, 0, 8, 0);
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// #else
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// Initialize Audio Clock (APLL) for 80 Mhz.
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// rtc_clk_apll_enable(1, 0, 0, 8, 1);
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// #endif
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// Set Audio Clock Dividers
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dev->clkm_conf.val = 0;
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dev->clkm_conf.clka_en = 1;
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dev->clkm_conf.clkm_div_a = 1;
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dev->clkm_conf.clkm_div_b = 0;
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// 2 is the smallest possible divider according to the spec.
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dev->clkm_conf.clkm_div_num = 2;
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// Set up FIFO
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dev->fifo_conf.val = 0;
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dev->fifo_conf.tx_fifo_mod_force_en = 1;
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dev->fifo_conf.tx_fifo_mod = 1;
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dev->fifo_conf.tx_data_num = 32;
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dev->fifo_conf.dscr_en = 1;
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// Stop after transmission complete
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dev->conf1.val = 0;
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dev->conf1.tx_stop_en = 1;
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dev->conf1.tx_pcm_bypass = 1;
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// Configure TX channel
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dev->conf_chan.val = 0;
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dev->conf_chan.tx_chan_mod = 1;
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dev->conf.tx_right_first = 1;
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dev->timing.val = 0;
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// Allocate DMA descriptors
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i2s_state.buf_a = heap_caps_malloc(cfg->epd_row_width / 4, MALLOC_CAP_DMA);
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i2s_state.buf_b = heap_caps_malloc(cfg->epd_row_width / 4, MALLOC_CAP_DMA);
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i2s_state.dma_desc_a = heap_caps_malloc(sizeof(lldesc_t), MALLOC_CAP_DMA);
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i2s_state.dma_desc_b = heap_caps_malloc(sizeof(lldesc_t), MALLOC_CAP_DMA);
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// and fill them
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fill_dma_desc(i2s_state.dma_desc_a, i2s_state.buf_a, cfg);
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fill_dma_desc(i2s_state.dma_desc_b, i2s_state.buf_b, cfg);
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// enable "done" interrupt
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SET_PERI_REG_BITS(I2S_INT_ENA_REG(1), I2S_OUT_DONE_INT_ENA_V, 1,
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I2S_OUT_DONE_INT_ENA_S);
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// register interrupt
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esp_intr_alloc(ETS_I2S1_INTR_SOURCE, 0, i2s_int_hdl, 0, &gI2S_intr_handle);
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// Reset FIFO/DMA
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dev->lc_conf.in_rst = 1;
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dev->lc_conf.out_rst = 1;
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dev->lc_conf.ahbm_rst = 1;
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dev->lc_conf.ahbm_fifo_rst = 1;
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dev->lc_conf.in_rst = 0;
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dev->lc_conf.out_rst = 0;
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dev->lc_conf.ahbm_rst = 0;
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dev->lc_conf.ahbm_fifo_rst = 0;
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dev->conf.tx_reset = 1;
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dev->conf.tx_fifo_reset = 1;
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dev->conf.rx_fifo_reset = 1;
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dev->conf.tx_reset = 0;
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dev->conf.tx_fifo_reset = 0;
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dev->conf.rx_fifo_reset = 0;
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// Start dma on front buffer
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dev->lc_conf.val =
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I2S_OUT_DATA_BURST_EN | I2S_OUTDSCR_BURST_EN | I2S_OUT_DATA_BURST_EN;
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dev->out_link.addr = ((uint32_t)(i2s_state.dma_desc_a));
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dev->out_link.start = 1;
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dev->int_clr.val = dev->int_raw.val;
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dev->int_ena.val = 0;
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dev->int_ena.out_done = 1;
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dev->conf.tx_start = 0;
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}
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#else
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void i2s_bus_init(i2s_bus_config* cfg) {
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// TODO: Why?
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// gpio_num_t I2S_GPIO_BUS[] = {cfg->data_6, cfg->data_7, cfg->data_4,
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// cfg->data_5, cfg->data_2, cfg->data_3,
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// cfg->data_0, cfg->data_1};
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// gpio_set_direction(cfg->start_pulse, GPIO_MODE_OUTPUT);
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// gpio_set_level(cfg->start_pulse, 1);
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// // store pin in global variable for use in interrupt.
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// start_pulse_pin = cfg->start_pulse;
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ESP_LOGI(TAG, "Initialize Intel 8080 bus");
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esp_lcd_i80_bus_handle_t i80_bus = NULL;
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esp_lcd_i80_bus_config_t bus_config = {
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.dc_gpio_num = cfg->start_pulse,
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.wr_gpio_num = cfg->clock,
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.clk_src = LCD_CLK_SRC_XTAL,
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.data_gpio_nums =
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{
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cfg->data_6,
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cfg->data_7,
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cfg->data_4,
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cfg->data_5,
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cfg->data_2,
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cfg->data_3,
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cfg->data_0,
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cfg->data_1,
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},
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.bus_width = 8,
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.max_transfer_bytes = (cfg->epd_row_width + 32) / 4};
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ESP_ERROR_CHECK(esp_lcd_new_i80_bus(&bus_config, &i80_bus));
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esp_lcd_panel_io_i80_config_t io_config = {
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.cs_gpio_num = -1,
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.pclk_hz = 10 * 1000 * 1000,
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.trans_queue_depth = 10,
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.dc_levels =
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{
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.dc_idle_level = 0,
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.dc_cmd_level = 1,
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.dc_dummy_level = 0,
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.dc_data_level = 0,
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},
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.on_color_trans_done = notify_trans_done,
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.user_ctx = NULL,
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.lcd_cmd_bits = 10,
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.lcd_param_bits = 0,
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// .flags.reverse_color_bits = 1
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};
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ESP_ERROR_CHECK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle));
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}
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#endif
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void i2s_deinit() {
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esp_intr_free(gI2S_intr_handle);
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free(i2s_state.buf_a);
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free(i2s_state.buf_b);
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free((void*)i2s_state.dma_desc_a);
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free((void*)i2s_state.dma_desc_b);
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periph_module_disable(PERIPH_I2S1_MODULE);
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}
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/******************************************************************************/
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/*** local functions ***/
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/******************************************************************************/
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#if USER_I2S_REG
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/// Initializes a DMA descriptor.
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static void fill_dma_desc(volatile lldesc_t* dmadesc,
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uint8_t* buf,
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i2s_bus_config* cfg) {
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dmadesc->size = cfg->epd_row_width / 4;
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dmadesc->length = cfg->epd_row_width / 4;
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dmadesc->buf = buf;
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dmadesc->eof = 1;
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dmadesc->sosf = 1;
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dmadesc->owner = 1;
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dmadesc->qe.stqe_next = 0;
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dmadesc->offset = 0;
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}
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/// Address of the currently front DMA descriptor,
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/// which uses only the lower 20bits (according to TRM)
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static uint32_t dma_desc_addr() {
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return (uint32_t)(current_buffer ? i2s_state.dma_desc_a
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: i2s_state.dma_desc_b) &
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0x000FFFFF;
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}
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/// Set up a GPIO as output and route it to a signal.
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static void gpio_setup_out(int32_t gpio, int32_t sig, bool invert) {
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if (gpio == -1)
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return;
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[gpio], PIN_FUNC_GPIO);
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gpio_set_direction(gpio, GPIO_MODE_DEF_OUTPUT);
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gpio_matrix_out(gpio, sig, invert, false);
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}
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/// Resets "Start Pulse" signal when the current row output is done.
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static void IRAM_ATTR i2s_int_hdl(void* arg) {
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#ifdef CONFIG_IDF_TARGET_ESP32
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i2s_dev_t* dev = &I2S1;
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#elif CONFIG_IDF_TARGET_ESP32S3
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i2s_dev_t* dev = &I2S0;
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#else
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#error "Unknown SOC"
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#endif
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if (dev->int_st.out_done) {
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gpio_set_level(start_pulse_pin, 1);
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output_done = true;
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}
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// Clear the interrupt. Otherwise, the whole device would hang.
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dev->int_clr.val = dev->int_raw.val;
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}
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#endif
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/******************************************************************************/
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/*** END OF FILE ***/
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/******************************************************************************/ |