espressif/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-04-27 19:13:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

change(soc): cleanup is_top_domain_module for all targets

Browse Source
This commit is contained in:
wuzhenghui
2026-02-26 15:41:37 +08:00
parent e923a54686
commit 123dec8b7d
7 changed files with 161 additions and 355 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/soc/esp32c5/include/soc/retention_periph_defs.h
+27 -54
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,39 +16,39 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 9,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_ADC = 11,
SLEEP_RETENTION_MODULE_I2C0 = 12,
SLEEP_RETENTION_MODULE_RMT0 = 13,
SLEEP_RETENTION_MODULE_UART0 = 14,
SLEEP_RETENTION_MODULE_UART1 = 15,
SLEEP_RETENTION_MODULE_I2S0 = 16,
SLEEP_RETENTION_MODULE_ETM0 = 17,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 18,
SLEEP_RETENTION_MODULE_PARLIO0 = 19,
SLEEP_RETENTION_MODULE_GPSPI2 = 20,
SLEEP_RETENTION_MODULE_LEDC = 21,
SLEEP_RETENTION_MODULE_MCPWM0 = 22,
SLEEP_RETENTION_MODULE_SDM0 = 23,
SLEEP_RETENTION_MODULE_TWAI0 = 24,
SLEEP_RETENTION_MODULE_TWAI1 = 25,
SLEEP_RETENTION_MODULE_ADC = 10,
SLEEP_RETENTION_MODULE_I2C0 = 11,
SLEEP_RETENTION_MODULE_RMT0 = 12,
SLEEP_RETENTION_MODULE_UART0 = 13,
SLEEP_RETENTION_MODULE_UART1 = 14,
SLEEP_RETENTION_MODULE_I2S0 = 15,
SLEEP_RETENTION_MODULE_ETM0 = 16,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 17,
SLEEP_RETENTION_MODULE_PARLIO0 = 18,
SLEEP_RETENTION_MODULE_GPSPI2 = 19,
SLEEP_RETENTION_MODULE_LEDC = 20,
SLEEP_RETENTION_MODULE_MCPWM0 = 21,
SLEEP_RETENTION_MODULE_SDM0 = 22,
SLEEP_RETENTION_MODULE_TWAI0 = 23,
SLEEP_RETENTION_MODULE_TWAI1 = 24,
/* modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 25,
SLEEP_RETENTION_MODULE_WIFI_MAC = 26,
SLEEP_RETENTION_MODULE_WIFI_BB = 27,
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
@@ -59,34 +59,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI1) ? true \
: false)
#define is_top_domain_module(m) (m <= SLEEP_RETENTION_MODULE_SDM0)
#ifdef __cplusplus
}
components/soc/esp32c6/include/soc/retention_periph_defs.h
+27 -53
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,39 +16,39 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 9,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_ADC = 11,
SLEEP_RETENTION_MODULE_I2C0 = 12,
SLEEP_RETENTION_MODULE_RMT0 = 13,
SLEEP_RETENTION_MODULE_UART0 = 14,
SLEEP_RETENTION_MODULE_UART1 = 15,
SLEEP_RETENTION_MODULE_I2S0 = 16,
SLEEP_RETENTION_MODULE_ETM0 = 17,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 18,
SLEEP_RETENTION_MODULE_TWAI0 = 19,
SLEEP_RETENTION_MODULE_TWAI1 = 20,
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
SLEEP_RETENTION_MODULE_SDM0 = 25,
SLEEP_RETENTION_MODULE_ADC = 10,
SLEEP_RETENTION_MODULE_I2C0 = 11,
SLEEP_RETENTION_MODULE_RMT0 = 12,
SLEEP_RETENTION_MODULE_UART0 = 13,
SLEEP_RETENTION_MODULE_UART1 = 14,
SLEEP_RETENTION_MODULE_I2S0 = 15,
SLEEP_RETENTION_MODULE_ETM0 = 16,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 17,
SLEEP_RETENTION_MODULE_TWAI0 = 18,
SLEEP_RETENTION_MODULE_TWAI1 = 19,
SLEEP_RETENTION_MODULE_PARLIO0 = 20,
SLEEP_RETENTION_MODULE_GPSPI2 = 21,
SLEEP_RETENTION_MODULE_LEDC = 22,
SLEEP_RETENTION_MODULE_MCPWM0 = 23,
SLEEP_RETENTION_MODULE_SDM0 = 24,
/* Modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 25,
SLEEP_RETENTION_MODULE_WIFI_MAC = 26,
SLEEP_RETENTION_MODULE_WIFI_BB = 27,
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
@@ -58,33 +58,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: false)
#define is_top_domain_module(m) (m <= SLEEP_RETENTION_MODULE_SDM0)
#ifdef __cplusplus
}
components/soc/esp32c61/include/soc/retention_periph_defs.h
+20 -39
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,32 +16,32 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target */
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_I2C0 = 12,
SLEEP_RETENTION_MODULE_UART0 = 14,
SLEEP_RETENTION_MODULE_UART1 = 15,
SLEEP_RETENTION_MODULE_UART2 = 16,
SLEEP_RETENTION_MODULE_ETM0 = 17,
SLEEP_RETENTION_MODULE_GPSPI2 = 18,
SLEEP_RETENTION_MODULE_LEDC = 19,
SLEEP_RETENTION_MODULE_I2S0 = 20,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 21,
SLEEP_RETENTION_MODULE_I2C0 = 9,
SLEEP_RETENTION_MODULE_UART0 = 10,
SLEEP_RETENTION_MODULE_UART1 = 11,
SLEEP_RETENTION_MODULE_UART2 = 12,
SLEEP_RETENTION_MODULE_ETM0 = 13,
SLEEP_RETENTION_MODULE_GPSPI2 = 14,
SLEEP_RETENTION_MODULE_LEDC = 15,
SLEEP_RETENTION_MODULE_I2S0 = 16,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 17,
/* Modem module, which includes WiFi, BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 25,
SLEEP_RETENTION_MODULE_WIFI_MAC = 26,
SLEEP_RETENTION_MODULE_WIFI_BB = 27,
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
@@ -51,26 +51,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: false)
#define is_top_domain_module(m) (m <= SLEEP_RETENTION_MODULE_TEMP_SENSOR)
#ifdef __cplusplus
}
components/soc/esp32h2/include/soc/retention_periph_defs.h
+27 -53
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,39 +16,39 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 9,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_ADC = 11,
SLEEP_RETENTION_MODULE_I2C0 = 12,
SLEEP_RETENTION_MODULE_I2C1 = 13,
SLEEP_RETENTION_MODULE_RMT0 = 14,
SLEEP_RETENTION_MODULE_UART0 = 15,
SLEEP_RETENTION_MODULE_UART1 = 16,
SLEEP_RETENTION_MODULE_I2S0 = 17,
SLEEP_RETENTION_MODULE_ETM0 = 18,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 19,
SLEEP_RETENTION_MODULE_TWAI0 = 20,
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
SLEEP_RETENTION_MODULE_SDM0 = 25,
SLEEP_RETENTION_MODULE_ADC = 10,
SLEEP_RETENTION_MODULE_I2C0 = 11,
SLEEP_RETENTION_MODULE_I2C1 = 12,
SLEEP_RETENTION_MODULE_RMT0 = 13,
SLEEP_RETENTION_MODULE_UART0 = 14,
SLEEP_RETENTION_MODULE_UART1 = 15,
SLEEP_RETENTION_MODULE_I2S0 = 16,
SLEEP_RETENTION_MODULE_ETM0 = 17,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 18,
SLEEP_RETENTION_MODULE_TWAI0 = 19,
SLEEP_RETENTION_MODULE_PARLIO0 = 20,
SLEEP_RETENTION_MODULE_GPSPI2 = 21,
SLEEP_RETENTION_MODULE_LEDC = 22,
SLEEP_RETENTION_MODULE_MCPWM0 = 23,
SLEEP_RETENTION_MODULE_SDM0 = 24,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 26,
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
@@ -56,33 +56,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: false)
#define is_top_domain_module(m) ((m) <= SLEEP_RETENTION_MODULE_SDM0)
#ifdef __cplusplus
}
components/soc/esp32h21/include/soc/retention_periph_defs.h
+27 -53
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,39 +16,39 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 9,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_ADC = 11,
SLEEP_RETENTION_MODULE_I2C0 = 12,
SLEEP_RETENTION_MODULE_I2C1 = 13,
SLEEP_RETENTION_MODULE_RMT0 = 14,
SLEEP_RETENTION_MODULE_UART0 = 15,
SLEEP_RETENTION_MODULE_UART1 = 16,
SLEEP_RETENTION_MODULE_I2S0 = 17,
SLEEP_RETENTION_MODULE_ETM0 = 18,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 19,
SLEEP_RETENTION_MODULE_TWAI0 = 20,
SLEEP_RETENTION_MODULE_PARLIO0 = 21,
SLEEP_RETENTION_MODULE_GPSPI2 = 22,
SLEEP_RETENTION_MODULE_LEDC = 23,
SLEEP_RETENTION_MODULE_MCPWM0 = 24,
SLEEP_RETENTION_MODULE_SDM0 = 25,
SLEEP_RETENTION_MODULE_ADC = 10,
SLEEP_RETENTION_MODULE_I2C0 = 11,
SLEEP_RETENTION_MODULE_I2C1 = 12,
SLEEP_RETENTION_MODULE_RMT0 = 13,
SLEEP_RETENTION_MODULE_UART0 = 14,
SLEEP_RETENTION_MODULE_UART1 = 15,
SLEEP_RETENTION_MODULE_I2S0 = 16,
SLEEP_RETENTION_MODULE_ETM0 = 17,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 18,
SLEEP_RETENTION_MODULE_TWAI0 = 19,
SLEEP_RETENTION_MODULE_PARLIO0 = 20,
SLEEP_RETENTION_MODULE_GPSPI2 = 21,
SLEEP_RETENTION_MODULE_LEDC = 22,
SLEEP_RETENTION_MODULE_MCPWM0 = 23,
SLEEP_RETENTION_MODULE_SDM0 = 24,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 26,
SLEEP_RETENTION_MODULE_BLE_MAC = 28,
SLEEP_RETENTION_MODULE_BT_BB = 29,
SLEEP_RETENTION_MODULE_802154_MAC = 30,
@@ -56,33 +56,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: false)
#define is_top_domain_module(m) ((m) <= SLEEP_RETENTION_MODULE_SDM0)
#ifdef __cplusplus
}
components/soc/esp32h4/include/soc/retention_periph_defs.h
+31 -61
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -16,43 +16,43 @@ extern "C" {
typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MIN = 0,
SLEEP_RETENTION_MODULE_NULL = SLEEP_RETENTION_MODULE_MIN, /* This module is for all peripherals that can't survive from PD_TOP to call init only. Shouldn't have any dependency. */
/* clock module, which includes system and modem */
/* clock module */
SLEEP_RETENTION_MODULE_CLOCK_SYSTEM = 1,
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 2,
/* digital peripheral module, which includes Interrupt Matrix, HP_SYSTEM,
* TEE, APM, UART, IOMUX, SPIMEM, SysTimer, etc.. */
SLEEP_RETENTION_MODULE_SYS_PERIPH = 3,
SLEEP_RETENTION_MODULE_SYS_PERIPH = 2,
/* Timer Group by target*/
SLEEP_RETENTION_MODULE_TG0_WDT = 4,
SLEEP_RETENTION_MODULE_TG1_WDT = 5,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 6,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 7,
SLEEP_RETENTION_MODULE_TG0_WDT = 3,
SLEEP_RETENTION_MODULE_TG1_WDT = 4,
SLEEP_RETENTION_MODULE_TG0_TIMER0 = 5,
SLEEP_RETENTION_MODULE_TG1_TIMER0 = 6,
/* GDMA by channel */
SLEEP_RETENTION_MODULE_GDMA_CH0 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH3 = 11,
SLEEP_RETENTION_MODULE_GDMA_CH4 = 12,
SLEEP_RETENTION_MODULE_GDMA_CH0 = 7,
SLEEP_RETENTION_MODULE_GDMA_CH1 = 8,
SLEEP_RETENTION_MODULE_GDMA_CH2 = 9,
SLEEP_RETENTION_MODULE_GDMA_CH3 = 10,
SLEEP_RETENTION_MODULE_GDMA_CH4 = 11,
/* MISC Peripherals */
SLEEP_RETENTION_MODULE_ADC = 13,
SLEEP_RETENTION_MODULE_I2C0 = 14,
SLEEP_RETENTION_MODULE_I2C1 = 15,
SLEEP_RETENTION_MODULE_RMT0 = 16,
SLEEP_RETENTION_MODULE_UART0 = 17,
SLEEP_RETENTION_MODULE_UART1 = 18,
SLEEP_RETENTION_MODULE_I2S0 = 19,
SLEEP_RETENTION_MODULE_ETM0 = 20,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 21,
SLEEP_RETENTION_MODULE_TWAI0 = 22,
SLEEP_RETENTION_MODULE_PARLIO0 = 23,
SLEEP_RETENTION_MODULE_GPSPI2 = 24,
SLEEP_RETENTION_MODULE_GPSPI3 = 25,
SLEEP_RETENTION_MODULE_LEDC = 26,
SLEEP_RETENTION_MODULE_MCPWM0 = 27,
SLEEP_RETENTION_MODULE_MCPWM1 = 28,
SLEEP_RETENTION_MODULE_SDM0 = 29,
SLEEP_RETENTION_MODULE_ADC = 12,
SLEEP_RETENTION_MODULE_I2C0 = 13,
SLEEP_RETENTION_MODULE_I2C1 = 14,
SLEEP_RETENTION_MODULE_RMT0 = 15,
SLEEP_RETENTION_MODULE_UART0 = 16,
SLEEP_RETENTION_MODULE_UART1 = 17,
SLEEP_RETENTION_MODULE_I2S0 = 18,
SLEEP_RETENTION_MODULE_ETM0 = 19,
SLEEP_RETENTION_MODULE_TEMP_SENSOR = 20,
SLEEP_RETENTION_MODULE_TWAI0 = 21,
SLEEP_RETENTION_MODULE_PARLIO0 = 22,
SLEEP_RETENTION_MODULE_GPSPI2 = 23,
SLEEP_RETENTION_MODULE_GPSPI3 = 24,
SLEEP_RETENTION_MODULE_LEDC = 25,
SLEEP_RETENTION_MODULE_MCPWM0 = 26,
SLEEP_RETENTION_MODULE_MCPWM1 = 27,
SLEEP_RETENTION_MODULE_SDM0 = 28,
/* Modem module, which includes BLE and 802.15.4 */
SLEEP_RETENTION_MODULE_CLOCK_MODEM = 29,
SLEEP_RETENTION_MODULE_BLE_MAC = 30,
SLEEP_RETENTION_MODULE_BT_BB = 31,
SLEEP_RETENTION_MODULE_802154_MAC = 32,
@@ -60,37 +60,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GDMA_CH4) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ADC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TEMP_SENSOR) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: false)
#define is_top_domain_module(m) ((m) <= SLEEP_RETENTION_MODULE_SDM0)
#ifdef __cplusplus
}
components/soc/esp32p4/include/soc/retention_periph_defs.h
+2 -42
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -67,47 +67,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MAX = SOC_PM_RETENTION_MODULE_NUM - 1
} periph_retention_module_t;
#define is_top_domain_module(m) \
( ((m) == SLEEP_RETENTION_MODULE_NULL) ? true \
: ((m) == SLEEP_RETENTION_MODULE_CLOCK_SYSTEM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SYS_PERIPH) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_WDT) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG0_TIMER1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TG1_TIMER1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AHB_DMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_AXI_DMA_CH2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_UART4) ? true \
: ((m) == SLEEP_RETENTION_MODULE_RMT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2S2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_I2C1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_ETM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_TWAI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PARLIO0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI2) ? true \
: ((m) == SLEEP_RETENTION_MODULE_GPSPI3) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LEDC) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_MCPWM1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_SDM0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_JPEG) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LCDCAM) ? true \
: false)
#define is_top_domain_module(m) (m <= SLEEP_RETENTION_MODULE_LCDCAM)
#ifdef __cplusplus
}