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Merge branch 'fix/i2c_nack_c5_v5.2' into 'release/v5.2'

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fix(i2c_master): Fix potential concurrency issue with task and interrupt when nack happens (v5.2)

See merge request espressif/esp-idf!47155
This commit is contained in:
morris
2026-04-01 17:22:50 +08:00
parent b29fd46bb1 c6795167c6
commit 12d942c658
2 changed files with 8 additions and 1 deletions
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components/driver/i2c/i2c_master.c
+7
View File
@@ -529,6 +529,13 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t
if (xQueueReceive(i2c_master->event_queue, &event, ticks_to_wait) == pdTRUE) {
if (event == I2C_EVENT_DONE) {
atomic_store(&i2c_master->status, I2C_STATUS_DONE);
} else if (event == I2C_EVENT_NACK) {
// For i2c nack detected, the i2c transaction not finish.
// start->address->nack->stop
// So wait the whole transaction finishes, then quit the function.
while (i2c_ll_is_bus_busy(hal->dev)) {
__asm__ __volatile__("nop");
}
}
s_i2c_err_log_print(event, i2c_master->bypass_nack_log);
} else {
components/driver/test_apps/i2c_test_apps/main/test_i2c_multi.c
+1 -1
View File
@@ -705,7 +705,7 @@ static void i2c_slave_read_test_more_port(void)
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test, more ports", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_test_more_port, i2c_slave_read_test_more_port);
#endif
#if 0 && (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3)
#if (CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3)
// For now, we tested the chip which has such problem.
// This test can be extended to all chip when how uart baud rate
// works has been figured out.