mirror of
https://github.com/espressif/esp-idf.git
synced 2026-04-27 19:13:21 +00:00
feat(esp_tee): Remove unused components from the PSA Crypto library
This commit is contained in:
@@ -79,31 +79,29 @@ if(CONFIG_SOC_AES_SUPPORTED)
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"${COMPONENT_DIR}/port/aes/esp_aes_common.c"
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"${COMPONENT_DIR}/port/aes/esp_aes_xts.c")
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target_include_directories(tfpsacrypto PRIVATE "${COMPONENT_DIR}/port/include/aes")
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if(CONFIG_MBEDTLS_HARDWARE_AES)
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_aes/psa_crypto_driver_esp_aes.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_aes/psa_crypto_driver_esp_aes_gcm.c"
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)
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endif()
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_aes/psa_crypto_driver_esp_aes.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_aes/psa_crypto_driver_esp_aes_gcm.c"
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)
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endif()
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# SHA implementation
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if(CONFIG_SOC_SHA_SUPPORTED)
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/psa_crypto_driver_esp_sha.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/core/psa_crypto_driver_esp_sha1.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/core/psa_crypto_driver_esp_sha256.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/core/psa_crypto_driver_esp_sha512.c"
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"${COMPONENT_DIR}/port/sha/core/sha.c"
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"${COMPONENT_DIR}/port/sha/esp_sha.c"
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"${COMPONENT_DIR}/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_transparent.c"
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)
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endif()
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if(CONFIG_MBEDTLS_ROM_MD5)
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_md/psa_crypto_driver_esp_md5.c"
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)
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if(CONFIG_MBEDTLS_SHA1_C)
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/core/psa_crypto_driver_esp_sha1.c"
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)
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endif()
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if(CONFIG_SOC_SHA_SUPPORT_SHA512 AND CONFIG_MBEDTLS_SHA512_C)
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_sha/core/psa_crypto_driver_esp_sha512.c"
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)
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endif()
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endif()
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if(CONFIG_SOC_ECC_SUPPORTED)
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@@ -116,6 +114,9 @@ if(CONFIG_SOC_HMAC_SUPPORTED)
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target_sources(tfpsacrypto PRIVATE "${COMPONENT_DIR}/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_opaque.c")
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target_sources(tfpsacrypto PRIVATE "${COMPONENT_DIR}/port/esp_hmac_pbkdf2.c")
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target_link_libraries(tfpsacrypto PRIVATE idf::efuse)
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else()
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target_sources(tfpsacrypto PRIVATE
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"${COMPONENT_DIR}/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_transparent.c")
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endif()
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# PSA Attestation
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@@ -40,7 +40,7 @@
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#undef MBEDTLS_TIMING_C
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#define MBEDTLS_PLATFORM_C
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#if CONFIG_MBEDTLS_HARDWARE_AES
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#if SOC_AES_SUPPORTED
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#define ESP_AES_DRIVER_ENABLED
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#define MBEDTLS_PSA_ACCEL_KEY_TYPE_AES
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#endif
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@@ -65,29 +65,41 @@
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#define PSA_WANT_ALG_DETERMINISTIC_ECDSA 1
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#else
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#undef PSA_WANT_ALG_DETERMINISTIC_ECDSA
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#undef MBEDTLS_HMAC_DRBG_C
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#endif
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#if CONFIG_MBEDTLS_SHA1_C
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#define MBEDTLS_SHA1_C
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#endif
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#define MBEDTLS_SHA224_C
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#define MBEDTLS_SHA256_C
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#if SOC_SHA_SUPPORTED
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#define ESP_SHA_DRIVER_ENABLED
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#define ESP_HMAC_TRANSPARENT_DRIVER_ENABLED
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#undef MBEDTLS_PSA_BUILTIN_ALG_HMAC
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#if CONFIG_MBEDTLS_SHA1_C
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_1
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_1
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#undef MBEDTLS_SHA1_C
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_1
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_1
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#undef MBEDTLS_SHA1_C
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#else
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#undef PSA_WANT_ALG_SHA_1
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#endif
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_224
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_224
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#undef MBEDTLS_SHA224_C
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_224
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_256
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_256
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#undef MBEDTLS_SHA256_C
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#if SOC_SHA_SUPPORT_SHA512 && CONFIG_MBEDTLS_SHA512_C
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_384
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_384
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_512
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_512
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#undef MBEDTLS_SHA384_C
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#undef MBEDTLS_SHA512_C
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#else
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#undef PSA_WANT_ALG_SHA_384
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#undef PSA_WANT_ALG_SHA_512
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#undef MBEDTLS_SHA512_ALT
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#endif
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#if !SOC_HMAC_SUPPORTED
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#define ESP_HMAC_TRANSPARENT_DRIVER_ENABLED
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#define MBEDTLS_PSA_ACCEL_ALG_HMAC
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#undef MBEDTLS_PSA_BUILTIN_ALG_HMAC
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#endif
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#endif
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#if SOC_ECC_SUPPORTED
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@@ -97,17 +109,6 @@
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#if SOC_HMAC_SUPPORTED
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#define ESP_HMAC_OPAQUE_DRIVER_ENABLED
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#else
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#undef MBEDTLS_PSA_ACCEL_KEY_TYPE_HMAC
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#endif
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#if CONFIG_MBEDTLS_ROM_MD5
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#define ESP_MD5_DRIVER_ENABLED
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#define MBEDTLS_PSA_ACCEL_ALG_MD5
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#undef MBEDTLS_PSA_BUILTIN_ALG_MD5
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#else
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#undef PSA_WANT_ALG_MD5
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#undef MBEDTLS_MD5_C
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#endif
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#undef PSA_WANT_ECC_SECP_R1_192
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@@ -139,6 +140,19 @@
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#undef MBEDTLS_RIPEMD160_C
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#undef PSA_WANT_ALG_CHACHA20
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#undef MBEDTLS_CHACHA20_C
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#undef PSA_WANT_ALG_CHACHA20_POLY1305
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#undef MBEDTLS_CHACHAPOLY_C
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#undef PSA_WANT_ALG_CCM
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#undef PSA_WANT_ALG_CMAC
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#undef MBEDTLS_AES_C
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#define MBEDTLS_AES_ROM_TABLES
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#if SOC_AES_SUPPORTED
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#define MBEDTLS_AES_FEWER_TABLES
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#endif
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#undef PSA_WANT_ALG_MD5
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#undef MBEDTLS_MD5_C
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#undef PSA_WANT_ALG_SHA3_224
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#undef MBEDTLS_SHA3_224_C
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#undef PSA_WANT_ALG_SHA3_256
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@@ -167,22 +181,12 @@
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#undef PSA_WANT_ALG_FFDH
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#undef MBEDTLS_ECDH_C
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#undef MBEDTLS_CCM_C
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#undef MBEDTLS_CHACHA20_C
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#undef MBEDTLS_CHACHAPOLY_C
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#undef MBEDTLS_DEBUG_C
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#undef MBEDTLS_PSA_ITS_FILE_C
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#undef MBEDTLS_PSA_CRYPTO_STORAGE_C
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#undef MBEDTLS_SSL_CLI_C
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#undef MBEDTLS_SSL_SRV_C
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#undef PSA_WANT_ALG_PBKDF2_HMAC
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#undef PSA_WANT_ALG_TLS12_PRF
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#undef PSA_WANT_ALG_PBKDF2_HMAC
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#undef PSA_WANT_ALG_PBKDF2_AES_CMAC_PRF_128
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#undef PSA_WANT_ALG_CCM
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#undef PSA_WANT_ALG_CMAC
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#undef MBEDTLS_AES_C
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#define MBEDTLS_AES_ROM_TABLES
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#if SOC_AES_SUPPORTED
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#define MBEDTLS_AES_FEWER_TABLES
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#endif
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@@ -203,9 +203,9 @@
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#define MBEDTLS_PSA_BUILTIN_ALG_HMAC
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#if SOC_SHA_SUPPORT_SHA512
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_384
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#undef MBEDTLS_PSA_ACCEL_ALG_SHA_384
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_384
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#define MBEDTLS_PSA_ACCEL_ALG_SHA_512
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#undef MBEDTLS_PSA_ACCEL_ALG_SHA_512
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#undef MBEDTLS_PSA_BUILTIN_ALG_SHA_512
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#undef MBEDTLS_SHA512_C
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#undef MBEDTLS_SHA384_C
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#undef MBEDTLS_PSA_BUILTIN_ALG_HMAC
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+22
-22
@@ -16,12 +16,12 @@ psa_status_t esp_hmac_abort_transparent(esp_hmac_transparent_operation_t *esp_hm
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{
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psa_status_t status = PSA_ERROR_CORRUPTION_DETECTED;
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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psa_algorithm_t hash_alg = PSA_ALG_GET_HASH(esp_hmac_ctx->alg);
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_abort(&esp_hmac_ctx->md5_ctx);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_abort(&esp_hmac_ctx->esp_sha_ctx);
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}
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@@ -68,9 +68,9 @@ psa_status_t esp_hmac_setup_transparent(esp_hmac_transparent_operation_t *esp_hm
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memset(esp_hmac_ctx->opad, 0, PSA_HMAC_MAX_HASH_BLOCK_SIZE);
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if (
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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hash_alg != PSA_ALG_MD5 &&
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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(hash_alg < PSA_ALG_SHA_1
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#if SOC_SHA_SUPPORT_SHA512
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|| hash_alg > PSA_ALG_SHA_512
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@@ -95,12 +95,12 @@ psa_status_t esp_hmac_setup_transparent(esp_hmac_transparent_operation_t *esp_hm
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}
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if (key_buffer_size > block_size) {
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_compute(hash_alg, key_buffer, key_buffer_size,
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ipad, sizeof(ipad), &key_buffer_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_compute(hash_alg, key_buffer, key_buffer_size,
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ipad, sizeof(ipad), &key_buffer_size);
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@@ -163,11 +163,11 @@ psa_status_t esp_hmac_setup_transparent(esp_hmac_transparent_operation_t *esp_hm
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memset(esp_hmac_ctx->opad + key_buffer_size, 0x5C, fill_size);
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_setup(&esp_hmac_ctx->md5_ctx, hash_alg);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_setup(&esp_hmac_ctx->esp_sha_ctx, hash_alg);
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}
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@@ -175,11 +175,11 @@ psa_status_t esp_hmac_setup_transparent(esp_hmac_transparent_operation_t *esp_hm
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goto error;
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_update(&esp_hmac_ctx->md5_ctx, ipad, block_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_update(&esp_hmac_ctx->esp_sha_ctx, ipad, block_size);
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}
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@@ -201,12 +201,12 @@ psa_status_t esp_hmac_update_transparent(esp_hmac_transparent_operation_t *esp_h
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return PSA_ERROR_INVALID_ARGUMENT;
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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psa_algorithm_t hash_alg = PSA_ALG_GET_HASH(esp_hmac_ctx->alg);
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if (hash_alg == PSA_ALG_MD5) {
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return esp_md5_hash_update(&esp_hmac_ctx->md5_ctx, data, data_length);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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return esp_sha_hash_update(&esp_hmac_ctx->esp_sha_ctx, data, data_length);
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}
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@@ -230,11 +230,11 @@ psa_status_t esp_hmac_finish_transparent(
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size_t hash_size = 0;
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size_t block_size = PSA_HASH_BLOCK_LENGTH(hash_alg);
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_finish(&esp_hmac_ctx->md5_ctx, tmp, sizeof(tmp), &hash_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_finish(&esp_hmac_ctx->esp_sha_ctx, tmp, sizeof(tmp), &hash_size);
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}
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@@ -243,11 +243,11 @@ psa_status_t esp_hmac_finish_transparent(
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}
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/* From here on, tmp needs to be wiped. */
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_setup(&esp_hmac_ctx->md5_ctx, hash_alg);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_setup(&esp_hmac_ctx->esp_sha_ctx, hash_alg);
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}
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@@ -255,11 +255,11 @@ psa_status_t esp_hmac_finish_transparent(
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goto exit;
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_update(&esp_hmac_ctx->md5_ctx, esp_hmac_ctx->opad, block_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_update(&esp_hmac_ctx->esp_sha_ctx, esp_hmac_ctx->opad, block_size);
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}
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@@ -267,11 +267,11 @@ psa_status_t esp_hmac_finish_transparent(
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goto exit;
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_update(&esp_hmac_ctx->md5_ctx, tmp, hash_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_update(&esp_hmac_ctx->esp_sha_ctx, tmp, hash_size);
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}
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@@ -279,11 +279,11 @@ psa_status_t esp_hmac_finish_transparent(
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goto exit;
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}
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#if CONFIG_MBEDTLS_ROM_MD5
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#if defined(ESP_MD5_DRIVER_ENABLED)
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if (hash_alg == PSA_ALG_MD5) {
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status = esp_md5_hash_finish(&esp_hmac_ctx->md5_ctx, tmp, sizeof(tmp), &hash_size);
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} else
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#endif // CONFIG_MBEDTLS_ROM_MD5
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#endif // defined(ESP_MD5_DRIVER_ENABLED)
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{
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status = esp_sha_hash_finish(&esp_hmac_ctx->esp_sha_ctx, tmp, sizeof(tmp), &hash_size);
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}
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