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feat(hal): graudate the RMT hal driver into a new component

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This commit is contained in:
Chen Jichang
2025-11-13 17:54:54 +08:00
parent cb5f2ff4c2
commit 2cb84ecf95
65 changed files with 625 additions and 919 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_driver_rmt/CMakeLists.txt
+3
View File
@@ -17,13 +17,16 @@ if(CONFIG_SOC_BITSCRAMBLER_SUPPORTED AND CONFIG_SOC_RMT_SUPPORT_DMA)
endif()
if(${target} STREQUAL "linux")
set(requires "")
set(priv_requires "")
else()
set(requires esp_hal_rmt)
set(priv_requires esp_pm esp_driver_gpio esp_driver_bitscrambler esp_mm)
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
REQUIRES "${requires}"
PRIV_REQUIRES "${priv_requires}"
LDFRAGMENTS "linker.lf"
)
components/esp_driver_rmt/src/rmt_common.c
+12 -12
View File
@@ -22,9 +22,9 @@
#endif
typedef struct rmt_platform_t {
_lock_t mutex; // platform level mutex lock
rmt_group_t *groups[SOC_RMT_GROUPS]; // array of RMT group instances
int group_ref_counts[SOC_RMT_GROUPS]; // reference count used to protect group install/uninstall
_lock_t mutex; // platform level mutex lock
rmt_group_t *groups[RMT_LL_GET(INST_NUM)]; // array of RMT group instances
int group_ref_counts[RMT_LL_GET(INST_NUM)]; // reference count used to protect group install/uninstall
} rmt_platform_t;
static rmt_platform_t s_platform; // singleton platform
@@ -48,7 +48,7 @@ rmt_group_t *rmt_acquire_group_handle(int group_id)
group->group_id = group_id;
group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
// initial occupy_mask: 1111...100...0
group->occupy_mask = UINT32_MAX & ~((1 << SOC_RMT_CHANNELS_PER_GROUP) - 1);
group->occupy_mask = UINT32_MAX & ~((1 << RMT_LL_GET(CHANS_PER_INST)) - 1);
// group clock won't be configured at this stage, it will be set when allocate the first channel
group->clk_src = 0;
// group interrupt priority is shared between all channels, it will be set when allocate the first channel
@@ -118,11 +118,11 @@ void rmt_release_group_handle(rmt_group_t *group)
_lock_release(&s_platform.mutex);
switch (clk_src) {
#if SOC_RMT_SUPPORT_RC_FAST
#if RMT_LL_SUPPORT(RC_FAST)
case RMT_CLK_SRC_RC_FAST:
periph_rtc_dig_clk8m_disable();
break;
#endif // SOC_RMT_SUPPORT_RC_FAST
#endif // RMT_LL_SUPPORT(RC_FAST)
default:
break;
}
@@ -142,7 +142,7 @@ void rmt_release_group_handle(rmt_group_t *group)
}
}
#if !SOC_RMT_CHANNEL_CLK_INDEPENDENT
#if !RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
static esp_err_t rmt_set_group_prescale(rmt_channel_t *chan, uint32_t expect_resolution_hz, uint32_t *ret_channel_prescale)
{
uint32_t periph_src_clk_hz = 0;
@@ -194,7 +194,7 @@ static esp_err_t rmt_set_group_prescale(rmt_channel_t *chan, uint32_t expect_res
*ret_channel_prescale = channel_prescale;
return ESP_OK;
}
#endif // SOC_RMT_CHANNEL_CLK_INDEPENDENT
#endif // RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t clk_src, uint32_t expect_channel_resolution)
{
@@ -213,13 +213,13 @@ esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t
"group clock conflict, already is %d but attempt to %d", group->clk_src, clk_src);
// TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source
#if SOC_RMT_SUPPORT_RC_FAST
#if RMT_LL_SUPPORT(RC_FAST)
if (clk_src == RMT_CLK_SRC_RC_FAST) {
// RC_FAST clock is not enabled automatically on start up, we enable it here manually.
// Note there's a ref count in the enable/disable function, we must call them in pair in the driver.
periph_rtc_dig_clk8m_enable();
}
#endif // SOC_RMT_SUPPORT_RC_FAST
#endif // RMT_LL_SUPPORT(RC_FAST)
#if CONFIG_PM_ENABLE
// if DMA is not used, we're using CPU to push the data to the RMT FIFO
@@ -236,7 +236,7 @@ esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t
ESP_RETURN_ON_ERROR(esp_clk_tree_enable_src((soc_module_clk_t)clk_src, true), TAG, "clock source enable failed");
uint32_t real_div;
#if SOC_RMT_CHANNEL_CLK_INDEPENDENT
#if RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
uint32_t periph_src_clk_hz = 0;
// get clock source frequency
ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)clk_src, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &periph_src_clk_hz),
@@ -251,7 +251,7 @@ esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t
#else
// set division for group clock source, to achieve highest resolution while guaranteeing the channel resolution.
ESP_RETURN_ON_ERROR(rmt_set_group_prescale(chan, expect_channel_resolution, &real_div), TAG, "set rmt group prescale failed");
#endif // SOC_RMT_CHANNEL_CLK_INDEPENDENT
#endif // RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
if (chan->direction == RMT_CHANNEL_DIRECTION_TX) {
rmt_ll_tx_set_channel_clock_div(group->hal.regs, chan->channel_id, real_div);
components/esp_driver_rmt/src/rmt_private.h
+5 -5
View File
@@ -26,7 +26,7 @@
#include "esp_check.h"
#include "esp_err.h"
#include "soc/soc_caps.h"
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "hal/rmt_types.h"
#include "hal/rmt_hal.h"
#include "hal/rmt_ll.h"
@@ -74,7 +74,7 @@ extern "C" {
// Hopefully the channel offset won't change in other targets
#define RMT_TX_CHANNEL_OFFSET_IN_GROUP 0
#define RMT_RX_CHANNEL_OFFSET_IN_GROUP (SOC_RMT_CHANNELS_PER_GROUP - SOC_RMT_TX_CANDIDATES_PER_GROUP)
#define RMT_RX_CHANNEL_OFFSET_IN_GROUP (RMT_LL_GET(CHANS_PER_INST) - RMT_LL_GET(TX_CANDIDATES_PER_INST))
#define RMT_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED
@@ -102,7 +102,7 @@ extern "C" {
typedef struct {
struct {
rmt_symbol_word_t symbols[SOC_RMT_MEM_WORDS_PER_CHANNEL];
} channels[SOC_RMT_CHANNELS_PER_GROUP];
} channels[RMT_LL_GET(CHANS_PER_INST)];
} rmt_block_mem_t;
// RMTMEM address is declared in <target>.peripherals.ld
@@ -140,8 +140,8 @@ struct rmt_group_t {
rmt_clock_source_t clk_src; // record the group clock source, group clock is shared by all channels
uint32_t resolution_hz; // resolution of group clock. clk_src_hz / prescale = resolution_hz
uint32_t occupy_mask; // a set bit in the mask indicates the channel is not available
rmt_tx_channel_t *tx_channels[SOC_RMT_TX_CANDIDATES_PER_GROUP]; // array of RMT TX channels
rmt_rx_channel_t *rx_channels[SOC_RMT_RX_CANDIDATES_PER_GROUP]; // array of RMT RX channels
rmt_tx_channel_t *tx_channels[RMT_LL_GET(TX_CANDIDATES_PER_INST)]; // array of RMT TX channels
rmt_rx_channel_t *rx_channels[RMT_LL_GET(RX_CANDIDATES_PER_INST)]; // array of RMT RX channels
rmt_sync_manager_t *sync_manager; // sync manager, this can be extended into an array if there're more sync controllers in one RMT group
int intr_priority; // RMT interrupt priority
};
components/esp_driver_rmt/src/rmt_rx.c
+9 -10
View File
@@ -7,7 +7,6 @@
#include "esp_memory_utils.h"
#include "esp_cache.h"
#include "esp_rom_gpio.h"
#include "soc/rmt_periph.h"
#include "driver/gpio.h"
#include "driver/rmt_rx.h"
#include "rmt_private.h"
@@ -90,12 +89,12 @@ static esp_err_t rmt_rx_register_to_group(rmt_rx_channel_t *rx_channel, const rm
// start to search for a free channel
// a channel can take up its neighbour's memory block, so the neighbour channel won't work, we should skip these "invaded" ones
int channel_scan_start = RMT_RX_CHANNEL_OFFSET_IN_GROUP;
int channel_scan_end = RMT_RX_CHANNEL_OFFSET_IN_GROUP + SOC_RMT_RX_CANDIDATES_PER_GROUP;
int channel_scan_end = RMT_RX_CHANNEL_OFFSET_IN_GROUP + RMT_LL_GET(RX_CANDIDATES_PER_INST);
if (config->flags.with_dma) {
// for DMA mode, the memory block number is always 1; for non-DMA mode, memory block number is configured by user
mem_block_num = 1;
// Only the last channel has the DMA capability
channel_scan_start = RMT_RX_CHANNEL_OFFSET_IN_GROUP + SOC_RMT_RX_CANDIDATES_PER_GROUP - 1;
channel_scan_start = RMT_RX_CHANNEL_OFFSET_IN_GROUP + RMT_LL_GET(RX_CANDIDATES_PER_INST) - 1;
rx_channel->ping_pong_symbols = 0; // with DMA, we don't need to do ping-pong
} else {
// one channel can occupy multiple memory blocks
@@ -112,7 +111,7 @@ static esp_err_t rmt_rx_register_to_group(rmt_rx_channel_t *rx_channel, const rm
uint32_t channel_mask = (1 << mem_block_num) - 1;
rmt_group_t *group = NULL;
int channel_id = -1;
for (int i = 0; i < SOC_RMT_GROUPS; i++) {
for (int i = 0; i < RMT_LL_GET(INST_NUM); i++) {
group = rmt_acquire_group_handle(i);
ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
portENTER_CRITICAL(&group->spinlock);
@@ -156,7 +155,7 @@ static esp_err_t rmt_rx_destroy(rmt_rx_channel_t *rx_channel)
int group_id = rx_channel->base.group->group_id;
int channel_id = rx_channel->base.channel_id;
esp_rom_gpio_connect_in_signal(GPIO_MATRIX_CONST_ZERO_INPUT,
rmt_periph_signals.groups[group_id].channels[channel_id + RMT_RX_CHANNEL_OFFSET_IN_GROUP].rx_sig,
soc_rmt_signals[group_id].channels[channel_id + RMT_RX_CHANNEL_OFFSET_IN_GROUP].rx_sig,
false);
}
if (rx_channel->base.intr) {
@@ -250,7 +249,7 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_
// 2-- Get interrupt allocation flag
int isr_flags = rmt_isr_priority_to_flags(group) | RMT_RX_INTR_ALLOC_FLAG;
// 3-- Allocate interrupt using isr_flag
ret = esp_intr_alloc_intrstatus(rmt_periph_signals.groups[group_id].irq, isr_flags,
ret = esp_intr_alloc_intrstatus(soc_rmt_signals[group_id].irq, isr_flags,
(uint32_t)rmt_ll_get_interrupt_status_reg(hal->regs),
RMT_LL_EVENT_RX_MASK(channel_id), rmt_rx_default_isr, rx_channel, &rx_channel->base.intr);
ESP_GOTO_ON_ERROR(ret, err, TAG, "install rx interrupt failed");
@@ -274,7 +273,7 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_
// always enable rx wrap, both DMA mode and ping-pong mode rely this feature
rmt_ll_rx_enable_wrap(hal->regs, channel_id, true);
#endif
#if SOC_RMT_SUPPORT_RX_DEMODULATION
#if RMT_LL_SUPPORT(RX_DEMODULATION)
// disable carrier demodulation by default, can re-enable by `rmt_apply_carrier()`
rmt_ll_rx_enable_carrier_demodulation(hal->regs, channel_id, false);
#endif
@@ -283,7 +282,7 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_
gpio_func_sel(config->gpio_num, PIN_FUNC_GPIO);
gpio_input_enable(config->gpio_num);
esp_rom_gpio_connect_in_signal(config->gpio_num,
rmt_periph_signals.groups[group_id].channels[channel_id + RMT_RX_CHANNEL_OFFSET_IN_GROUP].rx_sig,
soc_rmt_signals[group_id].channels[channel_id + RMT_RX_CHANNEL_OFFSET_IN_GROUP].rx_sig,
config->flags.invert_in);
rx_channel->base.gpio_num = config->gpio_num;
@@ -451,7 +450,7 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_
static esp_err_t rmt_rx_demodulate_carrier(rmt_channel_handle_t channel, const rmt_carrier_config_t *config)
{
#if !SOC_RMT_SUPPORT_RX_DEMODULATION
#if !RMT_LL_SUPPORT(RX_DEMODULATION)
ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "rx demodulation not supported");
#else
rmt_group_t *group = channel->group;
@@ -591,7 +590,7 @@ bool rmt_isr_handle_rx_done(rmt_rx_channel_t *rx_chan)
rmt_ll_rx_enable(hal->regs, channel_id, false);
portEXIT_CRITICAL_ISR(&channel->spinlock);
#if !SOC_RMT_SUPPORT_ASYNC_STOP
#if !RMT_LL_SUPPORT(ASYNC_STOP)
// This is a workaround for ESP32.
// The RX engine can not be disabled once it is enabled in ESP32
// If the state isn't RMT_FSM_RUN, it means the RX engine was disabled
components/esp_driver_rmt/src/rmt_tx.c
+14 -16
View File
@@ -121,12 +121,12 @@ static esp_err_t rmt_tx_register_to_group(rmt_tx_channel_t *tx_channel, const rm
// start to search for a free channel
// a channel can take up its neighbour's memory block, so the neighbour channel won't work, we should skip these "invaded" ones
int channel_scan_start = RMT_TX_CHANNEL_OFFSET_IN_GROUP;
int channel_scan_end = RMT_TX_CHANNEL_OFFSET_IN_GROUP + SOC_RMT_TX_CANDIDATES_PER_GROUP;
int channel_scan_end = RMT_TX_CHANNEL_OFFSET_IN_GROUP + RMT_LL_GET(TX_CANDIDATES_PER_INST);
if (config->flags.with_dma) {
// for DMA mode, the memory block number is always 1; for non-DMA mode, memory block number is configured by user
mem_block_num = 1;
// Only the last channel has the DMA capability
channel_scan_start = RMT_TX_CHANNEL_OFFSET_IN_GROUP + SOC_RMT_TX_CANDIDATES_PER_GROUP - 1;
channel_scan_start = RMT_TX_CHANNEL_OFFSET_IN_GROUP + RMT_LL_GET(TX_CANDIDATES_PER_INST) - 1;
} else {
// one channel can occupy multiple memory blocks
mem_block_num = config->mem_block_symbols / SOC_RMT_MEM_WORDS_PER_CHANNEL;
@@ -142,7 +142,7 @@ static esp_err_t rmt_tx_register_to_group(rmt_tx_channel_t *tx_channel, const rm
uint32_t channel_mask = (1 << mem_block_num) - 1;
rmt_group_t *group = NULL;
int channel_id = -1;
for (int i = 0; i < SOC_RMT_GROUPS; i++) {
for (int i = 0; i < RMT_LL_GET(INST_NUM); i++) {
group = rmt_acquire_group_handle(i);
ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
portENTER_CRITICAL(&group->spinlock);
@@ -309,7 +309,7 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_
// 2-- Get interrupt allocation flag
int isr_flags = rmt_isr_priority_to_flags(group) | RMT_TX_INTR_ALLOC_FLAG;
// 3-- Allocate interrupt using isr_flag
ret = esp_intr_alloc_intrstatus(rmt_periph_signals.groups[group_id].irq, isr_flags,
ret = esp_intr_alloc_intrstatus(soc_rmt_signals[group_id].irq, isr_flags,
(uint32_t) rmt_ll_get_interrupt_status_reg(hal->regs),
RMT_LL_EVENT_TX_MASK(channel_id), rmt_tx_default_isr, tx_channel,
&tx_channel->base.intr);
@@ -344,7 +344,7 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_
gpio_func_sel(config->gpio_num, PIN_FUNC_GPIO);
// connect the signal to the GPIO by matrix, it will also enable the output path properly
esp_rom_gpio_connect_out_signal(config->gpio_num,
rmt_periph_signals.groups[group_id].channels[channel_id + RMT_TX_CHANNEL_OFFSET_IN_GROUP].tx_sig,
soc_rmt_signals[group_id].channels[channel_id + RMT_TX_CHANNEL_OFFSET_IN_GROUP].tx_sig,
config->flags.invert_out, false);
tx_channel->base.gpio_num = config->gpio_num;
@@ -386,7 +386,7 @@ static esp_err_t rmt_del_tx_channel(rmt_channel_handle_t channel)
esp_err_t rmt_new_sync_manager(const rmt_sync_manager_config_t *config, rmt_sync_manager_handle_t *ret_synchro)
{
#if !SOC_RMT_SUPPORT_TX_SYNCHRO
#if !RMT_LL_SUPPORT(TX_SYNCHRO)
ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "sync manager not supported");
#else
esp_err_t ret = ESP_OK;
@@ -450,12 +450,12 @@ err:
free(synchro);
}
return ret;
#endif // !SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // !RMT_LL_SUPPORT(TX_SYNCHRO)
}
esp_err_t rmt_sync_reset(rmt_sync_manager_handle_t synchro)
{
#if !SOC_RMT_SUPPORT_TX_SYNCHRO
#if !RMT_LL_SUPPORT(TX_SYNCHRO)
ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "sync manager not supported");
#else
ESP_RETURN_ON_FALSE(synchro, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
@@ -469,12 +469,12 @@ esp_err_t rmt_sync_reset(rmt_sync_manager_handle_t synchro)
portEXIT_CRITICAL(&group->spinlock);
return ESP_OK;
#endif // !SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // !RMT_LL_SUPPORT(TX_SYNCHRO)
}
esp_err_t rmt_del_sync_manager(rmt_sync_manager_handle_t synchro)
{
#if !SOC_RMT_SUPPORT_TX_SYNCHRO
#if !RMT_LL_SUPPORT(TX_SYNCHRO)
ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "sync manager not supported");
#else
ESP_RETURN_ON_FALSE(synchro, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
@@ -492,7 +492,7 @@ esp_err_t rmt_del_sync_manager(rmt_sync_manager_handle_t synchro)
ESP_LOGD(TAG, "del sync manager in group(%d)", group_id);
rmt_release_group_handle(group);
return ESP_OK;
#endif // !SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // !RMT_LL_SUPPORT(TX_SYNCHRO)
}
esp_err_t rmt_tx_register_event_callbacks(rmt_channel_handle_t channel, const rmt_tx_event_callbacks_t *cbs, void *user_data)
@@ -823,14 +823,14 @@ static esp_err_t rmt_tx_disable(rmt_channel_handle_t channel)
// disable the hardware
portENTER_CRITICAL(&channel->spinlock);
rmt_ll_tx_enable_loop(hal->regs, channel->channel_id, false);
#if SOC_RMT_SUPPORT_ASYNC_STOP
#if RMT_LL_SUPPORT(ASYNC_STOP)
rmt_ll_tx_stop(hal->regs, channel->channel_id);
#endif
portEXIT_CRITICAL(&channel->spinlock);
portENTER_CRITICAL(&group->spinlock);
rmt_ll_enable_interrupt(hal->regs, RMT_LL_EVENT_TX_MASK(channel_id), false);
#if !SOC_RMT_SUPPORT_ASYNC_STOP
#if !RMT_LL_SUPPORT(ASYNC_STOP)
// we do a trick to stop the undergoing transmission
// stop interrupt, insert EOF marker to the RMT memory, polling the trans_done event
memset(channel->hw_mem_base, 0, channel->mem_block_num * SOC_RMT_MEM_WORDS_PER_CHANNEL * sizeof(rmt_symbol_word_t));
@@ -890,9 +890,7 @@ static esp_err_t rmt_tx_modulate_carrier(rmt_channel_handle_t channel, const rmt
portENTER_CRITICAL(&channel->spinlock);
rmt_ll_tx_set_carrier_level(hal->regs, channel_id, !config->flags.polarity_active_low);
rmt_ll_tx_set_carrier_high_low_ticks(hal->regs, channel_id, high_ticks, low_ticks);
#if SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
rmt_ll_tx_enable_carrier_always_on(hal->regs, channel_id, config->flags.always_on);
#endif
portEXIT_CRITICAL(&channel->spinlock);
// save real carrier frequency
real_frequency = group->resolution_hz / total_ticks;
@@ -1156,7 +1154,7 @@ esp_err_t rmt_tx_switch_gpio(rmt_channel_handle_t channel, gpio_num_t gpio_num,
// Configure the new GPIO
gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
esp_rom_gpio_connect_out_signal(gpio_num,
rmt_periph_signals.groups[group_id].channels[channel_id + RMT_TX_CHANNEL_OFFSET_IN_GROUP].tx_sig,
soc_rmt_signals[group_id].channels[channel_id + RMT_TX_CHANNEL_OFFSET_IN_GROUP].tx_sig,
invert_out, false);
tx_chan->base.gpio_num = gpio_num;
components/esp_driver_rmt/test_apps/rmt/CMakeLists.txt
+11 -1
View File
@@ -9,9 +9,19 @@ project(rmt_test)
idf_build_get_property(elf EXECUTABLE)
if(CONFIG_COMPILER_DUMP_RTL_FILES)
# Collect RTL directories in a variable for readability. Join them
# with commas so they are passed as a single --rtl-dirs argument to the script.
set(RMT_RTL_DIRS
${CMAKE_BINARY_DIR}/esp-idf/esp_driver_rmt
${CMAKE_BINARY_DIR}/esp-idf/hal
${CMAKE_BINARY_DIR}/esp-idf/esp_hal_rmt
)
string(JOIN "," RMT_RTL_DIRS_JOINED ${RMT_RTL_DIRS})
add_custom_target(check_test_app_sections ALL
COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_rmt/,${CMAKE_BINARY_DIR}/esp-idf/hal/
--rtl-dirs ${RMT_RTL_DIRS_JOINED}
--elf-file ${CMAKE_BINARY_DIR}/rmt_test.elf
find-refs
--from-sections=.iram0.text
components/esp_driver_rmt/test_apps/rmt/main/test_rmt_common.c
+14 -13
View File
@@ -12,6 +12,7 @@
#include "driver/rmt_tx.h"
#include "driver/rmt_rx.h"
#include "soc/soc_caps.h"
#include "hal/rmt_ll.h"
#include "test_board.h"
TEST_CASE("rmt channel install & uninstall", "[rmt]")
@@ -23,55 +24,55 @@ TEST_CASE("rmt channel install & uninstall", "[rmt]")
.resolution_hz = 1000000,
.trans_queue_depth = 1,
};
rmt_channel_handle_t tx_channels[SOC_RMT_TX_CANDIDATES_PER_GROUP] = {};
rmt_channel_handle_t tx_channels[RMT_LL_GET(TX_CANDIDATES_PER_INST)] = {};
rmt_rx_channel_config_t rx_channel_cfg = {
.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL,
.gpio_num = TEST_RMT_GPIO_NUM_B,
.clk_src = RMT_CLK_SRC_DEFAULT,
.resolution_hz = 1000000,
};
rmt_channel_handle_t rx_channels[SOC_RMT_RX_CANDIDATES_PER_GROUP] = {};
rmt_channel_handle_t rx_channels[RMT_LL_GET(RX_CANDIDATES_PER_INST)] = {};
printf("install tx/rx channels, each channel takes one memory block\r\n");
for (int i = 0; i < SOC_RMT_TX_CANDIDATES_PER_GROUP; i++) {
for (int i = 0; i < RMT_LL_GET(TX_CANDIDATES_PER_INST); i++) {
TEST_ESP_OK(rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[i]));
}
// alloc more when tx channels are exhausted should report error
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[0]));
for (int i = 0; i < SOC_RMT_TX_CANDIDATES_PER_GROUP; i++) {
for (int i = 0; i < RMT_LL_GET(TX_CANDIDATES_PER_INST); i++) {
TEST_ESP_OK(rmt_del_channel(tx_channels[i]));
}
for (int i = 0; i < SOC_RMT_RX_CANDIDATES_PER_GROUP; i++) {
for (int i = 0; i < RMT_LL_GET(RX_CANDIDATES_PER_INST); i++) {
TEST_ESP_OK(rmt_new_rx_channel(&rx_channel_cfg, &rx_channels[i]));
}
// alloc more when rx channels are exhausted should report error
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, rmt_new_rx_channel(&rx_channel_cfg, &rx_channels[0]));
for (int i = 0; i < SOC_RMT_RX_CANDIDATES_PER_GROUP; i++) {
for (int i = 0; i < RMT_LL_GET(RX_CANDIDATES_PER_INST); i++) {
TEST_ESP_OK(rmt_del_channel(rx_channels[i]));
}
printf("install tx/rx channels, each channel takes two memory blocks\r\n");
tx_channel_cfg.mem_block_symbols = 2 * SOC_RMT_MEM_WORDS_PER_CHANNEL;
rx_channel_cfg.mem_block_symbols = 2 * SOC_RMT_MEM_WORDS_PER_CHANNEL;
for (int i = 0; i < SOC_RMT_TX_CANDIDATES_PER_GROUP / 2; i++) {
for (int i = 0; i < RMT_LL_GET(TX_CANDIDATES_PER_INST) / 2; i++) {
TEST_ESP_OK(rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[i]));
}
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[0]));
for (int i = 0; i < SOC_RMT_TX_CANDIDATES_PER_GROUP / 2; i++) {
for (int i = 0; i < RMT_LL_GET(TX_CANDIDATES_PER_INST) / 2; i++) {
TEST_ESP_OK(rmt_del_channel(tx_channels[i]));
}
for (int i = 0; i < SOC_RMT_RX_CANDIDATES_PER_GROUP / 2; i++) {
for (int i = 0; i < RMT_LL_GET(RX_CANDIDATES_PER_INST) / 2; i++) {
TEST_ESP_OK(rmt_new_rx_channel(&rx_channel_cfg, &rx_channels[i]));
}
TEST_ESP_ERR(ESP_ERR_NOT_FOUND, rmt_new_rx_channel(&rx_channel_cfg, &rx_channels[0]));
for (int i = 0; i < SOC_RMT_RX_CANDIDATES_PER_GROUP / 2; i++) {
for (int i = 0; i < RMT_LL_GET(RX_CANDIDATES_PER_INST) / 2; i++) {
TEST_ESP_OK(rmt_del_channel(rx_channels[i]));
}
printf("install tx+rx channels, memory blocks exhaustive\r\n");
tx_channel_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL;
TEST_ESP_OK(rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[0]));
tx_channel_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * (SOC_RMT_CHANNELS_PER_GROUP - 2);
tx_channel_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * (RMT_LL_GET(CHANS_PER_INST) - 2);
TEST_ESP_OK(rmt_new_tx_channel(&tx_channel_cfg, &tx_channels[1]));
rx_channel_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL;
TEST_ESP_OK(rmt_new_rx_channel(&rx_channel_cfg, &rx_channels[0]));
@@ -156,7 +157,7 @@ TEST_CASE("rmt interrupt priority", "[rmt]")
TEST_ESP_OK(rmt_del_channel(another_rx_channel));
}
#if !SOC_RMT_CHANNEL_CLK_INDEPENDENT
#if !RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
TEST_CASE("rmt multiple channels with different resolution", "[rmt]")
{
rmt_tx_channel_config_t tx_channel_cfg = {
@@ -185,4 +186,4 @@ TEST_CASE("rmt multiple channels with different resolution", "[rmt]")
TEST_ESP_OK(rmt_del_channel(tx_channel));
TEST_ESP_OK(rmt_del_channel(rx_channel));
}
#endif //SOC_RMT_CHANNEL_CLK_INDEPENDENT
#endif //RMT_LL_GET(CHANNEL_CLK_INDEPENDENT)
components/esp_driver_rmt/test_apps/rmt/main/test_rmt_rx.c
+3 -2
View File
@@ -13,6 +13,7 @@
#include "driver/rmt_rx.h"
#include "driver/gpio.h"
#include "soc/soc_caps.h"
#include "hal/rmt_ll.h"
#include "test_util_rmt_encoders.h"
#include "test_board.h"
@@ -136,7 +137,7 @@ static void test_rmt_rx_nec_carrier(size_t mem_block_symbols, bool with_dma, rmt
TEST_ASSERT_EQUAL(test_user_data.received_symbol_num, mem_block_symbols);
#endif // SOC_RMT_SUPPORT_RX_PINGPONG
#if SOC_RMT_SUPPORT_RX_DEMODULATION
#if RMT_LL_SUPPORT(RX_DEMODULATION)
rmt_carrier_config_t carrier_cfg = {
.duty_cycle = 0.33,
.frequency_hz = 38000,
@@ -170,7 +171,7 @@ static void test_rmt_rx_nec_carrier(size_t mem_block_symbols, bool with_dma, rmt
printf("disable modulation and demodulation for tx and rx channels\r\n");
TEST_ESP_OK(rmt_apply_carrier(tx_channel, NULL));
TEST_ESP_OK(rmt_apply_carrier(rx_channel, NULL));
#endif // SOC_RMT_SUPPORT_RX_DEMODULATION
#endif // RMT_LL_SUPPORT(RX_DEMODULATION)
TEST_ESP_OK(rmt_receive(rx_channel, remote_codes, test_rx_buffer_symbols * sizeof(rmt_symbol_word_t), &receive_config));
printf("send NEC frame without carrier\r\n");
components/esp_driver_rmt/test_apps/rmt/main/test_rmt_tx.c
+5 -4
View File
@@ -13,6 +13,7 @@
#include "driver/gpio.h"
#include "esp_timer.h"
#include "soc/soc_caps.h"
#include "hal/rmt_ll.h"
#include "test_util_rmt_encoders.h"
#include "test_board.h"
@@ -619,13 +620,13 @@ static void test_rmt_multi_channels_trans(size_t channel0_mem_block_symbols, siz
.tx_channel_array = tx_channels,
.array_size = test_rmt_chans,
};
#if SOC_RMT_SUPPORT_TX_SYNCHRO
#if RMT_LL_SUPPORT(TX_SYNCHRO)
TEST_ESP_OK(rmt_new_sync_manager(&synchro_config, &synchro));
#else
TEST_ASSERT_EQUAL(ESP_ERR_NOT_SUPPORTED, rmt_new_sync_manager(&synchro_config, &synchro));
#endif // SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // RMT_LL_SUPPORT(TX_SYNCHRO)
#if SOC_RMT_SUPPORT_TX_SYNCHRO
#if RMT_LL_SUPPORT(TX_SYNCHRO)
printf("transmit with synchronization\r\n");
for (int i = 0; i < test_rmt_chans; i++) {
TEST_ESP_OK(rmt_transmit(tx_channels[i], led_strip_encoders[i], leds_grb, test_led_num * 3, &transmit_config));
@@ -662,7 +663,7 @@ static void test_rmt_multi_channels_trans(size_t channel0_mem_block_symbols, siz
printf("delete sync manager\r\n");
TEST_ESP_OK(rmt_del_sync_manager(synchro));
#endif // SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // RMT_LL_SUPPORT(TX_SYNCHRO)
printf("disable tx channels\r\n");
for (int i = 0; i < test_rmt_chans; i++) {
components/esp_hal_rmt/CMakeLists.txt
+21
View File
@@ -0,0 +1,21 @@
idf_build_get_property(target IDF_TARGET)
if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
set(srcs)
set(includes "include")
if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
list(APPEND includes "${target}/include")
endif()
# RMT related source files
if(CONFIG_SOC_RMT_SUPPORTED)
list(APPEND srcs "rmt_hal.c" "${target}/rmt_periph.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
REQUIRES soc hal)
components/esp_hal_rmt/README.md
+45
View File
@@ -0,0 +1,45 @@
# ESP Hardware Abstraction Layer for RMT Peripheral
> [!NOTE]
> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
## Overview
The `esp_hal_rmt` component provides a **Hardware Abstraction Layer** for the RMT (Remote Control Transceiver) peripherals across all ESP-IDF supported targets. It serves as a foundation for the higher-level RMT drivers, offering a consistent interface to interact with RMT hardware while hiding the complexities of chip-specific implementations.
## Architecture
The HAL architecture consists of two primary layers:
1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with RMT peripherals, including:
- Initialization and de-initialization
- TX/RX channel control operations
- Memory and DMA management
- Carrier and modulation configuration
2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
- Register access abstractions
- Chip-specific register configurations
- Hardware feature compatibility
## Features
- Unified RMT interface across all ESP chip families
- Support for both transmit and receive channels
- Flexible pulse timing and encoding capabilities
- Carrier wave modulation for IR remote control
- Loop transmission mode for repeated patterns
- DMA support on capable chips for large data transfers
- Multiple clock source options
- Memory block allocation and management
## Usage
This component is primarily used by ESP-IDF peripheral drivers such as `esp_driver_rmt`.
For advanced developers implementing custom RMT solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
## Dependencies
- `soc`: Provides chip-specific register definitions
- `hal`: Core hardware abstraction utilities and macros
components/hal/esp32/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32/include/hal/rmt_ll.h
+25
View File
@@ -23,6 +23,17 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (8) /*!< Number of channels that capable of Transmit in each group */
#define RMT_LL_RX_CANDIDATES_PER_INST (8) /*!< Number of channels that capable of Receive in each group */
#define RMT_LL_CHANS_PER_INST (8) /*!< Total 8 channels */
#define RMT_LL_CHANNEL_CLK_INDEPENDENT (1) /*!< Can select different source clock for each channel */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << ((channel) * 3))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 24))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (0) // esp32 doesn't support tx loop count
@@ -353,6 +364,20 @@ static inline void rmt_ll_tx_set_carrier_level(rmt_dev_t *dev, uint32_t channel,
dev->conf_ch[channel].conf0.carrier_out_lv = level;
}
/**
* @brief Enable to always output carrier signal, regardless of a valid data transmission (not supported on esp32)
*
* @param dev Peripheral instance address
* @param channel RMT TX channel number
* @param enable True to output carrier signal in all RMT state, False to only output carrier signal for effective data
*/
static inline void rmt_ll_tx_enable_carrier_always_on(rmt_dev_t *dev, uint32_t channel, bool enable)
{
(void)dev;
(void)channel;
(void)enable;
}
////////////////////////////////////////RX Channel Specific/////////////////////////////////////////////////////////////
/**
components/esp_hal_rmt/esp32/rmt_periph.c
+49
View File
@@ -0,0 +1,49 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/rmt_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/soc.h"
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = RMT_SIG_IN0_IDX
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = RMT_SIG_IN1_IDX
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = RMT_SIG_IN2_IDX
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = RMT_SIG_IN3_IDX
},
[4] = {
.tx_sig = RMT_SIG_OUT4_IDX,
.rx_sig = RMT_SIG_IN4_IDX
},
[5] = {
.tx_sig = RMT_SIG_OUT5_IDX,
.rx_sig = RMT_SIG_IN5_IDX
},
[6] = {
.tx_sig = RMT_SIG_OUT6_IDX,
.rx_sig = RMT_SIG_IN6_IDX
},
[7] = {
.tx_sig = RMT_SIG_OUT7_IDX,
.rx_sig = RMT_SIG_IN7_IDX
}
}
}
};
components/hal/esp32c3/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32c3/include/hal/rmt_ll.h
+15 -1
View File
@@ -23,6 +23,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
@@ -156,7 +170,7 @@ static inline void rmt_ll_enable_mem_access_nonfifo(rmt_dev_t *dev, bool enable)
* @param divider_numerator Numerator part of the divider
*/
static inline void rmt_ll_set_group_clock_src(rmt_dev_t *dev, uint32_t channel, rmt_clock_source_t src,
uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator)
uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator)
{
// Formula: rmt_sclk = module_clock_src / (1 + div_num + div_a / div_b)
(void)channel; // the source clock is set for all channels
components/esp_hal_rmt/esp32c3/rmt_periph.c
+32
View File
@@ -0,0 +1,32 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
components/hal/esp32c5/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32c5/include/hal/rmt_ll.h
+14
View File
@@ -24,6 +24,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32c5/rmt_periph.c → components/esp_hal_rmt/esp32c5/rmt_periph.c
+22 -24
View File
@@ -4,32 +4,30 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
@@ -58,7 +56,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32c6/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32c6/include/hal/rmt_ll.h
+14
View File
@@ -24,6 +24,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32h2/rmt_periph.c → components/esp_hal_rmt/esp32c6/rmt_periph.c
+22 -24
View File
@@ -4,32 +4,30 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
@@ -58,7 +56,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32h2/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32h2/include/hal/rmt_ll.h
+14
View File
@@ -24,6 +24,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32c6/rmt_periph.c → components/esp_hal_rmt/esp32h2/rmt_periph.c
+22 -24
View File
@@ -4,32 +4,30 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
@@ -58,7 +56,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32h21/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32h21/include/hal/rmt_ll.h
+14
View File
@@ -24,6 +24,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32h21/rmt_periph.c → components/esp_hal_rmt/esp32h21/rmt_periph.c
+22 -24
View File
@@ -4,32 +4,30 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
@@ -58,7 +56,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32h4/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32h4/include/hal/rmt_ll.h
+14
View File
@@ -24,6 +24,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Transmit */
#define RMT_LL_RX_CANDIDATES_PER_INST (2) /*!< Number of channels that capable of Receive */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32h4/rmt_periph.c → components/esp_hal_rmt/esp32h4/rmt_periph.c
+22 -24
View File
@@ -4,32 +4,30 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
};
@@ -58,7 +56,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32p4/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32p4/include/hal/rmt_ll.h
+14
View File
@@ -23,6 +23,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Transmit in each group */
#define RMT_LL_RX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Receive in each group */
#define RMT_LL_CHANS_PER_INST (8) /*!< Total 8 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
components/soc/esp32p4/rmt_periph.c → components/esp_hal_rmt/esp32p4/rmt_periph.c
+37 -39
View File
@@ -4,47 +4,45 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "hal/rmt_periph.h"
#include "soc/rmt_reg.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_PAD_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_PAD_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = RMT_SIG_PAD_OUT2_IDX,
.rx_sig = -1
},
[3] = {
.tx_sig = RMT_SIG_PAD_OUT3_IDX,
.rx_sig = -1
},
[4] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN0_IDX
},
[5] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN1_IDX
},
[6] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN2_IDX
},
[7] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN3_IDX
}
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_PAD_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_PAD_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = RMT_SIG_PAD_OUT2_IDX,
.rx_sig = -1
},
[3] = {
.tx_sig = RMT_SIG_PAD_OUT3_IDX,
.rx_sig = -1
},
[4] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN0_IDX
},
[5] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN1_IDX
},
[6] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN2_IDX
},
[7] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_PAD_IN3_IDX
}
}
}
@@ -74,7 +72,7 @@ static const regdma_entries_config_t rmt_regdma_entries[] = {
},
};
const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS] = {
const rmt_reg_retention_info_t rmt_reg_retention_info[1] = {
[0] = {
.module = SLEEP_RETENTION_MODULE_RMT0,
.regdma_entry_array = rmt_regdma_entries,
components/hal/esp32s2/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32s2/include/hal/rmt_ll.h
+14
View File
@@ -23,6 +23,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Transmit in each group */
#define RMT_LL_RX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Receive in each group */
#define RMT_LL_CHANS_PER_INST (4) /*!< Total 4 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_CHANNEL_CLK_INDEPENDENT (1) /*!< Can select different source clock for each channel */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << ((channel) * 3))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 12))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 16))
components/esp_hal_rmt/esp32s2/rmt_periph.c
+32
View File
@@ -0,0 +1,32 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = RMT_SIG_IN0_IDX
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = RMT_SIG_IN1_IDX
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = RMT_SIG_IN2_IDX
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = RMT_SIG_IN3_IDX
}
}
}
};
components/hal/esp32s3/include/hal/rmt_ll.h → components/esp_hal_rmt/esp32s3/include/hal/rmt_ll.h
+15 -1
View File
@@ -23,6 +23,20 @@
extern "C" {
#endif
// Get RMT attribute
#define RMT_LL_GET(_attr) (RMT_LL_ ## _attr)
#define RMT_LL_SUPPORT(_feat) (RMT_LL_SUPPORT_ ## _feat)
// SoC-based capabilities
#define RMT_LL_INST_NUM (1) /*!< Number of RMT group */
#define RMT_LL_TX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Transmit in each group */
#define RMT_LL_RX_CANDIDATES_PER_INST (4) /*!< Number of channels that capable of Receive in each group */
#define RMT_LL_CHANS_PER_INST (8) /*!< Total 8 channels */
#define RMT_LL_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define RMT_LL_SUPPORT_ASYNC_STOP (1) /*!< Support stop transmission asynchronously */
#define RMT_LL_SUPPORT_TX_SYNCHRO (1) /*!< Support coordinate a group of TX channels to start simultaneously */
#define RMT_LL_SUPPORT_RC_FAST (1) /*!< Support set RC_FAST clock as the RMT clock source */
#define RMT_LL_EVENT_TX_DONE(channel) (1 << (channel))
#define RMT_LL_EVENT_TX_THRES(channel) (1 << ((channel) + 8))
#define RMT_LL_EVENT_TX_LOOP_END(channel) (1 << ((channel) + 12))
@@ -156,7 +170,7 @@ static inline void rmt_ll_enable_mem_access_nonfifo(rmt_dev_t *dev, bool enable)
* @param divider_numerator Numerator part of the divider
*/
static inline void rmt_ll_set_group_clock_src(rmt_dev_t *dev, uint32_t channel, rmt_clock_source_t src,
uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator)
uint32_t divider_integral, uint32_t divider_denominator, uint32_t divider_numerator)
{
// Formula: rmt_sclk = module_clock_src / (1 + div_num + div_a / div_b)
(void)channel; // the source clock is set for all channels
components/esp_hal_rmt/esp32s3/rmt_periph.c
+48
View File
@@ -0,0 +1,48 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const soc_rmt_signal_desc_t soc_rmt_signals[1] = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = -1
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = -1
},
[4] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[5] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
[6] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN2_IDX
},
[7] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN3_IDX
}
}
}
};
components/hal/include/hal/rmt_hal.h → components/esp_hal_rmt/include/hal/rmt_hal.h
View File
components/soc/include/soc/rmt_periph.h → components/esp_hal_rmt/include/hal/rmt_periph.h
+14 -13
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,9 @@
#include "soc/soc_caps.h"
#include "soc/periph_defs.h"
#include "soc/regdma.h"
#if SOC_HAS(RMT)
#include "hal/rmt_ll.h"
#endif
#if SOC_RMT_SUPPORT_SLEEP_RETENTION
#include "soc/retention_periph_defs.h"
@@ -18,21 +21,19 @@
extern "C" {
#endif
#if SOC_RMT_SUPPORTED
#if SOC_HAS(RMT)
typedef struct {
const int irq;
struct {
const int irq;
struct {
struct {
const int tx_sig;
const int rx_sig;
};
} channels[SOC_RMT_CHANNELS_PER_GROUP];
} groups[SOC_RMT_GROUPS];
} rmt_signal_conn_t;
const int tx_sig;
const int rx_sig;
};
} channels[RMT_LL_GET(CHANS_PER_INST)];
} soc_rmt_signal_desc_t;
extern const rmt_signal_conn_t rmt_periph_signals;
extern const soc_rmt_signal_desc_t soc_rmt_signals[RMT_LL_GET(INST_NUM)];
#if SOC_RMT_SUPPORT_SLEEP_RETENTION
typedef struct {
@@ -44,10 +45,10 @@ typedef struct {
// TODO: implement the retention link on the channel level, this can:
// - save memory when not all RMT channels are used
// - specify different retention dependency, e.g. only RMT channel x is capable to use DMA, we only want to add the DMA dependency for that channel
extern const rmt_reg_retention_info_t rmt_reg_retention_info[SOC_RMT_GROUPS];
extern const rmt_reg_retention_info_t rmt_reg_retention_info[RMT_LL_GET(INST_NUM)];
#endif // SOC_RMT_SUPPORT_SLEEP_RETENTION
#endif // SOC_RMT_SUPPORTED
#endif // SOC_HAS(RMT)
#ifdef __cplusplus
}
components/hal/include/hal/rmt_types.h → components/esp_hal_rmt/include/hal/rmt_types.h
+1 -1
View File
@@ -18,7 +18,7 @@ extern "C" {
* @brief RMT group clock source
* @note User should select the clock source based on the power and resolution requirement
*/
#if SOC_RMT_SUPPORTED
#if SOC_HAS(RMT)
typedef soc_periph_rmt_clk_src_t rmt_clock_source_t;
#else
typedef int rmt_clock_source_t;
components/hal/rmt_hal.c → components/esp_hal_rmt/rmt_hal.c
+2 -2
View File
@@ -15,9 +15,9 @@ void rmt_hal_init(rmt_hal_context_t *hal)
rmt_ll_enable_mem_access_nonfifo(hal->regs, true); // APB access the RMTMEM in nonfifo mode
rmt_ll_enable_interrupt(hal->regs, UINT32_MAX, false); // disable all interrupt events
rmt_ll_clear_interrupt_status(hal->regs, UINT32_MAX); // clear all pending events
#if SOC_RMT_SUPPORT_TX_SYNCHRO
#if RMT_LL_SUPPORT(TX_SYNCHRO)
rmt_ll_tx_clear_sync_group(hal->regs);
#endif // SOC_RMT_SUPPORT_TX_SYNCHRO
#endif // RMT_LL_SUPPORT(TX_SYNCHRO)
}
void rmt_hal_deinit(rmt_hal_context_t *hal)
components/esp_system/CMakeLists.txt
+1
View File
@@ -86,6 +86,7 @@ else()
esp_hal_jpeg
esp_hal_emac
esp_hal_pcnt
esp_hal_rmt
esp_hal_parlio
esp_hal_cam
LDFRAGMENTS "linker.lf" "app.lf")
components/hal/CMakeLists.txt
-4
View File
@@ -109,10 +109,6 @@ elseif(NOT BOOTLOADER_BUILD)
list(APPEND srcs "isp_hal.c")
endif()
if(CONFIG_SOC_RMT_SUPPORTED)
list(APPEND srcs "rmt_hal.c")
endif()
if(CONFIG_SOC_UHCI_SUPPORTED)
list(APPEND srcs "uhci_hal.c")
endif()
components/soc/CMakeLists.txt
-4
View File
@@ -89,10 +89,6 @@ if(CONFIG_SOC_LEDC_SUPPORTED)
list(APPEND srcs "${target_folder}/ledc_periph.c")
endif()
if(CONFIG_SOC_RMT_SUPPORTED)
list(APPEND srcs "${target_folder}/rmt_periph.c")
endif()
if(CONFIG_SOC_SDM_SUPPORTED)
list(APPEND srcs "${target_folder}/sdm_periph.c")
endif()
components/soc/esp32/include/soc/Kconfig.soc_caps.in
-28
View File
@@ -479,38 +479,10 @@ config SOC_MPU_REGION_WO_SUPPORTED
bool
default n
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 8
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 8
config SOC_RMT_CHANNELS_PER_GROUP
int
default 8
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 64
config SOC_RMT_SUPPORT_REF_TICK
bool
default y
config SOC_RMT_SUPPORT_APB
bool
default y
config SOC_RMT_CHANNEL_CLK_INDEPENDENT
bool
default y
config SOC_RTCIO_PIN_COUNT
int
default 18
components/soc/esp32/include/soc/soc_caps.h
-7
View File
@@ -248,14 +248,7 @@
#define SOC_MPU_REGION_WO_SUPPORTED 0
/*-------------------------- RMT CAPS ----------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 8 /*!< Number of channels that capable of Transmit in each group */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 8 /*!< Number of channels that capable of Receive in each group */
#define SOC_RMT_CHANNELS_PER_GROUP 8 /*!< Total 8 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 64 /*!< Each channel owns 64 words memory */
#define SOC_RMT_SUPPORT_REF_TICK 1 /*!< Support set REF_TICK as the RMT clock source */
#define SOC_RMT_SUPPORT_APB 1 /*!< Support set APB as the RMT clock source */
#define SOC_RMT_CHANNEL_CLK_INDEPENDENT 1 /*!< Can select different source clock for each channel */
/*-------------------------- RTCIO CAPS --------------------------------------*/
#define SOC_RTCIO_PIN_COUNT 18
components/soc/esp32/rmt_periph.c
-51
View File
@@ -1,51 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "soc/gpio_sig_map.h"
#include "soc/soc.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = RMT_SIG_IN0_IDX
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = RMT_SIG_IN1_IDX
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = RMT_SIG_IN2_IDX
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = RMT_SIG_IN3_IDX
},
[4] = {
.tx_sig = RMT_SIG_OUT4_IDX,
.rx_sig = RMT_SIG_IN4_IDX
},
[5] = {
.tx_sig = RMT_SIG_OUT5_IDX,
.rx_sig = RMT_SIG_IN5_IDX
},
[6] = {
.tx_sig = RMT_SIG_OUT6_IDX,
.rx_sig = RMT_SIG_IN6_IDX
},
[7] = {
.tx_sig = RMT_SIG_OUT7_IDX,
.rx_sig = RMT_SIG_IN7_IDX
}
}
}
}
};
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
-44
View File
@@ -555,22 +555,6 @@ config SOC_MPU_REGION_WO_SUPPORTED
bool
default n
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -579,38 +563,10 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_APB
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH
int
default 128
components/soc/esp32c3/include/soc/soc_caps.h
-11
View File
@@ -238,20 +238,9 @@
#define SOC_MPU_REGION_WO_SUPPORTED 0
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_APB 1 /*!< Support set APB as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST clock as the RMT clock source */
/*-------------------------- RTC CAPS --------------------------------------*/
#define SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH (128)
components/soc/esp32c3/rmt_periph.c
-34
View File
@@ -1,34 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[3] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
}
}
}
};
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
-36
View File
@@ -823,22 +823,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -847,14 +831,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -863,18 +839,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32c5/include/soc/soc_caps.h
-10
View File
@@ -338,21 +338,11 @@
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
// #define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST as the RMT clock source */
/*-------------------------- MCPWM CAPS --------------------------------------*/
#define SOC_MCPWM_SWSYNC_CAN_PROPAGATE 1 ///< Software sync event can be routed to its output
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
-40
View File
@@ -751,22 +751,6 @@ config SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -775,14 +759,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -791,22 +767,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32c6/include/soc/soc_caps.h
-10
View File
@@ -309,20 +309,10 @@
#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST as the RMT clock source */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- MCPWM CAPS --------------------------------------*/
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
-40
View File
@@ -743,22 +743,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -767,14 +751,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -783,22 +759,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32h2/include/soc/soc_caps.h
-11
View File
@@ -322,24 +322,13 @@
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1 /*!< Only avliable in chip version above 1.2*/
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST as the RMT clock source */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- MCPWM CAPS --------------------------------------*/
#define SOC_MCPWM_SWSYNC_CAN_PROPAGATE (1) ///< Software sync event can be routed to its output
#define SOC_MCPWM_SUPPORT_ETM (1) ///< Support ETM (Event Task Matrix)
#define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP (1) ///< Capture timer shares clock with other PWM timers
components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
-40
View File
@@ -587,22 +587,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -611,14 +595,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -627,22 +603,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32h21/include/soc/soc_caps.h
-10
View File
@@ -300,20 +300,10 @@
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST as the RMT clock source */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- MCPWM CAPS --------------------------------------*/
components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
-40
View File
@@ -571,22 +571,6 @@ config SOC_PCNT_SUPPORT_STEP_NOTIFY
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 2
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -595,14 +579,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -611,22 +587,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_SLEEP_RETENTION
bool
default y
components/soc/esp32h4/include/soc/soc_caps.h
-10
View File
@@ -318,20 +318,10 @@
#define SOC_PCNT_SUPPORT_STEP_NOTIFY 1
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Transmit */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 2 /*!< Number of channels that capable of Receive */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST as the RMT clock source */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- MCPWM CAPS --------------------------------------*/
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
-40
View File
@@ -1167,22 +1167,6 @@ config SOC_PCNT_SUPPORT_CLEAR_SIGNAL
bool
default y
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_CHANNELS_PER_GROUP
int
default 8
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -1191,14 +1175,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -1207,22 +1183,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_DMA
bool
default y
components/soc/esp32p4/include/soc/soc_caps.h
-11
View File
@@ -429,25 +429,14 @@
#define SOC_PCNT_SUPPORT_CLEAR_SIGNAL 1 /*!< Support clear signal input */
/*--------------------------- RMT CAPS ---------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Transmit in each group */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Receive in each group */
#define SOC_RMT_CHANNELS_PER_GROUP 8 /*!< Total 8 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST clock as the RMT clock source */
#define SOC_RMT_SUPPORT_DMA 1 /*!< RMT peripheral can connect to DMA channel */
#define SOC_RMT_SUPPORT_SLEEP_RETENTION 1 /*!< The sleep retention feature can help back up RMT registers before sleep */
/*-------------------------- MCPWM CAPS --------------------------------------*/
#define SOC_MCPWM_SWSYNC_CAN_PROPAGATE (1) ///< Software sync event can be routed to its output
#define SOC_MCPWM_SUPPORT_ETM (1) ///< Support ETM (Event Task Matrix)
#define SOC_MCPWM_SUPPORT_EVENT_COMPARATOR (1) ///< Support event comparator (based on ETM)
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
-44
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@@ -523,58 +523,14 @@ config SOC_MPU_REGION_WO_SUPPORTED
bool
default n
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_CHANNELS_PER_GROUP
int
default 4
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 64
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_REF_TICK
bool
default y
config SOC_RMT_SUPPORT_APB
bool
default y
config SOC_RMT_CHANNEL_CLK_INDEPENDENT
bool
default y
config SOC_RTCIO_PIN_COUNT
int
default 22
components/soc/esp32s2/include/soc/soc_caps.h
-11
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@@ -238,19 +238,8 @@
#define SOC_MPU_REGION_WO_SUPPORTED 0
/*-------------------------- RMT CAPS ----------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Transmit in each group */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Receive in each group */
#define SOC_RMT_CHANNELS_PER_GROUP 4 /*!< Total 4 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 64 /*!< Each channel owns 64 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmitting specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_REF_TICK 1 /*!< Support set REF_TICK as the RMT clock source */
#define SOC_RMT_SUPPORT_APB 1 /*!< Support set APB as the RMT clock source */
#define SOC_RMT_CHANNEL_CLK_INDEPENDENT 1 /*!< Can select different source clock for each channel */
/*-------------------------- RTCIO CAPS --------------------------------------*/
#define SOC_RTCIO_PIN_COUNT 22
components/soc/esp32s2/rmt_periph.c
-34
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@@ -1,34 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = RMT_SIG_IN0_IDX
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = RMT_SIG_IN1_IDX
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = RMT_SIG_IN2_IDX
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = RMT_SIG_IN3_IDX
}
}
}
}
};
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
-44
View File
@@ -623,22 +623,6 @@ config SOC_MPU_REGION_WO_SUPPORTED
bool
default n
config SOC_RMT_GROUPS
int
default 1
config SOC_RMT_TX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_RX_CANDIDATES_PER_GROUP
int
default 4
config SOC_RMT_CHANNELS_PER_GROUP
int
default 8
config SOC_RMT_MEM_WORDS_PER_CHANNEL
int
default 48
@@ -647,14 +631,6 @@ config SOC_RMT_SUPPORT_RX_PINGPONG
bool
default y
config SOC_RMT_SUPPORT_RX_DEMODULATION
bool
default y
config SOC_RMT_SUPPORT_ASYNC_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_LOOP_COUNT
bool
default y
@@ -663,26 +639,6 @@ config SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
bool
default y
config SOC_RMT_SUPPORT_TX_SYNCHRO
bool
default y
config SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
bool
default y
config SOC_RMT_SUPPORT_XTAL
bool
default y
config SOC_RMT_SUPPORT_RC_FAST
bool
default y
config SOC_RMT_SUPPORT_APB
bool
default y
config SOC_RMT_SUPPORT_DMA
bool
default y
components/soc/esp32s3/include/soc/soc_caps.h
-11
View File
@@ -257,21 +257,10 @@
#define SOC_MPU_REGION_WO_SUPPORTED 0
/*-------------------------- RMT CAPS ----------------------------------------*/
#define SOC_RMT_GROUPS 1U /*!< One RMT group */
#define SOC_RMT_TX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Transmit in each group */
#define SOC_RMT_RX_CANDIDATES_PER_GROUP 4 /*!< Number of channels that capable of Receive in each group */
#define SOC_RMT_CHANNELS_PER_GROUP 8 /*!< Total 8 channels */
#define SOC_RMT_MEM_WORDS_PER_CHANNEL 48 /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
#define SOC_RMT_SUPPORT_RX_PINGPONG 1 /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION 1 /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_ASYNC_STOP 1 /*!< Support stop transmission asynchronously */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT 1 /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP 1 /*!< Hardware support of auto-stop in loop mode */
#define SOC_RMT_SUPPORT_TX_SYNCHRO 1 /*!< Support coordinate a group of TX channels to start simultaneously */
#define SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY 1 /*!< TX carrier can be modulated to data phase only */
#define SOC_RMT_SUPPORT_XTAL 1 /*!< Support set XTAL clock as the RMT clock source */
#define SOC_RMT_SUPPORT_RC_FAST 1 /*!< Support set RC_FAST clock as the RMT clock source */
#define SOC_RMT_SUPPORT_APB 1 /*!< Support set APB as the RMT clock source */
#define SOC_RMT_SUPPORT_DMA 1 /*!< RMT peripheral can connect to DMA channel */
/*-------------------------- RTC CAPS --------------------------------------*/
components/soc/esp32s3/rmt_periph.c
-50
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@@ -1,50 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rmt_periph.h"
#include "soc/gpio_sig_map.h"
const rmt_signal_conn_t rmt_periph_signals = {
.groups = {
[0] = {
.irq = ETS_RMT_INTR_SOURCE,
.channels = {
[0] = {
.tx_sig = RMT_SIG_OUT0_IDX,
.rx_sig = -1
},
[1] = {
.tx_sig = RMT_SIG_OUT1_IDX,
.rx_sig = -1
},
[2] = {
.tx_sig = RMT_SIG_OUT2_IDX,
.rx_sig = -1
},
[3] = {
.tx_sig = RMT_SIG_OUT3_IDX,
.rx_sig = -1
},
[4] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN0_IDX
},
[5] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN1_IDX
},
[6] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN2_IDX
},
[7] = {
.tx_sig = -1,
.rx_sig = RMT_SIG_IN3_IDX
}
}
}
}
};
docs/doxygen/Doxyfile
+2 -2
View File
@@ -171,6 +171,8 @@ INPUT = \
$(PROJECT_PATH)/components/esp_hal_parlio/include/hal/parlio_types.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/esp_flash_err.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/spi_flash_types.h \
$(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \
$(PROJECT_PATH)/components/esp_hal_rmt/include/hal/rmt_types.h \
$(PROJECT_PATH)/components/esp_http_client/include/esp_http_client.h \
$(PROJECT_PATH)/components/esp_http_server/include/esp_http_server.h \
$(PROJECT_PATH)/components/esp_https_ota/include/esp_https_ota.h \
@@ -261,8 +263,6 @@ INPUT = \
$(PROJECT_PATH)/components/hal/include/hal/gpio_types.h \
$(PROJECT_PATH)/components/hal/include/hal/ledc_types.h \
$(PROJECT_PATH)/components/hal/include/hal/mcpwm_types.h \
$(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \
$(PROJECT_PATH)/components/hal/include/hal/rmt_types.h \
$(PROJECT_PATH)/components/hal/include/hal/rtc_io_types.h \
$(PROJECT_PATH)/components/hal/include/hal/sdio_slave_types.h \
$(PROJECT_PATH)/components/hal/include/hal/sdm_types.h \
docs/en/api-reference/peripherals/rmt.rst
+1 -1
View File
@@ -653,7 +653,7 @@ API Reference
.. include-build-file:: inc/rmt_common.inc
.. include-build-file:: inc/rmt_encoder.inc
.. include-build-file:: inc/components/esp_driver_rmt/include/driver/rmt_types.inc
.. include-build-file:: inc/components/hal/include/hal/rmt_types.inc
.. include-build-file:: inc/components/esp_hal_rmt/include/hal/rmt_types.inc
.. [1]
docs/zh_CN/api-reference/peripherals/rmt.rst
+1 -1
View File
@@ -653,7 +653,7 @@ API 参考
.. include-build-file:: inc/rmt_common.inc
.. include-build-file:: inc/rmt_encoder.inc
.. include-build-file:: inc/components/esp_driver_rmt/include/driver/rmt_types.inc
.. include-build-file:: inc/components/hal/include/hal/rmt_types.inc
.. include-build-file:: inc/components/esp_hal_rmt/include/hal/rmt_types.inc
.. [1]