feat(hal): graudate the parlio hal driver into a new component

This commit is contained in:
laokaiyao
2025-11-13 18:05:09 +08:00
parent c94d08b9f2
commit 377c4d2f39
25 changed files with 114 additions and 21 deletions
@@ -21,5 +21,6 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${public_include}
PRIV_REQUIRES "${priv_requires}"
REQUIRES esp_hal_parlio
LDFRAGMENTS "linker.lf"
)
+2 -2
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@@ -33,8 +33,8 @@ entries:
esp_dma_utils: esp_dma_split_rx_buffer_to_cache_aligned (noflash)
esp_dma_utils: esp_dma_merge_aligned_rx_buffers (noflash)
[mapping:parlio_driver_soc_periph]
archive: libsoc.a
[mapping:parlio_driver_hal_periph]
archive: libesp_hal_parlio.a
entries:
if PARLIO_RX_ISR_HANDLER_IN_IRAM = y:
parlio_periph: parlio_periph_signals (noflash)
@@ -28,7 +28,7 @@
#include "freertos/idf_additions.h"
#include "soc/soc_caps.h"
#include "soc/gdma_channel.h"
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "hal/parlio_types.h"
#include "hal/parlio_hal.h"
#include "hal/parlio_ll.h"
@@ -11,7 +11,8 @@ idf_build_get_property(elf EXECUTABLE)
if(CONFIG_COMPILER_DUMP_RTL_FILES)
add_custom_target(check_test_app_sections ALL
COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_parlio/,${CMAKE_BINARY_DIR}/esp-idf/hal/
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_parlio/,
${CMAKE_BINARY_DIR}/esp-idf/esp_hal_parlio/
--elf-file ${CMAKE_BINARY_DIR}/parlio_test.elf
find-refs
--from-sections=.iram0.text
@@ -20,7 +20,7 @@
#include "hal/cache_ll.h"
#include "soc/soc_caps.h"
#include "soc/spi_periph.h"
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "esp_attr.h"
#include "test_board.h"
#include "esp_private/parlio_rx_private.h"
+18
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@@ -0,0 +1,18 @@
idf_build_get_property(target IDF_TARGET)
if(${target} STREQUAL "linux")
return() # This component is not supported by the POSIX/Linux simulator
endif()
set(srcs)
set(includes "include")
if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
list(APPEND includes "${target}/include")
endif()
if(CONFIG_SOC_PARLIO_SUPPORTED)
list(APPEND srcs "${target}/parlio_periph.c" "parlio_hal.c")
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
REQUIRES soc hal)
+81
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@@ -0,0 +1,81 @@
# ESP Hardware Abstraction Layer for Parallel IO Peripheral(s)
> [!NOTE]
> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
## Overview
The `esp_hal_parlio` component provides a **Hardware Abstraction Layer** for Parallel IO (PARLIO) peripherals across all ESP-IDF supported targets. PARLIO enables high-speed parallel data transfer between the ESP chip and external devices, supporting both transmit (TX) and receive (RX) operations with configurable data widths and timing characteristics.
## Architecture
The PARLIO HAL is structured in two main sub-layers:
1. **HAL Layer (Upper)**: Defines the operational steps and data structures required to control PARLIO peripherals (e.g., initialization, unit configuration, transfer start/stop).
2. **Low-Level Layer (Bottom)**: Serves as a translation layer between the HAL and the register files defined in the `soc` component, handling target-specific register configurations.
## Supported PARLIO Units
This HAL supports PARLIO peripherals with the following units depending on the ESP chip:
- **TX Unit**: Transmits parallel data to external devices
- Configurable data width
- Clock output or external clock input support
- Chip select (CS) signal support (on some chips)
- Valid signal generation and delay control
- **RX Unit**: Receives parallel data from external devices
- Configurable data width
- Clock input support
- Multiple sampling modes (level-controlled, pulse-controlled, software-controlled)
- Timeout detection support
## Features
### Clock Configuration
- Multiple clock source selection
- Configurable clock divider with integer and fractional support (on some chips)
- Independent clock configuration for TX and RX units
### Data Transfer Control
- Configurable bus width
- Bit packing order configuration (LSB/MSB)
- Sample clock edge selection (rising/falling edge)
- Frame length configuration
### RX Unit Features
- Level-controlled receive mode with active high/low enable signal
- Pulse-controlled receive mode with configurable start/end pulse counting
- Software-controlled receive mode
- RX timeout detection and threshold configuration
- Clock gating support
- Data line as enable signal support
### TX Unit Features
- Data length configuration
- Clock gating support
- Valid signal generation and delay control (on some chips)
- Idle data value configuration
- DMA EOF condition support (on some chips)
### Interrupt and Event Handling
- TX FIFO empty event
- RX FIFO full event
- TX EOF (End of Frame) event
- Interrupt enable/disable and status management
### Power Management
- Sleep retention support (on some chips)
- Register state preservation during sleep
## Usage
The HAL functions primarily serve ESP-IDF peripheral drivers such as `esp_driver_parlio`.
Advanced developers can use these interfaces directly when implementing custom drivers, with the understanding that API stability is not guaranteed.
## Dependencies
- `soc`: Provides chip-specific register definitions
- `hal`: Core hardware abstraction utilities and macros
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "soc/gpio_sig_map.h"
const parlio_signal_conn_t parlio_periph_signals = {
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "soc/gpio_sig_map.h"
const parlio_signal_conn_t parlio_periph_signals = {
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "soc/gpio_sig_map.h"
const parlio_signal_conn_t parlio_periph_signals = {
@@ -34,7 +34,6 @@
#define PARLIO_LL_EVENT_TX_MASK (PARLIO_LL_EVENT_TX_FIFO_EMPTY | PARLIO_LL_EVENT_TX_EOF)
#define PARLIO_LL_EVENT_RX_MASK (PARLIO_LL_EVENT_RX_FIFO_FULL)
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) < 300
#define PARLIO_LL_TX_DATA_LINE_AS_VALID_SIG 15 // TXD[15] can be used a valid signal
#endif
@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/parlio_periph.h"
#include "hal/parlio_periph.h"
#include "soc/gpio_sig_map.h"
const parlio_signal_conn_t parlio_periph_signals = {
+1
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@@ -86,6 +86,7 @@ else()
esp_hal_jpeg
esp_hal_emac
esp_hal_pcnt
esp_hal_parlio
LDFRAGMENTS "linker.lf" "app.lf")
add_subdirectory(port)
-4
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@@ -137,10 +137,6 @@ elseif(NOT BOOTLOADER_BUILD)
list(APPEND srcs "etm_hal.c" "${target}/etm_periph.c")
endif()
if(CONFIG_SOC_PARLIO_SUPPORTED)
list(APPEND srcs "parlio_hal.c")
endif()
if(CONFIG_SOC_ADC_SUPPORTED)
list(APPEND srcs "adc_hal_common.c" "adc_oneshot_hal.c")
-4
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@@ -113,10 +113,6 @@ if(CONFIG_SOC_MIPI_CSI_SUPPORTED)
list(APPEND srcs "${target_folder}/mipi_csi_periph.c")
endif()
if(CONFIG_SOC_PARLIO_SUPPORTED)
list(APPEND srcs "${target_folder}/parlio_periph.c")
endif()
if(CONFIG_SOC_MPI_SUPPORTED)
list(APPEND srcs "${target_folder}/mpi_periph.c")
endif()
+1 -1
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@@ -168,6 +168,7 @@ INPUT = \
$(PROJECT_PATH)/components/esp_hal_i2s/include/hal/i2s_types.h \
$(PROJECT_PATH)/components/esp_hal_jpeg/include/hal/jpeg_types.h \
$(PROJECT_PATH)/components/esp_hal_lcd/include/hal/lcd_types.h \
$(PROJECT_PATH)/components/esp_hal_parlio/include/hal/parlio_types.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/esp_flash_err.h \
$(PROJECT_PATH)/components/esp_hal_mspi/include/hal/spi_flash_types.h \
$(PROJECT_PATH)/components/esp_http_client/include/esp_http_client.h \
@@ -260,7 +261,6 @@ INPUT = \
$(PROJECT_PATH)/components/hal/include/hal/gpio_types.h \
$(PROJECT_PATH)/components/hal/include/hal/ledc_types.h \
$(PROJECT_PATH)/components/hal/include/hal/mcpwm_types.h \
$(PROJECT_PATH)/components/hal/include/hal/parlio_types.h \
$(PROJECT_PATH)/components/esp_hal_pcnt/include/hal/pcnt_types.h \
$(PROJECT_PATH)/components/hal/include/hal/rmt_types.h \
$(PROJECT_PATH)/components/hal/include/hal/rtc_io_types.h \
@@ -20,4 +20,4 @@ API Reference
-------------
.. include-build-file:: inc/components/esp_driver_parlio/include/driver/parlio_types.inc
.. include-build-file:: inc/components/hal/include/hal/parlio_types.inc
.. include-build-file:: inc/components/esp_hal_parlio/include/hal/parlio_types.inc
@@ -20,4 +20,4 @@ API 参考
-------------
.. include-build-file:: inc/components/esp_driver_parlio/include/driver/parlio_types.inc
.. include-build-file:: inc/components/hal/include/hal/parlio_types.inc
.. include-build-file:: inc/components/esp_hal_parlio/include/hal/parlio_types.inc