fix(spm): rename scp (scratchpad) to spm (scratchpad memory)

This commit is contained in:
armando
2026-03-16 17:37:36 +08:00
parent 1b85ad5081
commit 45ec3b962b
25 changed files with 121 additions and 121 deletions
@@ -197,31 +197,31 @@ inline static void * esp_ptr_diram_iram_to_dram(const void *p) {
#endif
}
#if SOC_MEM_SCP_SUPPORTED
#if SOC_MEM_SPM_SUPPORTED
/**
* @brief Check if the pointer is in TCM (SCP)
* @brief Check if the pointer is in TCM (SPM)
*
* @param p pointer
*
* @return true: is in TCM (SCP); false: not in TCM (SCP)
* @return true: is in TCM (SPM); false: not in TCM (SPM)
*/
__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_scp instead")))
__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_spm instead")))
inline static bool esp_ptr_in_tcm(const void *p) {
return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
}
/**
* @brief Check if the pointer is in SCP
* @brief Check if the pointer is in SPM
*
* @param p pointer
*
* @return true: is in SCP; false: not in SCP
* @return true: is in SPM; false: not in SPM
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_scp(const void *p) {
return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
inline static bool esp_ptr_in_spm(const void *p) {
return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
}
#endif //#if SOC_MEM_SCP_SUPPORTED
#endif //#if SOC_MEM_SPM_SUPPORTED
/** End of the common section that has to be in sync with esp_memory_utils.h **/
@@ -524,8 +524,8 @@ static bool verify_load_addresses(int segment_index, intptr_t load_addr, intptr_
}
#endif
#if SOC_MEM_SCP_SUPPORTED
else if (esp_ptr_in_scp(load_addr_p) && esp_ptr_in_scp(load_inclusive_end_p)) {
#if SOC_MEM_SPM_SUPPORTED
else if (esp_ptr_in_spm(load_addr_p) && esp_ptr_in_spm(load_inclusive_end_p)) {
return true;
}
#endif
+10 -10
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@@ -29,19 +29,19 @@ extern "C" {
// Forces data into DRAM instead of flash
#define DRAM_ATTR _SECTION_ATTR_IMPL(".dram1", __COUNTER__)
// Places code into SCP instead of flash
#define SPM_IRAM_ATTR _SECTION_ATTR_IMPL(".scp.text", __COUNTER__)
// Places code into SPM instead of flash
#define SPM_IRAM_ATTR _SECTION_ATTR_IMPL(".spm.text", __COUNTER__)
// Forces code into SCP instead of flash
#define FORCE_SPM_IRAM_ATTR _SECTION_FORCE_ATTR_IMPL(".scp.text", __COUNTER__)
// Forces code into SPM instead of flash
#define FORCE_SPM_IRAM_ATTR _SECTION_FORCE_ATTR_IMPL(".spm.text", __COUNTER__)
// Forces data into SCP instead of L2MEM
#define SPM_DRAM_ATTR _SECTION_ATTR_IMPL(".scp.data", __COUNTER__)
// Forces data into SPM instead of L2MEM
#define SPM_DRAM_ATTR _SECTION_ATTR_IMPL(".spm.data", __COUNTER__)
// Deprecated macros for TCM (SCP)
#define TCM_IRAM_ATTR _SECTION_ATTR_IMPL(".scp.text", __COUNTER__) _Pragma ("GCC warning \"'TCM_IRAM_ATTR' macro is deprecated, please use `SPM_IRAM_ATTR`\"")
#define FORCE_TCM_IRAM_ATTR _SECTION_FORCE_ATTR_IMPL(".scp.text", __COUNTER__) _Pragma ("GCC warning \"'FORCE_TCM_IRAM_ATTR' macro is deprecated, please use `FORCE_SPM_IRAM_ATTR`\"")
#define TCM_DRAM_ATTR _SECTION_ATTR_IMPL(".scp.data", __COUNTER__) _Pragma ("GCC warning \"'TCM_DRAM_ATTR' macro is deprecated, please use `SPM_DRAM_ATTR`\"")
// Deprecated macros for TCM (SPM)
#define TCM_IRAM_ATTR _SECTION_ATTR_IMPL(".spm.text", __COUNTER__) _Pragma ("GCC warning \"'TCM_IRAM_ATTR' macro is deprecated, please use `SPM_IRAM_ATTR`\"")
#define FORCE_TCM_IRAM_ATTR _SECTION_FORCE_ATTR_IMPL(".spm.text", __COUNTER__) _Pragma ("GCC warning \"'FORCE_TCM_IRAM_ATTR' macro is deprecated, please use `FORCE_SPM_IRAM_ATTR`\"")
#define TCM_DRAM_ATTR _SECTION_ATTR_IMPL(".spm.data", __COUNTER__) _Pragma ("GCC warning \"'TCM_DRAM_ATTR' macro is deprecated, please use `SPM_DRAM_ATTR`\"")
// Forces data to be removed from the final binary but keeps it in the ELF file
#define NOLOAD_ATTR _SECTION_ATTR_IMPL(".noload_keep_in_elf", __COUNTER__)
+6 -6
View File
@@ -42,14 +42,14 @@ entries:
entries:
.ext_ram.bss+
[sections:scp_text]
[sections:spm_text]
entries:
.scp.text+
.spm.text+
[sections:scp_data]
[sections:spm_data]
entries:
.scp.data+
.spm.data+
[sections:scp_bss]
[sections:spm_bss]
entries:
.scp.bss+
.spm.bss+
+2 -2
View File
@@ -711,8 +711,8 @@ esp_err_t dma2d_set_desc_addr(dma2d_channel_handle_t dma2d_chan, intptr_t desc_b
{
esp_err_t ret = ESP_OK;
ESP_GOTO_ON_FALSE_ISR(dma2d_chan && desc_base_addr, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
// 2D-DMA descriptor addr needs 8-byte alignment and not in SCP (addr not in SCP is IDF restriction)
ESP_GOTO_ON_FALSE_ISR((desc_base_addr & 0x7) == 0 && !esp_ptr_in_scp((void *)desc_base_addr), ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
// 2D-DMA descriptor addr needs 8-byte alignment and not in SPM (addr not in SPM is IDF restriction)
ESP_GOTO_ON_FALSE_ISR((desc_base_addr & 0x7) == 0 && !esp_ptr_in_spm((void *)desc_base_addr), ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
dma2d_group_t *group = dma2d_chan->group;
int channel_id = dma2d_chan->channel_id;
+2 -2
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@@ -52,8 +52,8 @@ bool esp_ptr_byte_accessible(const void *p)
intptr_t ip = (intptr_t) p;
bool r;
r = (ip >= SOC_BYTE_ACCESSIBLE_LOW && ip < SOC_BYTE_ACCESSIBLE_HIGH);
#if SOC_MEM_SCP_SUPPORTED
r |= esp_ptr_in_scp(p);
#if SOC_MEM_SPM_SUPPORTED
r |= esp_ptr_in_spm(p);
#endif
#if CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
/* For ESP32 case, RTC fast memory is accessible to PRO cpu only and hence
@@ -196,31 +196,31 @@ inline static void * esp_ptr_diram_iram_to_dram(const void *p) {
#endif
}
#if SOC_MEM_SCP_SUPPORTED
#if SOC_MEM_SPM_SUPPORTED
/**
* @brief Check if the pointer is in TCM (SCP)
* @brief Check if the pointer is in TCM (SPM)
*
* @param p pointer
*
* @return true: is in TCM (SCP); false: not in TCM (SCP)
* @return true: is in TCM (SPM); false: not in TCM (SPM)
*/
__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_scp instead")))
__attribute__((always_inline, deprecated("esp_ptr_in_tcm is deprecated, please use esp_ptr_in_spm instead")))
inline static bool esp_ptr_in_tcm(const void *p) {
return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
}
/**
* @brief Check if the pointer is in SCP
* @brief Check if the pointer is in SPM
*
* @param p pointer
*
* @return true: is in SCP; false: not in SCP
* @return true: is in SPM; false: not in SPM
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_scp(const void *p) {
return ((intptr_t)p >= SOC_SCP_LOW && (intptr_t)p < SOC_SCP_HIGH);
inline static bool esp_ptr_in_spm(const void *p) {
return ((intptr_t)p >= SOC_SPM_LOW && (intptr_t)p < SOC_SPM_HIGH);
}
#endif //#if SOC_MEM_SCP_SUPPORTED
#endif //#if SOC_MEM_SPM_SUPPORTED
/** End of common functions to be kept in sync with bootloader_memory_utils.h **/
/** Add app-specific functions below **/
@@ -290,8 +290,8 @@ inline static bool esp_ptr_internal(const void *p) {
bool r;
r = ((intptr_t)p >= SOC_MEM_INTERNAL_LOW && (intptr_t)p < SOC_MEM_INTERNAL_HIGH);
#if SOC_MEM_SCP_SUPPORTED
r |= esp_ptr_in_scp(p);
#if SOC_MEM_SPM_SUPPORTED
r |= esp_ptr_in_spm(p);
#endif
#if SOC_RTC_SLOW_MEM_SUPPORTED
@@ -14,7 +14,7 @@
#define MTVT (0x307)
#define MINTTHRESH (0x347)
.section .scp.data,"aw"
.section .spm.data,"aw"
.global rv_core_critical_regs_frame
.type rv_core_critical_regs_frame,@object
.align 4
@@ -33,7 +33,7 @@ rv_core_critical_regs_frame:
--------------------------------------------------------------------------------
*/
.section .scp.text,"ax"
.section .spm.text,"ax"
.global rv_core_critical_regs_save
.type rv_core_critical_regs_save,@function
.align 4
@@ -50,12 +50,12 @@ static void esp_cpu_configure_invalid_regions(void)
// 0. Gap at bottom of address space
PMA_RESET_AND_ENTRY_SET_NAPOT(0, 0, SOC_CPU_SUBSYSTEM_LOW, PMA_NAPOT | PMA_NONE);
// 1. Gap between CPU subsystem region & HP SCP
// 1. Gap between CPU subsystem region & HP SPM
PMA_RESET_AND_ENTRY_SET_TOR(1, SOC_CPU_SUBSYSTEM_HIGH, PMA_NONE);
PMA_RESET_AND_ENTRY_SET_TOR(2, SOC_SCP_LOW, PMA_TOR | PMA_NONE);
PMA_RESET_AND_ENTRY_SET_TOR(2, SOC_SPM_LOW, PMA_TOR | PMA_NONE);
// 2. Gap between HP SCP and CPU Peripherals
PMA_RESET_AND_ENTRY_SET_TOR(3, SOC_SCP_HIGH, PMA_NONE);
// 2. Gap between HP SPM and CPU Peripherals
PMA_RESET_AND_ENTRY_SET_TOR(3, SOC_SPM_HIGH, PMA_NONE);
PMA_RESET_AND_ENTRY_SET_TOR(4, CPU_PERIPH_LOW, PMA_TOR | PMA_NONE);
// 3. Gap between CPU Peripherals and I_Cache
@@ -106,8 +106,8 @@ static void esp_cpu_configure_region_protection_rev_v3(void)
PMP_RESET_AND_ENTRY_SET(0, pmpaddr0, PMP_NAPOT | RW);
_Static_assert(SOC_CPU_SUBSYSTEM_LOW < SOC_CPU_SUBSYSTEM_HIGH, "Invalid CPU subsystem region");
// 2. HP-CPU SCP
// The default memory permissions are RWX and SCP should be RWX, so we can skip configuring it
// 2. HP-CPU SPM
// The default memory permissions are RWX and SPM should be RWX, so we can skip configuring it
// 3. CPU Peripherals
const uint32_t pmpaddr1 = PMPADDR_NAPOT(CPU_PERIPH_LOW, CPU_PERIPH_HIGH);
+8 -8
View File
@@ -22,8 +22,8 @@ entries:
rtc_data -> rtc_data
rtc_rodata -> rtc_data
rtc_bss -> rtc_bss
scp_text -> scp_text
scp_data -> scp_data
spm_text -> spm_text
spm_data -> spm_data
[scheme:rtc]
entries:
@@ -46,13 +46,13 @@ entries:
entries:
text -> iram0_text
[scheme:scp]
[scheme:spm]
entries:
text -> scp_text
data -> scp_data
rodata -> scp_data
bss -> scp_bss
common -> scp_bss
text -> spm_text
data -> spm_data
rodata -> spm_data
bss -> spm_bss
common -> spm_bss
[mapping:default]
archive: *
@@ -46,8 +46,8 @@ MEMORY
* of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
* are connected to the data port of the CPU and eg allow byte-wise access.
*/
/* SCP */
scp_idram_seg (RX) : org = 0x30100000, len = 0x2000
/* SPM */
spm_idram_seg (RX) : org = 0x30100000, len = 0x2000
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_SPIRAM_FETCH_INSTRUCTIONS
+13 -13
View File
@@ -157,26 +157,26 @@ SECTIONS
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
"RTC_FAST segment data does not fit.")
.scp.text :
.spm.text :
{
/* Code marked as running out of SCP */
_scp_text_start = ABSOLUTE(.);
/* Code marked as running out of SPM */
_spm_text_start = ABSOLUTE(.);
arrays[scp_text]
mapping[scp_text]
arrays[spm_text]
mapping[spm_text]
_scp_text_end = ABSOLUTE(.);
} > scp_idram_seg
_spm_text_end = ABSOLUTE(.);
} > spm_idram_seg
.scp.data :
.spm.data :
{
_scp_data_start = ABSOLUTE(.);
_spm_data_start = ABSOLUTE(.);
arrays[scp_data]
mapping[scp_data]
arrays[spm_data]
mapping[spm_data]
_scp_data_end = ABSOLUTE(.);
} > scp_idram_seg
_spm_data_end = ABSOLUTE(.);
} > spm_idram_seg
.iram0.text :
{
@@ -166,26 +166,26 @@ SECTIONS
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
"RTC_FAST segment data does not fit.")
.scp.text :
.spm.text :
{
/* Code marked as running out of SCP */
_scp_text_start = ABSOLUTE(.);
/* Code marked as running out of SPM */
_spm_text_start = ABSOLUTE(.);
arrays[scp_text]
mapping[scp_text]
arrays[spm_text]
mapping[spm_text]
_scp_text_end = ABSOLUTE(.);
} > scp_idram_seg
_spm_text_end = ABSOLUTE(.);
} > spm_idram_seg
.scp.data :
.spm.data :
{
_scp_data_start = ABSOLUTE(.);
_spm_data_start = ABSOLUTE(.);
arrays[scp_data]
mapping[scp_data]
arrays[spm_data]
mapping[spm_data]
_scp_data_end = ABSOLUTE(.);
} > scp_idram_seg
_spm_data_end = ABSOLUTE(.);
} > spm_idram_seg
.iram0.text :
{
-15
View File
@@ -1,15 +0,0 @@
#include "ld.common"
.scp.text :
{
/* Code marked as running out of scp */
_scp_text_start = ABSOLUTE(.);
SECTION_MAPPINGS(scp_text)
_scp_text_end = ABSOLUTE(.);
} > scp_idram_seg
.scp.data :
{
_scp_data_start = ABSOLUTE(.);
SECTION_MAPPINGS(scp_data)
_scp_data_end = ABSOLUTE(.);
} > scp_idram_seg
+15
View File
@@ -0,0 +1,15 @@
#include "ld.common"
.spm.text :
{
/* Code marked as running out of spm */
_spm_text_start = ABSOLUTE(.);
SECTION_MAPPINGS(spm_text)
_spm_text_end = ABSOLUTE(.);
} > spm_idram_seg
.spm.data :
{
_spm_data_start = ABSOLUTE(.);
SECTION_MAPPINGS(spm_data)
_spm_data_end = ABSOLUTE(.);
} > spm_idram_seg
@@ -21,8 +21,8 @@ extern "C" {
/**
* Select CPU reset vector
* @param boot_from_lp_ram
* true: boot from LP SCP RAM: 0x50108000
* false: boot from HP SCP ROM: 0x4FC00000
* true: boot from LP SPM RAM: 0x50108000
* false: boot from HP SPM ROM: 0x4FC00000
*/
__attribute__((always_inline))
static inline void lp_clkrst_ll_boot_from_lp_ram(bool boot_from_lp_ram)
+2 -2
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@@ -44,8 +44,8 @@ extern "C" {
#define MALLOC_CAP_IRAM_8BIT (1<<13) ///< Memory must be in IRAM and allow unaligned access
#define MALLOC_CAP_RETENTION (1<<14) ///< Memory must be able to accessed by retention DMA
#define MALLOC_CAP_RTCRAM (1<<15) ///< Memory must be in RTC fast memory
#define MALLOC_CAP_SCP (1<<16) ///< Memory must be in SCP memory
#define MALLOC_CAP_TCM MALLOC_CAP_SCP _Pragma ("GCC warning \"'MALLOC_CAP_TCM' macro is deprecated, please use `MALLOC_CAP_SCP`\"")
#define MALLOC_CAP_SPM (1<<16) ///< Memory must be in SPM memory
#define MALLOC_CAP_TCM MALLOC_CAP_SPM _Pragma ("GCC warning \"'MALLOC_CAP_TCM' macro is deprecated, please use `MALLOC_CAP_SPM`\"")
#define MALLOC_CAP_DMA_DESC_AHB (1<<17) ///< Memory must be capable of containing AHB DMA descriptors
#define MALLOC_CAP_DMA_DESC_AXI (1<<18) ///< Memory must be capable of containing AXI DMA descriptors
#define MALLOC_CAP_CACHE_ALIGNED (1<<19) ///< Memory must be aligned to the cache line size of any intermediate caches
+6 -6
View File
@@ -36,7 +36,7 @@ enum {
*/
SOC_MEMORY_TYPE_RETENT_MEM = 1,
SOC_MEMORY_TYPE_SPIRAM = 2,
SOC_MEMORY_TYPE_SCP = 3,
SOC_MEMORY_TYPE_SPM = 3,
SOC_MEMORY_TYPE_RTCRAM = 4,
SOC_MEMORY_TYPE_NUM,
};
@@ -53,7 +53,7 @@ enum {
#endif
// The memory used for SIMD instructions requires the bus of its memory regions be able to transfer the data in 128-bit
// SCP and RTCRAM memory regions cannot satisfy 128-bit data access
// SPM and RTCRAM memory regions cannot satisfy 128-bit data access
/**
* Defined the attributes and allocation priority of each memory on the chip,
@@ -66,7 +66,7 @@ const soc_memory_type_desc_t soc_memory_types[SOC_MEMORY_TYPE_NUM] = {
[SOC_MEMORY_TYPE_RETENT_MEM] = { "RETENT_RAM", { MALLOC_L2MEM_BASE_CAPS | MALLOC_CAP_RETENTION | MALLOC_CAP_SIMD, 0, 0 }},
[SOC_MEMORY_TYPE_L2MEM] = { "RAM", { MALLOC_L2MEM_BASE_CAPS | MALLOC_CAP_SIMD, 0, 0 }},
[SOC_MEMORY_TYPE_SPIRAM] = { "SPIRAM", { MALLOC_CAP_SPIRAM, 0, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_SIMD }},
[SOC_MEMORY_TYPE_SCP] = { "SCP", { MALLOC_CAP_SCP, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_INTERNAL, 0 }},
[SOC_MEMORY_TYPE_SPM] = { "SPM", { MALLOC_CAP_SPM, ESP32P4_MEM_COMMON_CAPS | MALLOC_CAP_INTERNAL, 0 }},
[SOC_MEMORY_TYPE_RTCRAM] = { "RTCRAM", { MALLOC_CAP_RTCRAM, 0, MALLOC_RTCRAM_BASE_CAPS}},
};
@@ -112,7 +112,7 @@ const soc_memory_region_t soc_memory_regions[] = {
#ifdef CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
{ 0x50108000, APP_USABLE_LP_RAM_SIZE, SOC_MEMORY_TYPE_RTCRAM, 0, false}, //LPRAM
#endif
{ 0x30100000, 0x2000, SOC_MEMORY_TYPE_SCP, 0, false},
{ 0x30100000, 0x2000, SOC_MEMORY_TYPE_SPM, 0, false},
};
const size_t soc_memory_region_count = sizeof(soc_memory_regions) / sizeof(soc_memory_region_t);
@@ -125,7 +125,7 @@ extern int _data_start, _heap_start, _iram_start, _iram_end, _rtc_force_slow_end
extern int _rtc_p4_rev3_mspi_workaround_start, _rtc_p4_rev3_mspi_workaround_end;
#endif
#endif
extern int _scp_text_start, _scp_data_end;
extern int _spm_text_start, _spm_data_end;
extern int _rtc_reserved_start, _rtc_reserved_end;
extern int _rtc_ulp_memory_start;
@@ -146,7 +146,7 @@ SOC_RESERVE_MEMORY_REGION((intptr_t)&_data_start, (intptr_t)&_heap_start, dram_d
// Target has a shared D/IRAM virtual address, no need to calculate I_D_OFFSET like previous chips
SOC_RESERVE_MEMORY_REGION((intptr_t)&_iram_start, (intptr_t)&_iram_end, iram_code);
SOC_RESERVE_MEMORY_REGION((intptr_t)&_scp_text_start, (intptr_t)&_scp_data_end, scp_code_data);
SOC_RESERVE_MEMORY_REGION((intptr_t)&_spm_text_start, (intptr_t)&_spm_data_end, spm_code_data);
#ifdef CONFIG_SPIRAM
SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_LOW, SOC_EXTRAM_HIGH, extram_region);
@@ -1899,7 +1899,7 @@ config SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_MEM_SCP_SUPPORTED
config SOC_MEM_SPM_SUPPORTED
bool
default y
+2 -2
View File
@@ -156,8 +156,8 @@
#define SOC_IROM_MASK_HIGH 0x4fc20000
#define SOC_DROM_MASK_LOW 0x4fc00000
#define SOC_DROM_MASK_HIGH 0x4fc20000
#define SOC_SCP_LOW 0x30100000
#define SOC_SCP_HIGH 0x30102000
#define SOC_SPM_LOW 0x30100000
#define SOC_SPM_HIGH 0x30102000
#define SOC_IRAM_LOW 0x4ff00000
#define SOC_IRAM_HIGH 0x4ffc0000
#define SOC_DRAM_LOW 0x4ff00000
@@ -727,7 +727,7 @@
#define SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION (1)
/*-------------------------- Memory CAPS --------------------------*/
#define SOC_MEM_SCP_SUPPORTED (1)
#define SOC_MEM_SPM_SUPPORTED (1)
#define SOC_ASYNCHRONOUS_BUS_ERROR_MODE (1)
/*--------------------------- EMAC --------------------------------*/
#define SOC_EMAC_IEEE1588V2_SUPPORTED (1) /*!< EMAC Supports IEEE1588v2 time stamping */
+1 -1
View File
@@ -187,7 +187,7 @@ The ``DRAM_ATTR`` attribute can be used to force constants from DROM into the :r
Remaining RTC FAST memory is added to the heap unless the option :ref:`CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP` is disabled. This memory can be used interchangeably with :ref:`DRAM`, but is slightly slower to access.
.. only:: SOC_MEM_SCP_SUPPORTED
.. only:: SOC_MEM_SPM_SUPPORTED
SPM (Scratchpad Memory)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+1 -1
View File
@@ -127,7 +127,7 @@
I (310) heap_init: At 4FF3AFC0 len 00004BE4 (18 KiB): RAM
I (316) heap_init: At 4FF40000 len 00060000 (384 KiB): RAM
I (323) heap_init: At 50108000 len 00007FE8 (31 KiB): RTCRAM
I (329) heap_init: At 30100044 len 00001FBC (7 KiB): SCP
I (329) heap_init: At 30100044 len 00001FBC (7 KiB): SPM
I (336) spi_flash: detected chip: generic
I (340) spi_flash: flash io: dio
W (344) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
+1 -1
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@@ -187,7 +187,7 @@ DROM(数据存储在 flash 中)
除非禁用 :ref:`CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP` 选项,否则剩余的 RTC FAST memory 会被添加到堆中。该部分内存可以和 :ref:`DRAM` 互换使用,但是访问速度稍慢一点。
.. only:: SOC_MEM_SCP_SUPPORTED
.. only:: SOC_MEM_SPM_SUPPORTED
SPM(暂存内存)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+1 -1
View File
@@ -127,7 +127,7 @@
I (310) heap_init: At 4FF3AFC0 len 00004BE4 (18 KiB): RAM
I (316) heap_init: At 4FF40000 len 00060000 (384 KiB): RAM
I (323) heap_init: At 50108000 len 00007FE8 (31 KiB): RTCRAM
I (329) heap_init: At 30100044 len 00001FBC (7 KiB): SCP
I (329) heap_init: At 30100044 len 00001FBC (7 KiB): SPM
I (336) spi_flash: detected chip: generic
I (340) spi_flash: flash io: dio
W (344) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.