fix(esp_system): fix XTAL32K power breaks ADC function on 32k XTAL clock pin

This commit is contained in:
wuzhenghui
2025-11-10 17:40:49 +08:00
parent 32b717566f
commit 4a0aac02a4
2 changed files with 16 additions and 0 deletions
@@ -177,6 +177,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {
rtc_clk_rc32k_enable(false);
}
// We have enabled all LP clock power in pmu_init, re-initialize the LP clock power based on the slow clock source after selection.
pmu_lp_power_t lp_clk_power = {
.xpd_xtal32k = (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW),
.xpd_rc32k = (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K),
.xpd_fosc = 1,
.pd_osc = 0
};
pmu_ll_lp_set_clk_power(&PMU, PMU_MODE_LP_ACTIVE, lp_clk_power.val);
if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup.
@@ -178,6 +178,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src)
if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) {
rtc_clk_rc32k_enable(false);
}
// We have enabled all LP clock power in pmu_init, re-initialize the LP clock power based on the slow clock source after selection.
pmu_lp_power_t lp_clk_power = {
.xpd_xtal32k = (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) || (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_OSC_SLOW),
.xpd_rc32k = (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K),
.xpd_fosc = 1,
.pd_osc = 0
};
pmu_ll_lp_set_clk_power(&PMU, PMU_MODE_LP_ACTIVE, lp_clk_power.val);
if (SLOW_CLK_CAL_CYCLES > 0) {
/* TODO: 32k XTAL oscillator has some frequency drift at startup.