fix(esp_timer): enable systimer functional clock on ESP32-S31

ESP32-S31 has a separate functional clock gate for the systimer
(reg_systimer_clk_en in HP_SYS_CLKRST) that defaults to off. Without
it, the counter snapshot never completes, hanging execution inside
esp_timer_init_nonos.

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>

components/esp_hal_systimer/esp32c2/include/hal/systimer_ll.h

@@ -62,6 +62,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32c3/include/hal/systimer_ll.h

@@ -62,6 +62,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32c5/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32c6/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32c61/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32h2/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32h21/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32h4/include/hal/systimer_ll.h

@@ -63,6 +63,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32p4/include/hal/systimer_ll.h

@@ -70,6 +70,23 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    HP_SYS_CLKRST.peri_clk_ctrl21.reg_systimer_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
+#define systimer_ll_enable_sys_clock(...) do { \
+        (void)__DECLARE_RCC_RC_ATOMIC_ENV; \
+        systimer_ll_enable_sys_clock(__VA_ARGS__); \
+    } while(0)
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32s2/include/hal/systimer_ll.h

@@ -62,6 +62,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32s3/include/hal/systimer_ll.h

@@ -62,6 +62,17 @@ static inline void systimer_ll_enable_bus_clock(bool enable)
         systimer_ll_enable_bus_clock(__VA_ARGS__); \
     } while(0)
 
+/**
+ * @brief Enable the sys clock for systimer module
+ *        This chip does not have a separate sys clock gate, this is a no-op.
+ *
+ * @param enable true to enable, false to disable
+ */
+static inline void systimer_ll_enable_sys_clock(bool enable)
+{
+    (void)enable;
+}
+
 /**
  * @brief Reset the systimer module
  *

components/esp_hal_systimer/esp32s31/include/hal/systimer_ll.h

@@ -29,7 +29,6 @@ extern "C" {
 #define SYSTIMER_LL_INT_LEVEL               1  // Systimer peripheral uses level interrupt
 #define SYSTIMER_LL_ALARM_MISS_COMPENSATE   1  // Systimer peripheral can generate interrupt immediately if t(target) > t(current)
 #define SYSTIMER_LL_FIXED_DIVIDER           1  // Clock source divider is fixed: 2.5
-
 /******************* Clock *************************/
 
 __attribute__((always_inline)) static inline void systimer_ll_enable_clock(systimer_dev_t *dev, bool en)

components/esp_timer/src/esp_timer_impl_systimer.c

@@ -153,6 +153,7 @@ esp_err_t esp_timer_impl_early_init(void)
         if (ref_count == 0) {
             systimer_ll_enable_bus_clock(true);
             systimer_ll_reset_register();
+            systimer_ll_enable_sys_clock(true);
         }
     }
     systimer_hal_tick_rate_ops_t ops = {