espressif/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-04-27 19:13:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

feat(esp32s31): Add watchdog timer support

Browse Source 
Made-with: Cursor
This commit is contained in:
Marius Vikhammer
2026-01-16 14:45:11 +08:00
parent 1a27f44f04
commit 52952535bc
7 changed files with 15 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/bootloader_support/src/esp32s31/bootloader_esp32s31.c
+2 -2
View File
@@ -26,7 +26,7 @@ esp_err_t bootloader_init(void)
esp_err_t ret = ESP_OK;
// bootloader_hardware_init(); // TODO: IDF-14696
// bootloader_super_wdt_auto_feed(); // TODO: IDF-14656
// bootloader_super_wdt_auto_feed(); // TODO: IDF-14678
// In RAM_APP, memory will be initialized in `call_start_cpu0`
#if !CONFIG_APP_BUILD_TYPE_RAM
@@ -81,7 +81,7 @@ esp_err_t bootloader_init(void)
#endif // !CONFIG_APP_BUILD_TYPE_RAM
// check whether a WDT reset happened
// bootloader_check_wdt_reset(); // TODO: IDF-14656
// bootloader_check_wdt_reset(); // TODO: IDF-14678
// config WDT
bootloader_config_wdt();
// enable RNG early entropy source
components/bootloader_support/src/esp32s31/bootloader_soc.c
+1 -1
View File
@@ -8,7 +8,7 @@
void bootloader_ana_super_wdt_reset_config(bool enable)
{
//TODO: IDF-14656
//TODO: IDF-14678
}
void bootloader_ana_clock_glitch_reset_config(bool enable)
components/esp_hal_wdt/esp32s31/include/hal/mwdt_ll.h
-2
View File
@@ -16,8 +16,6 @@
#include "hal/timg_ll.h"
#include "soc/hp_sys_clkrst_struct.h"
// TODO: ["ESP32S31"] IDF-14656
/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
components/esp_hal_wdt/esp32s31/mwdt_periph.c
+5 -2
View File
@@ -1,13 +1,14 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/mwdt_periph.h"
#include "hal/mwdt_ll.h"
#include "soc/soc_caps.h"
// TODO: ["ESP32S31"] IDF-14656
#if SOC_PAU_SUPPORTED && SOC_MWDT_SUPPORT_SLEEP_RETENTION
#define N_REGS_TGWDT 6 // TIMG_WDTCONFIG0_REG ... TIMG_WDTCONFIG5_REG & TIMG_INT_ENA_TIMERS_REG
@@ -33,3 +34,5 @@ const tg_reg_ctx_link_t tg_wdt_regs_retention[2] = {
[0] = {tg0_wdt_regs_retention, ARRAY_SIZE(tg0_wdt_regs_retention)},
[1] = {tg1_wdt_regs_retention, ARRAY_SIZE(tg1_wdt_regs_retention)},
};
#endif // SOC_PAU_SUPPORTED
components/esp_hal_wdt/test_apps/wdt_rom_impl/README.md
+2 -2
View File
@@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-H21 | ESP32-H4 | ESP32-P4 | ESP32-S2 | ESP32-S3 | ESP32-S31 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | --------- | -------- | -------- | -------- | -------- | --------- |
# esp_hal_wdt ROM implementation test app
components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+4
View File
@@ -63,6 +63,10 @@ config SOC_PSRAM_DMA_CAPABLE
bool
default y
config SOC_WDT_SUPPORTED
bool
default y
config SOC_SPI_FLASH_SUPPORTED
bool
default y
components/soc/esp32s31/include/soc/soc_caps.h
+1 -2
View File
@@ -86,7 +86,7 @@
// #define SOC_CLK_TREE_SUPPORTED 1 // TODO: [ESP32S31] IDF-14733
// #define SOC_ASSIST_DEBUG_SUPPORTED 1 // TODO: [ESP32S31] IDF-14675
// #define SOC_DEBUG_PROBE_SUPPORTED 1 // TODO: [ESP32S31] IDF-14798
// #define SOC_WDT_SUPPORTED 1 // TODO: [ESP32S31] IDF-14656
#define SOC_WDT_SUPPORTED 1
#define SOC_SPI_FLASH_SUPPORTED 1 // TODO: [ESP32S31] IDF-14777
// #define SOC_TOUCH_SENSOR_SUPPORTED 1 // TODO: [ESP32S31] IDF-14796
// #define SOC_RNG_SUPPORTED 1 // TODO: [ESP32S31] IDF-14632
@@ -231,7 +231,6 @@
#define SOC_TIMER_SUPPORT_SLEEP_RETENTION (1)
/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
// TODO: [ESP32S31] IDF-14656
#define SOC_MWDT_SUPPORT_XTAL (1)
#define SOC_MWDT_SUPPORT_SLEEP_RETENTION (1)