feat(driver_spi): split spi hal component

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32.c

@@ -17,7 +17,7 @@
 #include "soc/spi_reg.h"
 #include "soc/dport_reg.h"
 #include "soc/soc_caps.h"
-#include "soc/soc_pins.h"
+#include "soc/spi_pins.h"
 #include "soc/chip_revision.h"
 #include "hal/efuse_hal.h"
 #include "hal/gpio_hal.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c2.c

@@ -19,6 +19,7 @@
 #include "bootloader_common.h"
 #include "bootloader_flash_priv.h"
 #include "bootloader_init.h"
+#include "soc/spi_pins.h"
 #include "hal/mmu_hal.h"
 #include "hal/mmu_ll.h"
 #include "hal/cache_hal.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c3.c

@@ -14,6 +14,7 @@
 #include "esp32c3/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c5.c

@@ -17,6 +17,7 @@
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c

@@ -13,6 +13,7 @@
 #include "esp32c6/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c61.c

@@ -13,6 +13,7 @@
 #include "esp32c61/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c

@@ -13,6 +13,7 @@
 #include "esp32h2/rom/spi_flash.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h21.c

@@ -20,6 +20,7 @@
 #include "hal/mspi_ll.h"
 #include "hal/clk_tree_ll.h"
 #include "soc/pcr_reg.h"
+#include "soc/spi_pins.h"
 
 ESP_LOG_ATTR_TAG(TAG, "boot.esp32h21");
 

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h4.c

@@ -15,6 +15,7 @@
 #include "rom/efuse.h"
 #include "soc/efuse_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32p4.c

@@ -12,6 +12,7 @@
 #include "esp_rom_gpio.h"
 #include "soc/spi_pins.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_common.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s2.c

@@ -16,6 +16,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s3.c

@@ -16,6 +16,7 @@
 #include "soc/io_mux_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
+#include "soc/spi_pins.h"
 #include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"

components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32s31.c

@@ -10,6 +10,7 @@
 #include "esp_err.h"
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
+#include "soc/spi_pins.h"
 #include "soc/gpio_periph.h"
 #include "soc/spi_mem_reg.h"
 #include "flash_qio_mode.h"

components/bootloader_support/src/esp32/bootloader_esp32.c

@@ -24,7 +24,6 @@
 #include "soc/gpio_sig_map.h"
 #include "soc/io_mux_reg.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "hal/gpio_hal.h"
 #include "hal/mmu_hal.h"
 #include "xtensa/config/core.h"

components/bootloader_support/src/esp32c2/bootloader_esp32c2.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/system_reg.h"
 #include "esp32c2/rom/ets_sys.h"
 #include "esp32c2/rom/rtc.h"

components/bootloader_support/src/esp32c3/bootloader_esp32c3.c

@@ -19,9 +19,7 @@
 #include "esp_cpu.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/system_reg.h"
 #include "soc/chip_revision.h"
 #include "esp32c3/rom/ets_sys.h"

components/bootloader_support/src/esp32c5/bootloader_esp32c5.c

@@ -19,9 +19,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c5/rom/ets_sys.h"
 #include "esp32c5/rom/spi_flash.h"

components/bootloader_support/src/esp32c6/bootloader_esp32c6.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c6/rom/ets_sys.h"
 #include "esp32c6/rom/spi_flash.h"

components/bootloader_support/src/esp32c61/bootloader_esp32c61.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32c61/rom/ets_sys.h"
 #include "esp32c61/rom/spi_flash.h"

components/bootloader_support/src/esp32h2/bootloader_esp32h2.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "esp32h2/rom/ets_sys.h"
 #include "bootloader_common.h"

components/bootloader_support/src/esp32h21/bootloader_esp32h21.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "soc/pcr_reg.h"
 #include "rom/ets_sys.h"
 #include "bootloader_common.h"

components/bootloader_support/src/esp32p4/bootloader_esp32p4.c

@@ -18,9 +18,7 @@
 #include "soc/assist_debug_reg.h"
 #include "esp_cpu.h"
 #include "soc/rtc.h"
-#include "soc/spi_periph.h"
 #include "soc/cache_reg.h"
-#include "soc/io_mux_reg.h"
 #include "esp32p4/rom/ets_sys.h"
 #include "esp32p4/rom/spi_flash.h"
 #include "bootloader_common.h"

components/bootloader_support/src/esp32s2/bootloader_esp32s2.c

@@ -33,7 +33,6 @@
 #include "soc/extmem_reg.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "esp_efuse.h"
 #include "hal/mmu_hal.h"
 #include "hal/cache_hal.h"

components/bootloader_support/src/esp32s3/bootloader_esp32s3.c

@@ -17,7 +17,6 @@
 #include "soc/dport_reg.h"
 #include "soc/rtc.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/spi_periph.h"
 #include "soc/extmem_reg.h"
 
 #include "esp_rom_gpio.h"

components/driver/test_apps/components/test_driver_utils/include/test_spi_utils.h

@@ -20,7 +20,7 @@
 #include "param_test.h"
 #include "soc/io_mux_reg.h"
 #include "sdkconfig.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_pins.h"
 #include "driver/spi_master.h"
 #include "test_dualboard_utils.h"
 

components/driver/test_apps/components/test_driver_utils/test_spi_utils.c

@@ -3,14 +3,15 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+#include "esp_log.h"
 #include "test_spi_utils.h"
 #include "driver/spi_slave.h"
-#include "esp_log.h"
+#include "soc/gpio_sig_map.h"
 #include "driver/gpio.h"
 #include "esp_private/gpio.h"
-#include "esp_rom_gpio.h"
-#include "hal/gpio_ll.h"
+#include "soc/spi_periph.h"
 #include "hal/spi_ll.h"
+#include "hal/gpio_ll.h"
 
 const char MASTER_TAG[] = "test_master";
 const char SLAVE_TAG[] = "test_slave";

components/driver/touch_sensor/esp32s2/touch_sensor.c

@@ -9,7 +9,6 @@
 #include <ctype.h>
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "soc/rtc_cntl_reg.h"
 #include "freertos/FreeRTOS.h"

components/driver/touch_sensor/esp32s3/touch_sensor.c

@@ -9,7 +9,6 @@
 #include <ctype.h>
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "soc/rtc_cntl_reg.h"
 #include "freertos/FreeRTOS.h"

components/driver/touch_sensor/touch_sensor_common.c

@@ -10,7 +10,6 @@
 #include "esp_types.h"
 #include "esp_log.h"
 #include "sys/lock.h"
-#include "soc/soc_pins.h"
 #include "soc/soc_caps.h"
 #include "freertos/FreeRTOS.h"
 #include "freertos/semphr.h"

components/esp_driver_gpio/test_apps/gpio/CMakeLists.txt

@@ -9,24 +9,34 @@ project(gpio_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_gpio/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/gpio_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(GPIO_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_gpio
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpio
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${GPIO_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file  ${CMAKE_BINARY_DIR}/gpio_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()
 
 include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
 message(STATUS "Checking gpio registers are not read-write by half-word")
-check_register_rw_half_word(SOC_MODULES "gpio" "io_mux" "rtc_cntl" "rtc_io" "pcr" "hp_sys_clkrst" "hp_system"
-                                        "lp_aon" "lp_iomux" "pmu"
-                            HAL_MODULES "gpio")
+check_register_rw_half_word(
+    SOC_MODULES "gpio" "io_mux" "rtc_cntl" "rtc_io" "pcr" "hp_sys_clkrst" "hp_system" "lp_aon" "lp_iomux" "pmu"
+    HAL_MODULES "gpio"
+)
 
 message(STATUS "Checking rtcio registers are not read-write by half-word")
-check_register_rw_half_word(SOC_MODULES "rtc_io" "sens" "pcr" "lp_aon" "lp_io" "lp_gpio" "lp_iomux" "lpperi" "pmu"
-                            HAL_MODULES "rtc_io")
+check_register_rw_half_word(
+    SOC_MODULES "rtc_io" "sens" "pcr" "lp_aon" "lp_io" "lp_gpio" "lp_iomux" "lpperi" "pmu"
+    HAL_MODULES "rtc_io"
+)

components/esp_driver_gpio/test_apps/gpio_extensions/CMakeLists.txt

@@ -9,14 +9,21 @@ project(gpio_extension_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_gpio/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/gpio_extension_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(GPIO_EXTENSIONS_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_gpio
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpio
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${GPIO_EXTENSIONS_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file  ${CMAKE_BINARY_DIR}/gpio_extension_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()

components/esp_driver_sdm/test_apps/sigma_delta/CMakeLists.txt

@@ -9,9 +9,15 @@ project(sigma_delta_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
+    set(SDM_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_sdm
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpio
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${SDM_RTL_DIRS})
     add_custom_target(check_test_app_sections ALL
                       COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_sdm/,${CMAKE_BINARY_DIR}/esp-idf/hal/
+                      --rtl-dirs ${RTL_DIRS_STRING}
                       --elf-file ${CMAKE_BINARY_DIR}/sigma_delta_test.elf
                       find-refs
                       --from-sections=.iram0.text

components/esp_driver_sdmmc/src/sd_host_sdmmc.c

@@ -15,6 +15,7 @@
 #include "esp_timer.h"
 #include "esp_memory_utils.h"
 #include "soc/chip_revision.h"
+#include "soc/sdmmc_pins.h"
 #include "soc/sdmmc_periph.h"
 #include "soc/soc_caps.h"
 #include "hal/efuse_hal.h"

components/esp_driver_spi/CMakeLists.txt

@@ -26,7 +26,7 @@ endif()
 idf_component_register(
     SRCS ${srcs}
     INCLUDE_DIRS ${public_include}
-    REQUIRES esp_pm
+    REQUIRES esp_pm esp_hal_gpspi
     PRIV_REQUIRES esp_timer esp_mm esp_driver_gpio spi_flash esp_psram    #For CONFIG_SPIRAM_SPEED
     LDFRAGMENTS "linker.lf"
 )

components/esp_driver_spi/linker.lf

@@ -1,5 +1,5 @@
 [mapping:gpspi_hal]
-archive: libhal.a
+archive: libesp_hal_gpspi.a
 entries:
     if SPI_MASTER_ISR_IN_IRAM = y:
         spi_hal_iram (noflash)

components/esp_driver_spi/src/gpspi/spi_master.c

@@ -1473,6 +1473,7 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_end(spi_device_handle_t handle,
         }
     }
     spi_trans_dma_error_check(host);
+    uint32_t trans_flags = host->cur_trans_buf.trans->flags;  // save the flags before bus_lock release
 
     ESP_LOGV(SPI_TAG, "polling trans done");
     //deal with the in-flight transaction
@@ -1489,7 +1490,7 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_end(spi_device_handle_t handle,
         spi_bus_lock_acquire_end(handle->dev_lock);
     }
 
-    return (host->cur_trans_buf.trans->flags & (SPI_TRANS_DMA_RX_FAIL | SPI_TRANS_DMA_TX_FAIL)) ? ESP_ERR_INVALID_STATE : ESP_OK;
+    return (trans_flags & (SPI_TRANS_DMA_RX_FAIL | SPI_TRANS_DMA_TX_FAIL)) ? ESP_ERR_INVALID_STATE : ESP_OK;
 }
 
 esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_transmit(spi_device_handle_t handle, spi_transaction_t* trans_desc)

components/esp_driver_spi/test_apps/master/CMakeLists.txt

@@ -9,19 +9,28 @@ project(spi_master_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/spi_master_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(SPI_MASTER_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpspi
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${SPI_MASTER_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file ${CMAKE_BINARY_DIR}/spi_master_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()
 
 message(STATUS "Checking spi registers are not read-write by half-word")
 include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake)
-check_register_rw_half_word(SOC_MODULES "spi" "syscon" "pcr" "system" "hp_sys_clkrst"
-                            HAL_MODULES "spi")
+check_register_rw_half_word(
+    SOC_MODULES "spi" "syscon" "pcr" "system" "hp_sys_clkrst"
+    HAL_MODULES "spi"
+)

components/esp_driver_spi/test_apps/master/main/test_spi_master_sct.c

@@ -20,7 +20,6 @@
 #include "esp_private/esp_pmu.h"
 #include "driver/spi_slave_hd.h"
 #include "driver/spi_slave.h"
-#include "soc/spi_pins.h"
 #include "test_spi_utils.h"
 
 __attribute__((unused)) static const char *TAG = "SCT";

components/esp_driver_spi/test_apps/slave/CMakeLists.txt

@@ -9,14 +9,21 @@ project(spi_slave_test)
 
 idf_build_get_property(elf EXECUTABLE)
 if(CONFIG_COMPILER_DUMP_RTL_FILES)
-    add_custom_target(check_test_app_sections ALL
-                      COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
-                      --rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi/,${CMAKE_BINARY_DIR}/esp-idf/hal/
-                      --elf-file ${CMAKE_BINARY_DIR}/spi_slave_test.elf
-                      find-refs
-                      --from-sections=.iram0.text
-                      --to-sections=.flash.text,.flash.rodata
-                      --exit-code
-                      DEPENDS ${elf}
-                      )
+    set(SPI_SLAVE_RTL_DIRS
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_spi
+        ${CMAKE_BINARY_DIR}/esp-idf/esp_hal_gpspi
+        ${CMAKE_BINARY_DIR}/esp-idf/hal
+    )
+    string(JOIN "," RTL_DIRS_STRING ${SPI_SLAVE_RTL_DIRS})
+    add_custom_target(
+        check_test_app_sections ALL
+        COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
+        --rtl-dirs ${RTL_DIRS_STRING}
+        --elf-file ${CMAKE_BINARY_DIR}/spi_slave_test.elf
+        find-refs
+        --from-sections=.iram0.text
+        --to-sections=.flash.text,.flash.rodata
+        --exit-code
+        DEPENDS ${elf}
+    )
 endif()

components/esp_driver_spi/test_apps/slave/main/test_spi_slave_queue.c

@@ -17,7 +17,6 @@
 #include "driver/spi_slave.h"
 #include "esp_private/spi_slave_internal.h"
 #include "soc/spi_pins.h"
-#include "soc/spi_periph.h"
 
 #define TEST_BUF_SIZE    32
 #define TEST_TIMES       4

components/esp_hal_ana_conv/include/hal/adc_hal.h

@@ -15,11 +15,6 @@
 #include "hal/adc_ll.h"
 #endif
 
-#if SOC_IS(ESP32S2)
-//ADC utilises SPI3 DMA on ESP32S2
-#include "hal/spi_ll.h"
-#endif
-
 #if SOC_IS(ESP32)
 //ADC utilises I2S0 DMA on ESP32
 #include "hal/i2s_ll.h"

components/esp_hal_gpio/CMakeLists.txt

@@ -1,7 +1,11 @@
 idf_build_get_property(target IDF_TARGET)
 
 set(srcs)
-set(includes "include" "${target}/include")
+set(includes "include")
+
+if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
+    list(APPEND includes "${target}/include")
+endif()
 
 if(CONFIG_SOC_GPIO_PORT GREATER 0)
     list(APPEND srcs "gpio_hal.c")

components/esp_hal_gpspi/CMakeLists.txt

@@ -0,0 +1,29 @@
+idf_build_get_property(target IDF_TARGET)
+
+set(srcs)
+set(includes "include")
+
+if(EXISTS "${CMAKE_CURRENT_LIST_DIR}/${target}/include")
+    list(APPEND includes "${target}/include")
+endif()
+
+if(CONFIG_SOC_GPSPI_SUPPORTED)
+    list(APPEND srcs
+        "${target}/spi_periph.c"
+        "spi_hal.c"
+        "spi_hal_iram.c"
+        "spi_slave_hal.c"
+        "spi_slave_hal_iram.c"
+    )
+
+    if(CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2)
+        list(APPEND srcs "spi_slave_hd_hal.c")
+    endif()
+endif()
+
+idf_component_register(
+    SRCS ${srcs}
+    INCLUDE_DIRS ${includes}
+    REQUIRES soc hal
+    PRIV_REQUIRES esp_hal_gpio
+)

components/esp_hal_gpspi/README.md

@@ -0,0 +1,69 @@
+# ESP Hardware Abstraction Layer for SPI Peripheral
+
+> [!NOTE]
+> This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
+
+## Overview
+
+The `esp_hal_spi` component provides a **Hardware Abstraction Layer** for the General Purpose SPI (GPSPI) peripherals across all ESP-IDF supported targets. It serves as a foundation for the higher-level SPI drivers, offering a consistent interface to interact with SPI hardware while hiding the complexities of chip-specific implementations.
+
+## Architecture
+
+The HAL architecture consists of two primary layers:
+
+1. **HAL Layer (Upper)**: Defines the operational sequences and data structures required to interact with SPI peripherals, including:
+   - Initialization and de-initialization
+   - Clock configuration and timing calculations
+   - Device and transaction setup
+   - Master, slave, and slave HD (Half Duplex) mode operations
+
+2. **Low-Level Layer (Bottom)**: Acts as a translation layer between the HAL and the register definitions in the `soc` component, handling:
+   - Register access abstractions
+   - Chip-specific register configurations
+   - Hardware feature compatibility
+
+## Features
+
+- Unified SPI interface across all ESP chip families
+- Support for multiple operation modes:
+  - **Master mode**: Full-duplex and half-duplex communication
+  - **Slave mode**: Standard slave operation
+  - **Slave HD mode**: Half Duplex slave mode with segment-based transactions (on supported chips)
+- Flexible SPI line configurations (1/2/4-line modes)
+- Configurable clock sources and frequency settings
+- Support for various transaction formats (command, address, dummy, data phases)
+
+## Usage
+
+This component is primarily used by ESP-IDF peripheral drivers such as `esp_driver_spi`. It provides the low-level hardware abstraction needed for SPI communication with external devices.
+
+For advanced developers implementing custom SPI solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
+
+### Typical Usage Flow
+
+**Master Mode (without DMA):**
+1. Initialize the SPI bus
+2. Setup clock speed configuration
+3. Call `setup_device` to update parameters for a specific device
+4. Call `setup_trans` to update parameters for a specific transaction
+5. Prepare data to send into hardware registers
+6. Trigger the SPI transaction to start
+7. Wait until the transaction is complete
+8. Fetch the received data
+
+**Slave Mode (without DMA):**
+1. Initialize the SPI bus with `spi_slave_hal_init`
+2. Configure device parameters (mode, bit order, etc.) in the HAL context
+3. Call `spi_slave_hal_setup_device` to update parameters for the device
+4. Prepare data to send and receiving buffer
+5. Call `spi_slave_hal_set_trans_bitlen` to set transaction bit length
+6. Call `spi_slave_hal_user_start` to trigger the SPI transaction to start
+7. Wait until the transaction is done with `spi_slave_hal_usr_is_done`
+8. Call `spi_slave_hal_store_result` to store the received data
+9. Call `spi_slave_hal_get_rcv_bitlen` to get the received data length
+
+## Dependencies
+
+- `soc`: Provides chip-specific register definitions
+- `hal`: Core hardware abstraction utilities and macros
+- `esp_hal_gpio`: Required for ESP32 to access GPIO matrix delay information

components/esp_hal_gpspi/esp32/include/hal/spi_ll.h

@@ -18,7 +18,7 @@
 #include <stdlib.h> //for abs()
 #include "esp_types.h"
 #include "esp32/rom/lldesc.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/dport_reg.h"
 #include "hal/misc.h"

components/esp_hal_gpspi/esp32/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include "soc/spi_periph.h"

components/esp_hal_gpspi/esp32c2/include/hal/spi_ll.h

@@ -18,8 +18,8 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1100,7 +1100,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9,               dma_int_set.cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda,               dma_int_set.cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1287,8 +1286,6 @@ static inline int spi_ll_get_slave_hd_dummy_bits(spi_line_mode_t line_mode)
     return 8;
 }
 
-
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1611,7 +1608,6 @@ static inline void spi_ll_set_magic_number(spi_dev_t *hw, uint8_t magic_value)
     hw->slave.dma_seg_magic_value = magic_value;
 }
 
-
 #undef SPI_LL_RST_MASK
 #undef SPI_LL_UNUSED_INT_MASK
 

components/esp_hal_gpspi/esp32c2/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32c2/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32c3/include/hal/spi_ll.h

@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
@@ -64,7 +64,6 @@ typedef enum {
     SPI_LL_INTR_SEG_DONE =      BIT(14),
 } spi_ll_intr_t;
 
-
 // Flags for conditions under which the transaction length should be recorded
 typedef enum {
     SPI_LL_TRANS_LEN_COND_WRBUF =   BIT(0), ///< WRBUF length will be recorded
@@ -73,7 +72,6 @@ typedef enum {
     SPI_LL_TRANS_LEN_COND_RDDMA =   BIT(3), ///< RDDMA length will be recorded
 } spi_ll_trans_len_cond_t;
 
-
 // SPI base command in esp32c3
 typedef enum {
     /* Slave HD Only */
@@ -1102,7 +1100,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9=1) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda=1)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32c3/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32c3/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32c5/include/hal/spi_ll.h

@@ -15,7 +15,7 @@
 #include <stdlib.h> //for abs()
 #include <string.h>
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
@@ -1113,7 +1113,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,               dma_int_raw.slv_cmd9_int_raw,               dma_int_clr.slv_cmd9_int_clr,               dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,               dma_int_raw.slv_cmda_int_raw,               dma_int_clr.slv_cmda_int_clr,               dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32c5/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32c5/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32c6/include/hal/spi_ll.h

@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1085,7 +1085,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9,           dma_int_raw.slv_cmd9,           dma_int_clr.slv_cmd9,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda,           dma_int_raw.slv_cmda,           dma_int_clr.slv_cmda,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1186,7 +1185,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.slv_last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/

components/esp_hal_gpspi/esp32c6/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32c6/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32c61/include/hal/spi_ll.h

@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1113,7 +1113,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9,               dma_int_raw.slv_cmd9,               dma_int_clr.slv_cmd9,               dma_int_set.slv_cmd9) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda,               dma_int_raw.slv_cmda,               dma_int_clr.slv_cmda,               dma_int_set.slv_cmda)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32c61/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32c61/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32h2/include/hal/spi_ll.h

@@ -18,7 +18,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/chip_revision.h"
 #include "soc/pcr_struct.h"
@@ -1087,7 +1087,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1188,7 +1187,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.slv_last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1516,7 +1514,6 @@ static inline void spi_ll_set_magic_number(spi_dev_t *hw, uint8_t magic_value)
     hw->slave.dma_seg_magic_value = magic_value;
 }
 
-
 #undef SPI_LL_RST_MASK
 #undef SPI_LL_UNUSED_INT_MASK
 

components/esp_hal_gpspi/esp32h2/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32h2/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32h21/include/hal/spi_ll.h

@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/chip_revision.h"
 #include "soc/pcr_struct.h"
@@ -1073,7 +1073,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,           dma_int_raw.slv_cmd9_int_raw,           dma_int_clr.slv_cmd9_int_clr,              dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,           dma_int_raw.slv_cmda_int_raw,           dma_int_clr.slv_cmda_int_clr,              dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32h21/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #ifndef _SOC_SPI_PINS_H_

components/esp_hal_gpspi/esp32h21/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32h4/include/hal/spi_ll.h

@@ -16,7 +16,7 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1135,7 +1135,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int_ena,               dma_int_raw.slv_cmd9_int_raw,               dma_int_clr.slv_cmd9_int_clr,               dma_int_set.slv_cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int_ena,               dma_int_raw.slv_cmda_int_raw,               dma_int_clr.slv_cmda_int_clr,               dma_int_set.slv_cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32h4/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32h4/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32p4/include/hal/spi_ll.h

@@ -18,7 +18,7 @@
 #include <string.h>
 #include "hal/config.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1186,7 +1186,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.slv_cmd9_int,               dma_int_raw.slv_cmd9_int,               dma_int_clr.slv_cmd9_int,               dma_int_set.slv_cmd9_int) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.slv_cmda_int,               dma_int_raw.slv_cmda_int,               dma_int_clr.slv_cmda_int,               dma_int_set.slv_cmda_int)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;

components/esp_hal_gpspi/esp32p4/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32p4/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32s2/include/hal/spi_ll.h

@@ -20,7 +20,6 @@
 #include "esp_attr.h"
 #include "esp_bit_defs.h"
 #include "esp_compiler.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
 #include "soc/spi_reg.h"
 #include "soc/dport_reg.h"
@@ -1121,7 +1120,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9=1) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda=1)
 
-
 __attribute__((always_inline))
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {

components/esp_hal_gpspi/esp32s2/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32s2/spi_periph.c

@@ -1,10 +1,11 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include "soc/spi_periph.h"
+#include "soc/spi_mem_struct.h"
 
 /*
  Bunch of constants for every SPI peripheral: GPIO signals, irqs, hw addr of registers etc
@@ -34,7 +35,6 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
         .irq_dma = -1,
         .hw = (spi_dev_t *) &SPIMEM1,
         .func = MSPI_FUNC_NUM,
-
     }, {
         .spiclk_out = FSPICLK_OUT_MUX_IDX,
         .spiclk_in = FSPICLK_IN_IDX,

components/esp_hal_gpspi/esp32s3/include/hal/spi_ll.h

@@ -18,8 +18,8 @@
 #include <string.h>
 #include "esp_attr.h"
 #include "esp_types.h"
-#include "soc/spi_periph.h"
 #include "soc/spi_struct.h"
+#include "soc/spi_reg.h"
 #include "soc/system_struct.h"
 #include "hal/assert.h"
 #include "hal/misc.h"
@@ -1126,7 +1126,6 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
     item(SPI_LL_INTR_CMD9,          dma_int_ena.cmd9,               dma_int_raw.cmd9,               dma_int_clr.cmd9,               dma_int_set.cmd9_int_set) \
     item(SPI_LL_INTR_CMDA,          dma_int_ena.cmda,               dma_int_raw.cmda,               dma_int_clr.cmda,               dma_int_set.cmda_int_set)
 
-
 static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
 {
 #define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -1227,7 +1226,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
     return hw->slave1.last_addr;
 }
 
-
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
  *----------------------------------------------------------------------------*/
@@ -1268,7 +1266,6 @@ static inline uint32_t spi_ll_slave_hd_get_last_addr(spi_dev_t *hw)
 
 #define SPI_LL_SCT_MAGIC_NUMBER                 (0x2)
 
-
 /**
  * Set conf phase bits len to HW for segment config trans mode.
  *

components/esp_hal_gpspi/esp32s3/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/esp32s3/spi_periph.c

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #include <stddef.h>

components/esp_hal_gpspi/esp32s31/include/soc/spi_pins.h

@@ -1,7 +1,7 @@
 /*
  * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once

components/esp_hal_gpspi/include/hal/spi_hal.h

@@ -27,6 +27,7 @@
 #pragma once
 #include "esp_err.h"
 #include "soc/soc_caps.h"
+#include "soc/spi_periph.h"
 #include "hal/spi_types.h"
 #if SOC_GPSPI_SUPPORTED
 #include "hal/spi_ll.h"

components/esp_hal_gpspi/include/hal/spi_slave_hd_hal.h

@@ -256,7 +256,6 @@ int spi_slave_hd_hal_get_rxlen(spi_slave_hd_hal_context_t *hal);
  */
 int spi_slave_hd_hal_get_last_addr(spi_slave_hd_hal_context_t *hal);
 
-
 ////////////////////////////////////////////////////////////////////////////////
 // Append Mode
 ////////////////////////////////////////////////////////////////////////////////

components/esp_hal_gpspi/include/soc/spi_periph.h

@@ -1,42 +1,28 @@
 /*
  * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
- * SPDX-License-Identifier: Apache-2.0 OR MIT
+ * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once
 
 #include <stdint.h>
-#include "sdkconfig.h"
 #include "soc/soc.h"
 #include "soc/soc_caps.h"
+#include "soc/interrupts.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/spi_reg.h"
+#include "soc/spi_struct.h"
 #include "soc/spi_pins.h"
 #if SOC_PAU_SUPPORTED
 #include "soc/regdma.h"
 #include "soc/retention_periph_defs.h"
 #endif
 
-//include soc related (generated) definitions
-#include "soc/interrupts.h"
-#include "soc/spi_reg.h"
-#include "soc/spi_struct.h"
-#include "soc/gpio_sig_map.h"
-#if SOC_MEMSPI_IS_INDEPENDENT
-#include "soc/spi_mem_struct.h"
-#include "soc/spi_mem_reg.h"
-#endif
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
-#define SPI_FREAD_DIO 0
-#define SPI_FREAD_QIO 0
-#define SPI_FWRITE_DIO 0
-#define SPI_FWRITE_QIO 0
-#endif
-
 /*
  Stores a bunch of per-spi-peripheral data.
 */

components/esp_hal_gpspi/spi_hal_iram.c

@@ -54,7 +54,7 @@ esp_err_t spi_hal_cal_clock_conf(const spi_hal_timing_param_t *timing_param, spi
 
     if (!(timing_param->half_duplex || dummy == 0 || timing_param->no_compensate)) {
         // This only a short log used as a "key" of the idf hint system, see `hints.yml`
-        HAL_EARLY_LOGE(SPI_HAL_TAG,"The clock_speed_hz should less than %d", freq_limit);
+        HAL_EARLY_LOGE(SPI_HAL_TAG, "The clock_speed_hz should less than %d", freq_limit);
         return ESP_ERR_NOT_SUPPORTED;
     }
 #endif
@@ -235,11 +235,13 @@ bool spi_hal_usr_is_done(const spi_hal_context_t *hal)
 }
 
 #if SOC_SPI_SUPPORT_SLAVE_HD_VER2
-bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask) {
+bool spi_hal_get_intr_mask(spi_hal_context_t *hal, uint32_t mask)
+{
     return spi_ll_get_intr(hal->hw, mask);
 }
 
-void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask) {
+void spi_hal_clear_intr_mask(spi_hal_context_t *hal, uint32_t mask)
+{
     spi_ll_clear_intr(hal->hw, mask);
 }
 #endif
@@ -266,7 +268,8 @@ void spi_hal_fetch_result(const spi_hal_context_t *hal)
 /*------------------------------------------------------------------------------
  * Segmented-Configure-Transfer
 *----------------------------------------------------------------------------*/
-void spi_hal_sct_set_conf_bits_len(spi_hal_context_t *hal, uint32_t conf_len) {
+void spi_hal_sct_set_conf_bits_len(spi_hal_context_t *hal, uint32_t conf_len)
+{
     spi_ll_set_conf_phase_bits_len(hal->hw, conf_len);
 }
 

components/esp_hal_gpspi/spi_slave_hal.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #include "hal/spi_slave_hal.h"
 #include "hal/spi_ll.h"
 #include "soc/soc_caps.h"

components/esp_hal_gpspi/spi_slave_hal_iram.c

@@ -1,3 +1,8 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #include "hal/spi_slave_hal.h"
 #include "hal/spi_ll.h"
 #include "soc/soc_caps.h"

components/esp_hal_gpspi/spi_slave_hd_hal.c

@@ -10,14 +10,12 @@
 #include "esp_types.h"
 #include "esp_attr.h"
 #include "esp_err.h"
-#include "soc/spi_periph.h"
 #include "soc/lldesc.h"
 #include "soc/soc_caps.h"
 #include "soc/ext_mem_defs.h"   //for SOC_NON_CACHEABLE_OFFSET
 #include "hal/spi_slave_hd_hal.h"
 #include "hal/assert.h"
 
-
 void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_hal_config_t *hal_config)
 {
     spi_dev_t *hw = SPI_LL_GET_HW(hal_config->host_id);
@@ -26,8 +24,8 @@ void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_h
     hal->append_mode = hal_config->append_mode;
     hal->tx_cur_desc = hal->dmadesc_tx;
     hal->rx_cur_desc = hal->dmadesc_rx;
-    hal->tx_dma_head = hal->dmadesc_tx + hal->dma_desc_num -1;
-    hal->rx_dma_head = hal->dmadesc_rx + hal->dma_desc_num -1;
+    hal->tx_dma_head = hal->dmadesc_tx + hal->dma_desc_num - 1;
+    hal->rx_dma_head = hal->dmadesc_rx + hal->dma_desc_num - 1;
 
     spi_ll_slave_hd_init(hw);
     spi_ll_set_addr_bitlen(hw, hal_config->address_bits);
@@ -63,9 +61,9 @@ void spi_slave_hd_hal_init(spi_slave_hd_hal_context_t *hal, const spi_slave_hd_h
     }
 
     spi_ll_slave_hd_set_len_cond(hw,    SPI_LL_TRANS_LEN_COND_WRBUF |
-                                        SPI_LL_TRANS_LEN_COND_WRDMA |
-                                        SPI_LL_TRANS_LEN_COND_RDBUF |
-                                        SPI_LL_TRANS_LEN_COND_RDDMA);
+                                 SPI_LL_TRANS_LEN_COND_WRDMA |
+                                 SPI_LL_TRANS_LEN_COND_RDBUF |
+                                 SPI_LL_TRANS_LEN_COND_RDDMA);
 
     spi_ll_slave_set_seg_mode(hal->dev, true);
 }
@@ -86,12 +84,14 @@ static int s_desc_get_received_len_addr(spi_dma_desc_t* head, spi_dma_desc_t** o
     if (out_buff_head) {
         *out_buff_head = desc_cpu->buffer;
     }
-    while(head) {
+    while (head) {
         len += desc_cpu->dw0.length;
         bool eof = desc_cpu->dw0.suc_eof;
         desc_cpu = ADDR_DMA_2_CPU(desc_cpu->next);
         head = head->next;
-        if (eof) break;
+        if (eof) {
+            break;
+        }
     }
     if (out_next) {
         *out_next = head;
@@ -130,13 +130,27 @@ void spi_slave_hd_hal_txdma(spi_slave_hd_hal_context_t *hal)
 static spi_ll_intr_t get_event_intr(spi_slave_hd_hal_context_t *hal, spi_event_t ev)
 {
     spi_ll_intr_t intr = 0;
-    if (ev & SPI_EV_SEND)          intr |= SPI_LL_INTR_CMD8;
-    if (ev & SPI_EV_RECV)          intr |= SPI_LL_INTR_CMD7;
-    if (ev & SPI_EV_BUF_TX)        intr |= SPI_LL_INTR_RDBUF;
-    if (ev & SPI_EV_BUF_RX)        intr |= SPI_LL_INTR_WRBUF;
-    if (ev & SPI_EV_CMD9)          intr |= SPI_LL_INTR_CMD9;
-    if (ev & SPI_EV_CMDA)          intr |= SPI_LL_INTR_CMDA;
-    if (ev & SPI_EV_TRANS)         intr |= SPI_LL_INTR_TRANS_DONE;
+    if (ev & SPI_EV_SEND) {
+        intr |= SPI_LL_INTR_CMD8;
+    }
+    if (ev & SPI_EV_RECV) {
+        intr |= SPI_LL_INTR_CMD7;
+    }
+    if (ev & SPI_EV_BUF_TX) {
+        intr |= SPI_LL_INTR_RDBUF;
+    }
+    if (ev & SPI_EV_BUF_RX) {
+        intr |= SPI_LL_INTR_WRBUF;
+    }
+    if (ev & SPI_EV_CMD9) {
+        intr |= SPI_LL_INTR_CMD9;
+    }
+    if (ev & SPI_EV_CMDA) {
+        intr |= SPI_LL_INTR_CMDA;
+    }
+    if (ev & SPI_EV_TRANS) {
+        intr |= SPI_LL_INTR_TRANS_DONE;
+    }
     return intr;
 }
 

components/esp_hal_mspi/CMakeLists.txt

@@ -4,11 +4,6 @@ idf_build_get_property(esp_tee_build ESP_TEE_BUILD)
 set(srcs)
 set(includes "include" "${target}/include")
 
-set(priv_requires)
-if(${target} STREQUAL "esp32")
-    list(APPEND priv_requires esp_hal_gpio)
-endif()
-
 if(esp_tee_build)
     if(CONFIG_SECURE_TEE_EXT_FLASH_MEMPROT_SPI1)
         list(APPEND srcs "spi_flash_hal.c" "spi_flash_hal_iram.c")
@@ -29,7 +24,9 @@ elseif(NOT BOOTLOADER_BUILD)
 
 endif()
 
-idf_component_register(SRCS ${srcs}
-                    INCLUDE_DIRS ${includes}
-                    REQUIRES soc hal
-                    PRIV_REQUIRES "${priv_requires}")
+idf_component_register(
+    SRCS ${srcs}
+    INCLUDE_DIRS ${includes}
+    REQUIRES soc hal esp_hal_gpspi
+    PRIV_REQUIRES esp_hal_gpio
+)

components/esp_hal_mspi/esp32/include/hal/spi_flash_ll.h

@@ -15,9 +15,8 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
-#include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>

components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h

@@ -13,7 +13,8 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
+#include "soc/spi_struct.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 #include <sys/param.h> // For MIN/MAX

components/esp_hal_mspi/esp32c2/include/hal/spimem_flash_ll.h

@@ -19,7 +19,9 @@
 #include <stdbool.h>
 #include <string.h>
 #include "hal/misc.h"
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_struct.h"
+#include "soc/spi_mem_reg.h"
+#include "soc/interrupts.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"
 

components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h

@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"

components/esp_hal_mspi/esp32c3/include/hal/spimem_flash_ll.h

@@ -18,9 +18,9 @@
 #include <sys/param.h> // For MIN/MAX
 #include <stdbool.h>
 #include <string.h>
-
-#include "soc/spi_periph.h"
+#include "soc/spi_mem_reg.h"
 #include "soc/spi_mem_struct.h"
+#include "soc/interrupts.h"
 #include "hal/assert.h"
 #include "hal/spi_types.h"
 #include "hal/spi_flash_types.h"

components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h

@@ -13,7 +13,7 @@
 #pragma once
 
 #include <stdlib.h>
-#include "soc/spi_periph.h"
+#include "soc/spi_reg.h"
 #include "soc/spi_struct.h"
 #include "soc/pcr_struct.h"
 #include "hal/assert.h"