espressif/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-04-27 19:13:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'bugfix/idfgh-16634' into 'master'

Browse Source 
remove the configurable constraint for sleep memory usage optimization option

Closes IDFGH-16634 and IDF-13780

See merge request espressif/esp-idf!42882
This commit is contained in:
Li Shuai
2025-12-31 12:57:50 +08:00
parent df3b7e1e9d cbbbc413b1
commit 6e9885f7e6
9 changed files with 105 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/Kconfig
+22 -1
View File
@@ -1,5 +1,14 @@
menu "Hardware Settings"
config ESP_HW_SUPPORT_FUNC_IN_IRAM
bool
default n if SPI_FLASH_AUTO_SUSPEND
default y
select ESP_PERIPH_CTRL_FUNC_IN_IRAM
select ESP_REGI2C_CTRL_FUNC_IN_IRAM
select RTC_CLK_FUNC_IN_IRAM
select RTC_TIME_FUNC_IN_IRAM
menu "Chip revision"
# Insert chip-specific HW config
orsource "./port/$IDF_TARGET/Kconfig.hw_support"
@@ -264,12 +273,24 @@ menu "Hardware Settings"
menu "RTC Clock Config"
orsource "./port/$IDF_TARGET/Kconfig.rtc"
config RTC_CLK_FUNC_IN_IRAM
bool "Place RTC clock module functions into IRAM"
default y
help
Place RTC clock module (all rtc clock functions and const data) into IRAM.
config RTC_TIME_FUNC_IN_IRAM
bool "Place RTC time module functions into IRAM"
default y
help
Place RTC time module (all rtc clock functions) into IRAM.
endmenu
menu "Peripheral Control"
config ESP_PERIPH_CTRL_FUNC_IN_IRAM
bool "Place peripheral control functions into IRAM"
default n
default y
help
Place peripheral control functions (e.g. periph_module_reset) into IRAM,
so that these functions can be IRAM-safe and able to be called in the other IRAM interrupt context.
components/esp_hw_support/linker.lf
+6 -6
View File
@@ -13,18 +13,18 @@ entries:
cpu: esp_cpu_compare_and_set (noflash)
esp_memory_utils (noflash)
clk_utils (noflash)
if IDF_TARGET_ESP32H4 = y || IDF_TARGET_ESP32H21 = y:
# IDF-13780
rtc_clk (noflash)
if PM_SLP_IRAM_OPT = y:
rtc_clk (noflash)
rtc_time (noflash_text)
# TODO: PM-630
if IDF_TARGET_ESP32S31 != y:
esp_clk_tree: esp_clk_tree_enable_src (noflash)
esp_clk_tree: esp_clk_tree_enable_power (noflash)
esp_clk_tree: esp_clk_tree_is_power_on (noflash)
if RTC_CLK_FUNC_IN_IRAM = y:
rtc_clk (noflash)
if IDF_TARGET_ESP32 = y:
rtc_clk:rtc_clk_cpu_freq_to_pll_mhz (noflash)
rtc_clk:rtc_clk_cpu_freq_to_xtal (noflash)
if RTC_TIME_FUNC_IN_IRAM = y:
rtc_time (noflash_text)
if SOC_CONFIGURABLE_VDDSDIO_SUPPORTED = y:
rtc_init:rtc_vddsdio_get_config (noflash)
rtc_init:rtc_vddsdio_set_config (noflash)
components/esp_hw_support/sleep_modes.c
+10 -11
View File
@@ -176,6 +176,10 @@
#elif CONFIG_IDF_TARGET_ESP32S3
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (382)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (133)
# if !CONFIG_PM_SLP_IRAM_OPT
#undef DEFAULT_SLEEP_OUT_OVERHEAD_US
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (8628)
# endif
#elif CONFIG_IDF_TARGET_ESP32C3
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (105)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (37)
@@ -916,6 +920,9 @@ static esp_err_t FORCE_IRAM_ATTR esp_sleep_start_safe(uint32_t sleep_flags, uint
#if SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD
esp_sleep_mmu_retention(false);
#endif
#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
sleep_retention_do_system_retention(false);
#endif
#if CONFIG_IDF_TARGET_ESP32P4 && (CONFIG_ESP_REV_MIN_FULL == 300)
sleep_flash_p4_rev3_workaround();
sleep_retention_do_extra_retention(false);
@@ -1126,13 +1133,11 @@ static esp_err_t SLEEP_FN_ATTR esp_sleep_start(uint32_t sleep_flags, uint32_t cl
if (!deep_sleep) {
if (result == ESP_OK) {
#if !CONFIG_PM_SLP_IRAM_OPT && !CONFIG_IDF_TARGET_ESP32
s_config.ccount_ticks_record = esp_cpu_get_cycle_count();
#if !CONFIG_PM_SLP_IRAM_OPT && !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32P4)
#if CONFIG_SPIRAM
# if CONFIG_IDF_TARGET_ESP32P4
cache_ll_writeback_all(CACHE_LL_LEVEL_ALL, CACHE_TYPE_DATA, CACHE_LL_ID_ALL);
# else
// TODO: PM-651
Cache_WriteBack_All();
# endif
#endif
/* When the IRAM optimization for the sleep flow is disabled, all
* cache contents are forcibly invalidated before exiting the sleep
@@ -1140,12 +1145,6 @@ static esp_err_t SLEEP_FN_ATTR esp_sleep_start(uint32_t sleep_flags, uint32_t cl
* flow remains consistent, allowing the use of ccount to
* dynamically calculate the sleep adjustment time. */
cache_ll_invalidate_all(CACHE_LL_LEVEL_ALL, CACHE_TYPE_ALL, CACHE_LL_ID_ALL);
#endif
s_config.ccount_ticks_record = esp_cpu_get_cycle_count();
#if SOC_PM_RETENTION_SW_TRIGGER_REGDMA
if (sleep_flags & PMU_SLEEP_PD_TOP) {
sleep_retention_do_system_retention(false);
}
#endif
}
misc_modules_wake_prepare(sleep_flags);
components/esp_pm/Kconfig
+4 -2
View File
@@ -1,12 +1,14 @@
menu "Power Management"
config PM_SLEEP_FUNC_IN_IRAM
bool "Place Power Management module functions in IRAM" if IDF_TARGET_ESP32C2
default y
bool "Place Power Management module functions in IRAM"
default n
select PM_SLP_IRAM_OPT if SOC_LIGHT_SLEEP_SUPPORTED
select PM_RTOS_IDLE_OPT if FREERTOS_USE_TICKLESS_IDLE
select ESP_PERIPH_CTRL_FUNC_IN_IRAM
select ESP_REGI2C_CTRL_FUNC_IN_IRAM
select RTC_CLK_FUNC_IN_IRAM
select RTC_TIME_FUNC_IN_IRAM
config PM_ENABLE
components/esp_system/ld/esp32s3/sections.ld.in
+2 -1
View File
@@ -226,7 +226,8 @@ SECTIONS
*/
.dram0.dummy (NOLOAD):
{
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start, 0);
/* MAX() uses unsigned long arithmetic. Add offset to prevent underflow when _iram_end < _diram_i_start */
. = ORIGIN(dram0_0_seg) + MAX(_iram_end - _diram_i_start + (_diram_i_start - ORIGIN(iram0_0_seg)), (_diram_i_start - ORIGIN(iram0_0_seg))) - (_diram_i_start - ORIGIN(iram0_0_seg));
} > dram0_0_seg
.dram0.data :
components/esp_tee/test_apps/tee_test_fw/main/test_esp_tee_panic.c
+56 -23
View File
@@ -229,43 +229,76 @@ TEST_CASE("Test REE-TEE isolation: DROM-W1", "[exception]")
TEST_FAIL_MESSAGE("Exception should have been generated");
}
static void do_stack_smash(bool underflow, int depth, volatile uint8_t *sink)
static void do_stack_overflow(int depth, volatile uint8_t *sink)
{
/* Overflow path */
if (!underflow) {
if (depth == -1) {
return; // unreachable
}
uint8_t buffer[1024];
buffer[0] = (uint8_t)depth;
*sink = buffer[0];
do_stack_smash(false, depth + 1, sink);
return;
if (depth == -1) {
return; // unreachable
}
/* Underflow path */
asm volatile(
"li t0, 4096\n"
"add sp, sp, t0\n"
uint8_t buffer[1024];
buffer[0] = (uint8_t)depth;
*sink = buffer[0];
do_stack_overflow(depth + 1, sink);
}
static void do_stack_underflow(void *underflow)
{
__asm__ __volatile__(
"mv sp, %0\n" :: "r"(underflow)
);
volatile uint8_t temp = 1;
(void)temp;
/* The blocking delay ensures that the stack protection fault interrupt is
* captured and handled by the CPU before the current function returns.
*/
esp_rom_delay_us(10);
}
typedef struct {
bool underflow;
StackType_t *underflow_stack;
} StackProtectionTaskArgs;
static void tStackProtection(void *pvParameters)
{
StackProtectionTaskArgs *tArgs = (StackProtectionTaskArgs *)pvParameters;
if (!tArgs->underflow) { /* Overflow path */
volatile uint8_t sink = 0;
do_stack_overflow(1, &sink);
} else { /* Underflow path */
do_stack_underflow((void *)tArgs->underflow_stack);
}
}
static void do_stack_smash(bool underflow)
{
static struct {
StackType_t StackBuffer[2048];
StackType_t UnderflowStart[0];
StackType_t Underflow[1024];
StackType_t UnderflowEnd[0];
} tData;
static StaticTask_t TaskBuffer;
static StackProtectionTaskArgs taskArgs;
taskArgs.underflow = underflow;
taskArgs.underflow_stack = tData.UnderflowEnd;
TaskHandle_t handle = xTaskCreateStatic(tStackProtection, "tt", sizeof(tData.StackBuffer), &taskArgs, 10, tData.StackBuffer, &TaskBuffer);
assert(handle != NULL);
}
TEST_CASE("Test REE stack overflow", "[exception]")
{
volatile uint8_t sink = 0;
do_stack_smash(false, 1, &sink);
do_stack_smash(false);
TEST_FAIL_MESSAGE("Exception should have been generated");
}
TEST_CASE("Test REE stack underflow", "[exception]")
{
volatile uint8_t sink = 0;
do_stack_smash(true, 0, &sink);
do_stack_smash(true);
TEST_FAIL_MESSAGE("Exception should have been generated");
}
examples/system/esp_timer/main/esp_timer_example_main.c
-1
View File
@@ -94,7 +94,6 @@ void app_main(void)
int64_t t2 = esp_timer_get_time();
ESP_LOGI(TAG, "Woke up from light sleep, time since boot: %lld us", t2);
// TODO: PM-232
assert(((t2 - t1 - 500000) < 1000) && ((t2 - t1 - 500000) > -2000));
#endif
examples/system/esp_timer/sdkconfig.defaults
+3
View File
@@ -4,3 +4,6 @@ CONFIG_ESP_TIMER_PROFILING=y
# LIBC_NEWLIB_NANO_FORMAT is enabled by default on ESP32-C2
# This example needs 64-bit integer formatting, this is why this option is disabled
CONFIG_LIBC_NEWLIB_NANO_FORMAT=n
# Put sleep related source code in IRAM
CONFIG_PM_SLP_IRAM_OPT=y
tools/test_apps/configs/sdkconfig.flash_auto_suspend_iram_reduction
+2
View File
@@ -70,6 +70,8 @@ CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM=n
# System common
CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM=n
CONFIG_RTC_CLK_FUNC_IN_IRAM=n
CONFIG_RTC_TIME_FUNC_IN_IRAM=n
# Phy related options
CONFIG_ESP_PHY_IRAM_OPT=n