espressif/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-04-27 19:13:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

change(esp_hw_support): clean up modem clock inclusion

Browse Source
This commit is contained in:
hebinglin
2025-12-15 11:58:25 +08:00
parent 8bd502f975
commit 75fd8e7a80
8 changed files with 5 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/esp_hw_support/port/esp32c61/modem_clock_impl.c
+1 -1
View File
@@ -355,7 +355,7 @@ const DRAM_ATTR uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
[MODEM_CLOCK_DOMAIN_WIFI] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_BT] = ICG_NOGATING_ACTIVE,
[MODEM_CLOCK_DOMAIN_MODEM_FE] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE,
// [MODEM_CLOCK_DOMAIN_IEEE802154] = ICG_NOGATING_ACTIVE,
[MODEM_CLOCK_DOMAIN_LP_APB] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_I2C_MASTER] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
[MODEM_CLOCK_DOMAIN_COEX] = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
components/esp_hw_support/port/esp32p4/sar_periph_ctrl.c
-1
View File
@@ -19,7 +19,6 @@
#include "freertos/FreeRTOS.h"
#include "esp_private/sar_periph_ctrl.h"
#include "esp_private/regi2c_ctrl.h"
#include "esp_private/esp_modem_clock.h"
#include "esp_private/critical_section.h"
#include "esp_private/adc_share_hw_ctrl.h"
#include "hal/sar_ctrl_ll.h"
components/esp_system/port/soc/esp32p4/clk.c
-1
View File
@@ -22,7 +22,6 @@
#include "mspi_timing_tuning_configs.h"
#include "hal/clk_gate_ll.h"
#include "hal/wdt_hal.h"
#include "esp_private/esp_modem_clock.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/esp_clk.h"
#include "esp_private/esp_pmu.h"
components/esp_system/port/soc/esp32s31/clk.c
-1
View File
@@ -30,7 +30,6 @@
#include "soc/hp_alive_sys_reg.h"
#include "hal/uart_ll.h"
#include "hal/wdt_hal.h"
#include "esp_private/esp_modem_clock.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/esp_clk.h"
components/hal/esp32c61/modem_clock_hal.c
+1 -7
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,9 +33,6 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte
case MODEM_CLOCK_DOMAIN_MODEM_FE:
modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap);
break;
case MODEM_CLOCK_DOMAIN_IEEE802154:
modem_syscon_ll_set_ieee802154_icg_bitmap(hal->syscon_dev, bitmap);
break;
case MODEM_CLOCK_DOMAIN_LP_APB:
modem_lpcon_ll_set_lp_apb_icg_bitmap(hal->lpcon_dev, bitmap);
break;
@@ -74,9 +71,6 @@ uint32_t IRAM_ATTR modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_c
case MODEM_CLOCK_DOMAIN_MODEM_FE:
bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev);
break;
case MODEM_CLOCK_DOMAIN_IEEE802154:
bitmap = modem_syscon_ll_get_ieee802154_icg_bitmap(hal->syscon_dev);
break;
case MODEM_CLOCK_DOMAIN_LP_APB:
bitmap = modem_lpcon_ll_get_lp_apb_icg_bitmap(hal->lpcon_dev);
break;
components/hal/esp32h4/include/hal/modem_lpcon_ll.h
-12
View File
@@ -110,18 +110,6 @@ static inline void modem_lpcon_ll_reset_all(modem_lpcon_dev_t *hw)
hw->rst_conf.val = 0;
}
__attribute__((always_inline))
static inline uint32_t modem_lpcon_ll_get_wifipwr_icg_bitmap(modem_lpcon_dev_t *hw)
{
return hw->clk_conf_power_st.clk_wifipwr_st_map;
}
__attribute__((always_inline))
static inline void modem_lpcon_ll_set_wifipwr_icg_bitmap(modem_lpcon_dev_t *hw, uint32_t bitmap)
{
hw->clk_conf_power_st.clk_wifipwr_st_map = bitmap;
}
__attribute__((always_inline))
static inline uint32_t modem_lpcon_ll_get_coex_icg_bitmap(modem_lpcon_dev_t *hw)
{
components/hal/esp32h4/modem_clock_hal.c
+3 -3
View File
@@ -48,9 +48,6 @@ void IRAM_ATTR modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_conte
case MODEM_CLOCK_DOMAIN_COEX:
modem_lpcon_ll_set_coex_icg_bitmap(hal->lpcon_dev, bitmap);
break;
case MODEM_CLOCK_DOMAIN_WIFIPWR:
modem_lpcon_ll_set_wifipwr_icg_bitmap(hal->lpcon_dev, bitmap);
break;
default:
HAL_ASSERT(0);
}
@@ -83,6 +80,9 @@ uint32_t IRAM_ATTR modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_c
case MODEM_CLOCK_DOMAIN_I2C_MASTER:
bitmap = modem_lpcon_ll_get_i2c_master_icg_bitmap(hal->lpcon_dev);
break;
case MODEM_CLOCK_DOMAIN_COEX:
bitmap = modem_lpcon_ll_get_coex_icg_bitmap(hal->lpcon_dev);
break;
default:
HAL_ASSERT(0);
}
components/soc/esp32c61/include/soc/soc_caps.h
-1
View File
@@ -31,7 +31,6 @@
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_BT_SUPPORTED 1
// \#define SOC_IEEE802154_SUPPORTED 1
#define SOC_USB_SERIAL_JTAG_SUPPORTED 1
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1