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refactor(ledc): add compatibility for group and speed_mode

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This commit is contained in:
Song Ruo Jing
2026-03-19 11:47:08 +08:00
parent 503a5cfdf6
commit 885e32d4f0
26 changed files with 429 additions and 323 deletions
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components/esp_driver_ledc/src/ledc.c
+55 -55
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -148,14 +148,14 @@ static esp_err_t ledc_create_sleep_retention_link_cb(void *arg)
static void ledc_ls_timer_update(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
if (speed_mode == LEDC_LOW_SPEED_MODE) {
ledc_hal_ls_timer_update(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
ledc_hal_ls_timer_update(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel);
}
}
static IRAM_ATTR void ledc_ls_channel_update(ledc_mode_t speed_mode, ledc_channel_t channel)
{
if (speed_mode == LEDC_LOW_SPEED_MODE) {
ledc_hal_ls_channel_update(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
ledc_hal_ls_channel_update(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel);
}
}
@@ -179,9 +179,9 @@ static bool ledc_slow_clk_calibrate(void)
static esp_err_t ledc_enable_intr_type(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_intr_type_t type)
{
if (type == LEDC_INTR_FADE_END) {
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, true);
} else {
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), channel, false);
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, false);
}
return ESP_OK;
}
@@ -225,9 +225,9 @@ static uint32_t ledc_get_max_duty(ledc_mode_t speed_mode, ledc_channel_t channel
{
// The arguments are checked before internally calling this function.
ledc_timer_t timer_sel;
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &timer_sel);
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &timer_sel);
uint32_t max_duty;
ledc_hal_get_max_duty(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, &max_duty);
ledc_hal_get_max_duty(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel, &max_duty);
return max_duty;
}
@@ -237,14 +237,14 @@ static esp_err_t ledc_set_timer_params(ledc_mode_t speed_mode, ledc_timer_t time
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_set_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, clock_divider);
ledc_hal_set_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel, clock_divider);
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
/* Clock source can only be configured on targets which support timer-specific source clock. */
ledc_hal_set_clock_source(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, clk_src);
ledc_hal_set_clock_source(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel, clk_src);
// TODO: acquire clk_src, and release old clk_src if initialized and different than new one [clk_tree]
p_ledc_obj[speed_mode]->timer_specific_clk[timer_sel] = clk_src;
#endif
ledc_hal_set_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, duty_resolution);
ledc_hal_set_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel, duty_resolution);
ledc_ls_timer_update(speed_mode, timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
@@ -254,16 +254,16 @@ static IRAM_ATTR esp_err_t ledc_duty_config(ledc_mode_t speed_mode, ledc_channel
int duty_val, ledc_duty_direction_t duty_direction, uint32_t duty_num, uint32_t duty_cycle, uint32_t duty_scale)
{
if (hpoint_val >= 0) {
ledc_hal_set_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), channel, hpoint_val);
ledc_hal_set_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, hpoint_val);
}
if (duty_val >= 0) {
ledc_hal_set_duty_int_part(&(p_ledc_obj[speed_mode]->ledc_hal), channel, duty_val);
ledc_hal_set_duty_int_part(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, duty_val);
}
ledc_hal_set_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, 0, duty_direction, duty_cycle, duty_scale, duty_num);
ledc_hal_set_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, 0, duty_direction, duty_cycle, duty_scale, duty_num);
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
ledc_hal_set_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), channel, 1);
ledc_hal_set_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, 1);
// Clear left-off LEDC gamma ram registers, random data in ram could cause output waveform error
ledc_hal_clear_left_off_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, 1);
ledc_hal_clear_left_off_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, 1);
#endif
ESP_EARLY_LOGD(LEDC_TAG, "duty_config: duty-%d, dir-%d, cycle-%d, scale-%d, step-%d", duty_val, duty_direction, duty_cycle, duty_scale, duty_num);
return ESP_OK;
@@ -326,10 +326,10 @@ esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, ledc_channel_t channel
bool timer_xpd_err = false;
ledc_timer_t old_timer_sel;
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &old_timer_sel);
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &old_timer_sel);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_bind_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, timer_sel);
ledc_hal_bind_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, timer_sel);
ledc_ls_channel_update(speed_mode, channel);
if (p_ledc_obj[speed_mode]->channel_keep_alive[channel] && old_timer_sel != timer_sel) {
@@ -352,7 +352,7 @@ esp_err_t ledc_timer_rst(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_timer_rst(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
ledc_hal_timer_rst(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
@@ -364,7 +364,7 @@ esp_err_t ledc_timer_pause(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
p_ledc_obj[speed_mode]->timer_is_stopped[timer_sel] = true;
ledc_hal_timer_pause(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
ledc_hal_timer_pause(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
@@ -376,7 +376,7 @@ esp_err_t ledc_timer_resume(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
p_ledc_obj[speed_mode]->timer_is_stopped[timer_sel] = false;
ledc_hal_timer_resume(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
ledc_hal_timer_resume(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
@@ -389,7 +389,7 @@ esp_err_t ledc_channel_configure_maximum_timer_ovf_cnt(ledc_mode_t speed_mode, l
LEDC_ARG_CHECK(max_ovf_cnt <= LEDC_LL_OVF_CNT_MAX, "max_ovf_cnt");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
ledc_hal_channel_configure_maximum_timer_ovf_cnt(&(p_ledc_obj[speed_mode]->ledc_hal), channel, max_ovf_cnt);
ledc_hal_channel_configure_maximum_timer_ovf_cnt(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, max_ovf_cnt);
ledc_ls_channel_update(speed_mode, channel);
return ESP_OK;
@@ -417,14 +417,14 @@ static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode)
if (ledc_new_mode_obj) {
new_ctx = true;
PERIPH_RCC_ATOMIC() {
ledc_ll_enable_bus_clock(true);
ledc_ll_enable_reset_reg(false);
ledc_ll_enable_bus_clock(0, true);
ledc_ll_reset_register(0);
}
// Enable core clock gating at early stage, some LEDC registers and gamma RAM rely on the LEDC core clock existence
PERIPH_RCC_ATOMIC() {
ledc_ll_enable_clock(LEDC_LL_GET_HW(), true);
ledc_ll_enable_clock(0, true);
}
ledc_hal_init(&(ledc_new_mode_obj->ledc_hal), speed_mode);
ledc_hal_init(&(ledc_new_mode_obj->ledc_hal), 0);
ledc_new_mode_obj->glb_clk = LEDC_SLOW_CLK_UNINIT;
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
memset(ledc_new_mode_obj->timer_specific_clk, LEDC_TIMER_SPECIFIC_CLK_UNINIT, sizeof(ledc_clk_src_t) * LEDC_TIMER_MAX);
@@ -768,7 +768,7 @@ static esp_err_t ledc_timer_del(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
ledc_glb_clk_set_sleep_mode(speed_mode, false);
}
}
ledc_ll_enable_timer_power(LEDC_LL_GET_HW(), speed_mode, timer_sel, false);
ledc_ll_enable_timer_power(LEDC_LL_GET_HW(0), speed_mode, timer_sel, false);
}
portEXIT_CRITICAL(&ledc_spinlock);
ESP_RETURN_ON_FALSE(is_configured && is_deleted, ESP_ERR_INVALID_STATE, LEDC_TAG, "timer hasn't been configured, or it is still running, please stop it with ledc_timer_pause first");
@@ -798,7 +798,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t *timer_conf)
}
portENTER_CRITICAL(&ledc_spinlock);
ledc_ll_enable_timer_power(LEDC_LL_GET_HW(), speed_mode, timer_num, true);
ledc_ll_enable_timer_power(LEDC_LL_GET_HW(0), speed_mode, timer_num, true);
portEXIT_CRITICAL(&ledc_spinlock);
esp_err_t ret = ledc_set_timer_div(speed_mode, timer_num, timer_conf->clk_cfg, freq_hz, duty_resolution);
@@ -847,7 +847,7 @@ static esp_err_t ledc_channel_del(ledc_mode_t speed_mode, ledc_channel_t channel
esp_gpio_revoke(BIT64(gpio_num));
p_ledc_obj[speed_mode]->occupied_pin_mask[channel] &= ~BIT64(gpio_num);
}
ledc_ll_enable_channel_power(LEDC_LL_GET_HW(), speed_mode, channel, false);
ledc_ll_enable_channel_power(LEDC_LL_GET_HW(0), speed_mode, channel, false);
portEXIT_CRITICAL(&ledc_spinlock);
// p_ledc_obj[speed_mode]->channel_keep_alive[channel] = false;
@@ -903,7 +903,7 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
#endif
portENTER_CRITICAL(&ledc_spinlock);
ledc_ll_enable_channel_power(LEDC_LL_GET_HW(), speed_mode, ledc_channel, true);
ledc_ll_enable_channel_power(LEDC_LL_GET_HW(0), speed_mode, ledc_channel, true);
portEXIT_CRITICAL(&ledc_spinlock);
/*set channel parameters*/
@@ -1010,8 +1010,8 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
static void _ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
{
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, true);
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel);
ledc_ls_channel_update(speed_mode, channel);
}
@@ -1032,8 +1032,8 @@ esp_err_t ledc_stop(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t idl
LEDC_ARG_CHECK_ISR(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK_ISR(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL_SAFE(&ledc_spinlock);
ledc_hal_set_idle_level(&(p_ledc_obj[speed_mode]->ledc_hal), channel, idle_level);
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), channel, false);
ledc_hal_set_idle_level(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, idle_level);
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, false);
ledc_ls_channel_update(speed_mode, channel);
portEXIT_CRITICAL_SAFE(&ledc_spinlock);
return ESP_OK;
@@ -1116,7 +1116,7 @@ uint32_t ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
uint32_t duty = 0;
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty);
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &duty);
return duty;
}
@@ -1126,7 +1126,7 @@ int ledc_get_hpoint(ledc_mode_t speed_mode, ledc_channel_t channel)
LEDC_CHECK(channel < LEDC_CHANNEL_MAX, "channel argument is invalid", LEDC_ERR_VAL);
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
uint32_t hpoint = 0;
ledc_hal_get_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &hpoint);
ledc_hal_get_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &hpoint);
return hpoint;
}
@@ -1137,8 +1137,8 @@ esp_err_t ledc_set_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num, uint32_t
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
ledc_clk_cfg_t clk_cfg = LEDC_AUTO_CLK;
uint32_t duty_resolution = 0;
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clk_cfg);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &duty_resolution);
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_num, &clk_cfg);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_num, &duty_resolution);
return ledc_set_timer_div(speed_mode, timer_num, clk_cfg, freq_hz, duty_resolution);
}
@@ -1151,9 +1151,9 @@ uint32_t ledc_get_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num)
uint32_t clock_divider = 0;
uint32_t duty_resolution = 0;
ledc_clk_cfg_t clk_cfg = LEDC_AUTO_CLK;
ledc_hal_get_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clock_divider);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &duty_resolution);
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clk_cfg);
ledc_hal_get_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_num, &clock_divider);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_num, &duty_resolution);
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, timer_num, &clk_cfg);
uint64_t precision = (0x1 << duty_resolution);
uint32_t src_clk_freq = 0;
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)clk_cfg, LEDC_CLK_SRC_FREQ_PRECISION, &src_clk_freq);
@@ -1215,12 +1215,12 @@ static void IRAM_ATTR ledc_fade_isr(void *arg)
if (p_ledc_obj[speed_mode] == NULL) {
continue;
}
ledc_hal_get_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), &intr_status);
ledc_hal_get_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, &intr_status);
while (intr_status) {
ledc_calc_fade_end_channel(&intr_status, &channel);
// clear interrupt
ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel);
if (s_ledc_fade_rec[speed_mode][channel] == NULL) {
//fade object not initialized yet.
@@ -1249,12 +1249,12 @@ static void IRAM_ATTR ledc_fade_isr(void *arg)
int step = 0;
int next_duty = 0;
uint32_t duty_cur = 0;
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty_cur);
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &duty_cur);
uint32_t duty_tar = s_ledc_fade_rec[speed_mode][channel]->target_duty;
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
// If a multi-fade is done, check that target duty computed in sw is equal to the duty at the end of the fade
uint32_t range_num;
ledc_hal_get_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &range_num);
ledc_hal_get_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &range_num);
if (range_num > 1) {
assert(duty_cur == duty_tar);
}
@@ -1298,7 +1298,7 @@ static void IRAM_ATTR ledc_fade_isr(void *arg)
cycle,
scale);
s_ledc_fade_rec[speed_mode][channel]->fsm = LEDC_FSM_HW_FADE;
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel);
ledc_ls_channel_update(speed_mode, channel);
}
portEXIT_CRITICAL_ISR(&ledc_spinlock);
@@ -1371,7 +1371,7 @@ static esp_err_t _ledc_set_fade_with_step(ledc_mode_t speed_mode, ledc_channel_t
{
portENTER_CRITICAL(&ledc_spinlock);
uint32_t duty_cur = 0;
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty_cur);
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &duty_cur);
// When duty == max_duty, meanwhile, if scale == 1 and fade_down == 1, counter would overflow.
if (duty_cur == ledc_get_max_duty(speed_mode, channel)) {
assert(duty_cur > 0);
@@ -1417,8 +1417,8 @@ static esp_err_t _ledc_set_fade_with_time(ledc_mode_t speed_mode, ledc_channel_t
{
ledc_timer_t timer_sel;
uint32_t duty_cur = 0;
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &timer_sel);
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty_cur);
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &timer_sel);
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &duty_cur);
uint32_t freq = ledc_get_freq(speed_mode, timer_sel);
uint32_t duty_delta = target_duty > duty_cur ? target_duty - duty_cur : duty_cur - target_duty;
@@ -1454,7 +1454,7 @@ static void _ledc_fade_start(ledc_mode_t speed_mode, ledc_channel_t channel, led
ledc_fade_t *fade = s_ledc_fade_rec[speed_mode][channel];
fade->mode = fade_mode;
// Clear interrupt status of channel
ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel);
// Enable interrupt for channel
portENTER_CRITICAL(&ledc_spinlock);
ledc_enable_intr_type(speed_mode, channel, LEDC_INTR_FADE_END);
@@ -1686,14 +1686,14 @@ static esp_err_t _ledc_set_multi_fade(ledc_mode_t speed_mode, ledc_channel_t cha
uint32_t max_duty = ledc_get_max_duty(speed_mode, channel);
LEDC_ARG_CHECK(start_duty <= max_duty, "start_duty");
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_set_duty_int_part(&(p_ledc_obj[speed_mode]->ledc_hal), channel, start_duty);
ledc_hal_set_duty_int_part(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, start_duty);
for (int i = 0; i < list_len; i++) {
ledc_fade_param_config_t fade_param = fade_params_list[i];
ledc_hal_set_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, i, fade_param.dir, fade_param.cycle_num, fade_param.scale, fade_param.step_num);
ledc_hal_set_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, i, fade_param.dir, fade_param.cycle_num, fade_param.scale, fade_param.step_num);
}
ledc_hal_set_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), channel, list_len);
ledc_hal_set_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, list_len);
// Clear left-off LEDC gamma ram registers, random data in ram could cause output waveform error
ledc_hal_clear_left_off_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, list_len);
ledc_hal_clear_left_off_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, list_len);
portEXIT_CRITICAL(&ledc_spinlock);
// Calculate target duty, and take account for overflow
uint32_t target_duty = start_duty;
@@ -1776,7 +1776,7 @@ esp_err_t ledc_fill_multi_fade_param_list(ledc_mode_t speed_mode, ledc_channel_t
esp_err_t ret = ESP_OK;
ledc_timer_t timer_sel;
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &timer_sel);
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, &timer_sel);
uint32_t freq = ledc_get_freq(speed_mode, timer_sel);
uint32_t dir = (end_duty > start_duty) ? LEDC_DUTY_DIR_INCREASE : LEDC_DUTY_DIR_DECREASE;
@@ -1896,7 +1896,7 @@ esp_err_t ledc_read_fade_param(ledc_mode_t speed_mode, ledc_channel_t channel, u
LEDC_ARG_CHECK(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX, "range");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
ledc_hal_get_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, range, dir, cycle, scale, step);
ledc_hal_get_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), speed_mode, channel, range, dir, cycle, scale, step);
return ESP_OK;
}
#endif // SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
components/esp_driver_ledc/src/ledc_etm.c
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -31,7 +31,7 @@ static esp_err_t ledc_del_etm_event(esp_etm_event_t *event)
if (etm_event->en_reg_addr != 0) {
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), etm_event->speed_mode, etm_event->en_reg_addr, etm_event->en_bit, false);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), etm_event->speed_mode, etm_event->en_reg_addr, etm_event->en_bit, false);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
}
@@ -45,7 +45,7 @@ static esp_err_t ledc_del_etm_task(esp_etm_task_t *task)
if (etm_task->en_reg_addr != 0) {
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), etm_task->speed_mode, etm_task->en_reg_addr, etm_task->en_bit, false);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), etm_task->speed_mode, etm_task->en_reg_addr, etm_task->en_bit, false);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
}
@@ -65,7 +65,7 @@ esp_err_t ledc_timer_new_etm_event(ledc_mode_t speed_mode, ledc_timer_t timer_se
uint32_t en_bit = LEDC_LL_ETM_TIMER_EVENT_EN_BIT(speed_mode, timer_sel, config->event_type);
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), speed_mode, en_reg, en_bit, true);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), speed_mode, en_reg, en_bit, true);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
event->speed_mode = speed_mode;
event->en_reg_addr = en_reg;
@@ -90,7 +90,7 @@ esp_err_t ledc_channel_new_etm_event(ledc_mode_t speed_mode, ledc_channel_t chan
uint32_t en_bit = LEDC_LL_ETM_CHANNEL_EVENT_EN_BIT(speed_mode, channel, config->event_type);
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), speed_mode, en_reg, en_bit, true);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), speed_mode, en_reg, en_bit, true);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
event->speed_mode = speed_mode;
event->en_reg_addr = en_reg;
@@ -115,7 +115,7 @@ esp_err_t ledc_timer_new_etm_task(ledc_mode_t speed_mode, ledc_timer_t timer_sel
uint32_t en_bit = LEDC_LL_ETM_TIMER_TASK_EN_BIT(speed_mode, timer_sel, config->task_type);
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), speed_mode, en_reg, en_bit, true);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), speed_mode, en_reg, en_bit, true);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
task->speed_mode = speed_mode;
task->en_reg_addr = en_reg;
@@ -140,7 +140,7 @@ esp_err_t ledc_channel_new_etm_task(ledc_mode_t speed_mode, ledc_channel_t chann
uint32_t en_bit = LEDC_LL_ETM_CHANNEL_TASK_EN_BIT(speed_mode, channel, config->task_type);
portENTER_CRITICAL(&s_ledc_etm_spinlock);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(), speed_mode, en_reg, en_bit, true);
ledc_ll_etm_enable_evt_task(LEDC_LL_GET_HW(0), speed_mode, en_reg, en_bit, true);
portEXIT_CRITICAL(&s_ledc_etm_spinlock);
task->speed_mode = speed_mode;
task->en_reg_addr = en_reg;
components/esp_hal_ledc/esp32/include/hal/ledc_ll.h
+18 -13
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,12 +9,13 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
#include "soc/dport_reg.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_DUTY_NUM_MAX (LEDC_DUTY_NUM_LSCH0_V)
#define LEDC_LL_DUTY_CYCLE_MAX (LEDC_DUTY_CYCLE_LSCH0_V)
@@ -46,10 +47,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
if (enable) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
} else {
@@ -66,21 +69,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
if (enable) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
} else {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
}
(void)group_id;
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -94,13 +97,15 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
//resolve for compatibility
}
components/esp_hal_ledc/esp32c2/include/hal/ledc_ll.h
+18 -9
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,13 +9,14 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
#include "soc/system_struct.h"
#include "hal/assert.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -44,10 +45,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en0.ledc_clk_en = enable;
}
@@ -60,17 +63,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
SYSTEM.perip_rst_en0.ledc_rst = enable;
(void)group_id;
SYSTEM.perip_rst_en0.ledc_rst = 1;
SYSTEM.perip_rst_en0.ledc_rst = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -84,13 +91,15 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
//resolve for compatibility
}
components/esp_hal_ledc/esp32c3/include/hal/ledc_ll.h
+18 -9
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,13 +9,14 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
#include "soc/system_struct.h"
#include "hal/assert.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -45,10 +46,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en0.reg_ledc_clk_en = enable;
}
@@ -61,17 +64,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
SYSTEM.perip_rst_en0.reg_ledc_rst = enable;
(void)group_id;
SYSTEM.perip_rst_en0.reg_ledc_rst = 1;
SYSTEM.perip_rst_en0.reg_ledc_rst = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -85,13 +92,15 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
//resolve for compatibility
}
components/esp_hal_ledc/esp32c5/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/assert.h"
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
@@ -18,7 +19,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -128,19 +129,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -156,14 +163,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32c6/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
@@ -19,7 +20,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -132,19 +133,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -158,14 +165,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32c61/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/assert.h"
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
@@ -18,7 +19,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -128,19 +129,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -156,14 +163,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32h2/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
@@ -19,7 +20,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -129,19 +130,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -155,14 +162,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32h21/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
@@ -19,7 +20,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -129,19 +130,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -155,14 +162,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32h4/include/hal/ledc_ll.h
+15 -8
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/assert.h"
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
@@ -18,7 +19,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -128,19 +129,25 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
PCR.ledc_conf.ledc_clk_en = enable;
}
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
PCR.ledc_conf.ledc_rst_en = enable;
(void)group_id;
PCR.ledc_conf.ledc_rst_en = 1;
PCR.ledc_conf.ledc_rst_en = 0;
}
/**
@@ -154,14 +161,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
PCR.ledc_sclk_conf.ledc_sclk_en = en;
}
components/esp_hal_ledc/esp32p4/include/hal/ledc_ll.h
+17 -10
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,6 +9,7 @@
#pragma once
#include <stddef.h>
#include "hal/assert.h"
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
@@ -18,7 +19,7 @@
#include "soc/soc_caps.h"
#include "soc/soc_etm_source.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -128,10 +129,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
HP_SYS_CLKRST.soc_clk_ctrl3.reg_ledc_apb_clk_en = enable;
}
@@ -144,17 +147,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_ledc = enable;
(void)group_id;
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_ledc = 1;
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_ledc = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -168,14 +175,14 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)hw;
(void)group_id;
HP_SYS_CLKRST.peri_clk_ctrl22.reg_ledc_clk_en = en;
}
components/esp_hal_ledc/esp32s2/include/hal/ledc_ll.h
+18 -13
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,13 +9,14 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
#include "soc/dport_reg.h"
#include "hal/assert.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -50,10 +51,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
if (enable) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
} else {
@@ -70,21 +73,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
if (enable) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN0_REG, DPORT_LEDC_RST);
} else {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN0_REG, DPORT_LEDC_RST);
}
(void)group_id;
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN0_REG, DPORT_LEDC_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN0_REG, DPORT_LEDC_RST);
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -98,13 +101,15 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
//resolve for compatibility
}
components/esp_hal_ledc/esp32s3/include/hal/ledc_ll.h
+18 -9
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,13 +9,14 @@
#pragma once
#include <stddef.h>
#include "hal/ledc_types.h"
#include "soc/ledc_struct.h"
#include "soc/ledc_reg.h"
#include "soc/system_struct.h"
#include "hal/assert.h"
#define LEDC_LL_GET_HW() &LEDC
#define LEDC_LL_GET_HW(group_id) ((group_id == 0) ? &LEDC : NULL)
#define LEDC_LL_CHANNEL_SUPPORT_OVF_CNT 1
@@ -45,10 +46,12 @@ extern "C" {
/**
* @brief Enable peripheral register clock
*
* @param group_id LEDC group ID
* @param enable Enable/Disable
*/
static inline void ledc_ll_enable_bus_clock(bool enable)
static inline void ledc_ll_enable_bus_clock(int group_id, bool enable)
{
(void)group_id;
SYSTEM.perip_clk_en0.ledc_clk_en = enable;
}
@@ -61,17 +64,21 @@ static inline void ledc_ll_enable_bus_clock(bool enable)
/**
* @brief Reset whole peripheral register to init value defined by HW design
*
* @param group_id LEDC group ID
*/
static inline void ledc_ll_enable_reset_reg(bool enable)
static inline void ledc_ll_reset_register(int group_id)
{
SYSTEM.perip_rst_en0.ledc_rst = enable;
(void)group_id;
SYSTEM.perip_rst_en0.ledc_rst = 1;
SYSTEM.perip_rst_en0.ledc_rst = 0;
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define ledc_ll_enable_reset_reg(...) do { \
#define ledc_ll_reset_register(...) do { \
(void)__DECLARE_RCC_ATOMIC_ENV; \
ledc_ll_enable_reset_reg(__VA_ARGS__); \
ledc_ll_reset_register(__VA_ARGS__); \
} while(0)
/**
@@ -85,13 +92,15 @@ static inline void ledc_ll_enable_mem_power(bool enable)
/**
* @brief Enable LEDC function clock
*
* @param hw Beginning address of the peripheral registers
* @param group_id LEDC group ID
* @param en True to enable, false to disable
*
* @return None
*/
static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en)
static inline void ledc_ll_enable_clock(int group_id, bool en)
{
(void)group_id;
(void)en;
//resolve for compatibility
}
components/esp_hal_ledc/include/hal/ledc_hal.h
+80 -59
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -26,12 +26,13 @@ extern "C" {
#endif
#if SOC_LEDC_SUPPORTED
typedef struct ledc_dev_t *ledc_soc_handle_t; // LEDC SOC layer handle
/**
* Context that should be maintained by both the driver and the HAL
*/
typedef struct {
ledc_dev_t *dev;
ledc_mode_t speed_mode;
ledc_soc_handle_t dev;
} ledc_hal_context_t;
/**
@@ -58,265 +59,289 @@ typedef struct {
* @brief Update LEDC low speed timer
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
*
* @return None
*/
#define ledc_hal_ls_timer_update(hal, timer_sel) ledc_ll_ls_timer_update((hal)->dev, (hal)->speed_mode, timer_sel)
#define ledc_hal_ls_timer_update(hal, speed_mode, timer_sel) ledc_ll_ls_timer_update((hal)->dev, speed_mode, timer_sel)
/**
* @brief Reset LEDC timer
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
*
* @return None
*/
#define ledc_hal_timer_rst(hal, timer_sel) ledc_ll_timer_rst((hal)->dev, (hal)->speed_mode, timer_sel)
#define ledc_hal_timer_rst(hal, speed_mode, timer_sel) ledc_ll_timer_rst((hal)->dev, speed_mode, timer_sel)
/**
* @brief Pause LEDC timer
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
*
* @return None
*/
#define ledc_hal_timer_pause(hal, timer_sel) ledc_ll_timer_pause((hal)->dev, (hal)->speed_mode, timer_sel)
#define ledc_hal_timer_pause(hal, speed_mode, timer_sel) ledc_ll_timer_pause((hal)->dev, speed_mode, timer_sel)
/**
* @brief Resume LEDC timer
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
*
* @return None
*/
#define ledc_hal_timer_resume(hal, timer_sel) ledc_ll_timer_resume((hal)->dev, (hal)->speed_mode, timer_sel)
#define ledc_hal_timer_resume(hal, speed_mode, timer_sel) ledc_ll_timer_resume((hal)->dev, speed_mode, timer_sel)
/**
* @brief Set LEDC timer clock divider
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
*
* @return None
*/
#define ledc_hal_set_clock_divider(hal, timer_sel, clock_divider) ledc_ll_set_clock_divider((hal)->dev, (hal)->speed_mode, timer_sel, clock_divider)
#define ledc_hal_set_clock_divider(hal, speed_mode, timer_sel, clock_divider) ledc_ll_set_clock_divider((hal)->dev, speed_mode, timer_sel, clock_divider)
/**
* @brief Get LEDC timer clock divider
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
*
* @return None
*/
#define ledc_hal_get_clock_divider(hal, timer_sel, clock_divider) ledc_ll_get_clock_divider((hal)->dev, (hal)->speed_mode, timer_sel, clock_divider)
#define ledc_hal_get_clock_divider(hal, speed_mode, timer_sel, clock_divider) ledc_ll_get_clock_divider((hal)->dev, speed_mode, timer_sel, clock_divider)
/**
* @brief Set LEDC timer clock source
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Timer clock source
*
* @return None
*/
#define ledc_hal_set_clock_source(hal, timer_sel, clk_src) ledc_ll_set_clock_source((hal)->dev, (hal)->speed_mode, timer_sel, clk_src)
#define ledc_hal_set_clock_source(hal, speed_mode, timer_sel, clk_src) ledc_ll_set_clock_source((hal)->dev, speed_mode, timer_sel, clk_src)
/**
* @brief Get LEDC timer clock source
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_src Pointer to accept the timer clock source
*
* @return None
*/
#define ledc_hal_get_clock_source(hal, timer_sel, clk_src) ledc_ll_get_clock_source((hal)->dev, (hal)->speed_mode, timer_sel, clk_src)
#define ledc_hal_get_clock_source(hal, speed_mode, timer_sel, clk_src) ledc_ll_get_clock_source((hal)->dev, speed_mode, timer_sel, clk_src)
/**
* @brief Set LEDC duty resolution
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
*
* @return None
*/
#define ledc_hal_set_duty_resolution(hal, timer_sel, duty_resolution) ledc_ll_set_duty_resolution((hal)->dev, (hal)->speed_mode, timer_sel, duty_resolution)
#define ledc_hal_set_duty_resolution(hal, speed_mode, timer_sel, duty_resolution) ledc_ll_set_duty_resolution((hal)->dev, speed_mode, timer_sel, duty_resolution)
/**
* @brief Get LEDC duty resolution
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param duty_resolution Pointer to accept the resolution of duty setting in number of bits.
*
* @return None
*/
#define ledc_hal_get_duty_resolution(hal, timer_sel, duty_resolution) ledc_ll_get_duty_resolution((hal)->dev, (hal)->speed_mode, timer_sel, duty_resolution)
#define ledc_hal_get_duty_resolution(hal, speed_mode, timer_sel, duty_resolution) ledc_ll_get_duty_resolution((hal)->dev, speed_mode, timer_sel, duty_resolution)
/**
* @brief Get LEDC max duty
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC timer index (0-3), select from ledc_timer_t
* @param max_duty Pointer to accept the max duty
*
* @return None
*/
#define ledc_hal_get_max_duty(hal, timer_sel, max_duty) ledc_ll_get_max_duty((hal)->dev, (hal)->speed_mode, timer_sel, max_duty)
#define ledc_hal_get_max_duty(hal, speed_mode, timer_sel, max_duty) ledc_ll_get_max_duty((hal)->dev, speed_mode, timer_sel, max_duty)
/**
* @brief Get LEDC hpoint value
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param hpoint_val Pointer to accept the LEDC hpoint value(max: 0xfffff)
*
* @return None
*/
#define ledc_hal_get_hpoint(hal, channel_num, hpoint_val) ledc_ll_get_hpoint((hal)->dev, (hal)->speed_mode, channel_num, hpoint_val)
#define ledc_hal_get_hpoint(hal, speed_mode, channel_num, hpoint_val) ledc_ll_get_hpoint((hal)->dev, speed_mode, channel_num, hpoint_val)
/**
* @brief Set the output enable
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param sig_out_en The output enable status
*
* @return None
*/
#define ledc_hal_set_sig_out_en(hal, channel_num, sig_out_en) ledc_ll_set_sig_out_en((hal)->dev, (hal)->speed_mode, channel_num, sig_out_en)
#define ledc_hal_set_sig_out_en(hal, speed_mode, channel_num, sig_out_en) ledc_ll_set_sig_out_en((hal)->dev, speed_mode, channel_num, sig_out_en)
/**
* @brief Set output idle level
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param idle_level The output idle level
*
* @return None
*/
#define ledc_hal_set_idle_level(hal, channel_num, idle_level) ledc_ll_set_idle_level((hal)->dev, (hal)->speed_mode, channel_num, idle_level)
#define ledc_hal_set_idle_level(hal, speed_mode, channel_num, idle_level) ledc_ll_set_idle_level((hal)->dev, speed_mode, channel_num, idle_level)
/**
* @brief Set fade end interrupt enable
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param fade_end_intr_en The fade end interrupt enable status
*
* @return None
*/
#define ledc_hal_set_fade_end_intr(hal, channel_num, fade_end_intr_en) ledc_ll_set_fade_end_intr((hal)->dev, (hal)->speed_mode, channel_num, fade_end_intr_en)
#define ledc_hal_set_fade_end_intr(hal, speed_mode, channel_num, fade_end_intr_en) ledc_ll_set_fade_end_intr((hal)->dev, speed_mode, channel_num, fade_end_intr_en)
/**
* @brief Set timer index of the specified channel
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
*
* @return None
*/
#define ledc_hal_bind_channel_timer(hal, channel_num, timer_sel) ledc_ll_bind_channel_timer((hal)->dev, (hal)->speed_mode, channel_num, timer_sel)
#define ledc_hal_bind_channel_timer(hal, speed_mode, channel_num, timer_sel) ledc_ll_bind_channel_timer((hal)->dev, speed_mode, channel_num, timer_sel)
/**
* @brief Get timer index of the specified channel
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param timer_sel Pointer to accept the LEDC timer index
*
* @return None
*/
#define ledc_hal_get_channel_timer(hal, channel_num, timer_sel) ledc_ll_get_channel_timer((hal)->dev, (hal)->speed_mode, channel_num, timer_sel)
#define ledc_hal_get_channel_timer(hal, speed_mode, channel_num, timer_sel) ledc_ll_get_channel_timer((hal)->dev, speed_mode, channel_num, timer_sel)
/**
* @brief Init the LEDC hal. This function should be called first before other hal layer function is called
*
* @param hal Context of the HAL layer
* @param speed_mode speed_mode Select the LEDC speed_mode, high-speed mode and low-speed mod
* @param group_id LEDC group ID
*
* @return None
*/
void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode);
void ledc_hal_init(ledc_hal_context_t *hal, int group_id);
#if LEDC_LL_CHANNEL_SUPPORT_OVF_CNT
/**
* @brief Configure the maximum timer overflow times for the LEDC channel
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel LEDC channel index, select from ledc_channel_t
* @param max_ovf_cnt The maximum timer overflow times. To disable the timer overflow count, set this parameter to 0.
*
* @return None
*/
void ledc_hal_channel_configure_maximum_timer_ovf_cnt(ledc_hal_context_t *hal, ledc_channel_t channel, uint32_t max_ovf_cnt);
void ledc_hal_channel_configure_maximum_timer_ovf_cnt(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t max_ovf_cnt);
#endif
/**
* @brief Update channel configure when select low speed mode
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
*
* @return None
*/
void ledc_hal_ls_channel_update(ledc_hal_context_t *hal, ledc_channel_t channel_num);
void ledc_hal_ls_channel_update(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num);
/**
* @brief Set the duty start
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
*
* @return None
*/
void ledc_hal_set_duty_start(ledc_hal_context_t *hal, ledc_channel_t channel_num);
void ledc_hal_set_duty_start(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num);
/**
* @brief Set LEDC the integer part of duty value
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param duty_val LEDC duty value, the range of duty setting is [0, (2**duty_resolution)]
*
* @return None
*/
void ledc_hal_set_duty_int_part(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_val);
void ledc_hal_set_duty_int_part(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_val);
/**
* @brief Set LEDC hpoint value
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param hpoint_val LEDC hpoint value(max: 0xfffff)
*
* @return None
*/
void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t hpoint_val);
void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t hpoint_val);
/**
* @brief Get LEDC duty value
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param duty_val Pointer to accept the LEDC duty value
*
* @return None
*/
void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *duty_val);
void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val);
/**
* @brief Function to set fade parameters all-in-one
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param range Range index
* @param dir LEDC duty change direction, increase or decrease
@@ -326,46 +351,38 @@ void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint
*
* @return None
*/
void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step);
void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step);
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
/**
* @brief Set the range number of the specified duty configurations to be written from gamma_wr register to gamma ram
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param duty_range Range index (0 - (SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX-1)), it specifies to which range in gamma ram to write
*
* @return None
*/
void ledc_hal_set_duty_range_wr_addr(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_range);
/**
* @brief Set the total number of ranges in one fading
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param range_num Total number of ranges (1-16) of the fading configured
*
* @return None
*/
void ledc_hal_set_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range_num);
void ledc_hal_set_range_number(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range_num);
/**
* @brief Get the total number of ranges in one fading
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param range_num Pointer to accept fade range number
*
* @return None
*/
void ledc_hal_get_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *range_num);
void ledc_hal_get_range_number(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *range_num);
/**
* @brief Read the fade parameters that are stored in gamma ram for a certain fade range
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param range Range index (0 - (SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX-1)), it specifies to which range in gamma ram to read
* @param dir Pointer to accept fade direction value
@@ -375,49 +392,53 @@ void ledc_hal_get_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_n
*
* @return None
*/
void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step);
void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step);
/**
* @brief Clear left-off range fade parameters in LEDC gamma ram
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param start_range Start of the range to clear
*/
void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t start_range);
void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t start_range);
#endif //SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
/**
* @brief Get interrupt status of the specified channel
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
* @param intr_status Pointer to accept the interrupt status
*
* @return None
*/
void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, uint32_t *intr_status);
void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, uint32_t *intr_status);
/**
* @brief Clear interrupt status of the specified channel
*
* @param hal Context of the HAL layer
* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
* @param speed_mode LEDC speed_mode
* @param channel_num LEDC channel index, select from ledc_channel_t
*
* @return None
*/
void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_channel_t channel_num);
void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num);
/**
* @brief Get clock config of LEDC timer
*
* @param hal Context of the HAL layer
* @param speed_mode LEDC speed_mode
* @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
* @param clk_cfg Pointer to accept clock config
*
* @return None
*/
void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg);
void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg);
/**
* @brief Get the address of the fade end interrupt status register.
components/esp_hal_ledc/ledc_hal.c
+13 -14
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -9,15 +9,14 @@
#include "hal/ledc_hal.h"
#include "esp_rom_sys.h"
void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
void ledc_hal_init(ledc_hal_context_t *hal, int group_id)
{
//Get hardware instance.
hal->dev = LEDC_LL_GET_HW();
hal->speed_mode = speed_mode;
hal->dev = LEDC_LL_GET_HW(group_id);
ledc_ll_enable_mem_power(true);
}
void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
{
/* Use the following variable to retrieve the clock source used by the LEDC
* hardware controller. */
@@ -27,7 +26,7 @@ void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_
ledc_clk_cfg_t driver_clk = LEDC_AUTO_CLK;
/* Get the timer-specific mux value. */
ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
ledc_hal_get_clock_source(hal, speed_mode, timer_sel, &clk_src);
#if SOC_LEDC_SUPPORT_REF_TICK
if (clk_src == LEDC_REF_TICK) {
driver_clk = LEDC_USE_REF_TICK;
@@ -40,7 +39,7 @@ void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_
* - The controller is in slow mode and so, using a global clock,
* so we have to retrieve that clock here.
*/
if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
if (speed_mode == LEDC_LOW_SPEED_MODE) {
/* If the source clock used by LEDC hardware is not REF_TICK, it is
* necessary to retrieve the global clock source used. */
ledc_slow_clk_sel_t slow_clk;
@@ -58,21 +57,21 @@ void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_
}
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
{
ledc_ll_get_fade_param_range(hal->dev, hal->speed_mode, channel_num, range, dir, cycle, scale, step);
ledc_ll_get_fade_param_range(hal->dev, speed_mode, channel_num, range, dir, cycle, scale, step);
}
#endif
#if LEDC_LL_CHANNEL_SUPPORT_OVF_CNT
void ledc_hal_channel_configure_maximum_timer_ovf_cnt(ledc_hal_context_t *hal, ledc_channel_t channel, uint32_t max_ovf_cnt)
void ledc_hal_channel_configure_maximum_timer_ovf_cnt(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t max_ovf_cnt)
{
if (max_ovf_cnt == 0) {
ledc_ll_channel_enable_timer_ovt_cnt(hal->dev, hal->speed_mode, channel, false);
ledc_ll_channel_enable_timer_ovt_cnt(hal->dev, speed_mode, channel, false);
} else {
ledc_ll_channel_enable_timer_ovt_cnt(hal->dev, hal->speed_mode, channel, true);
ledc_ll_channel_set_maximum_timer_ovf_cnt(hal->dev, hal->speed_mode, channel, max_ovf_cnt);
ledc_ll_channel_reset_timer_ovf_cnt(hal->dev, hal->speed_mode, channel);
ledc_ll_channel_enable_timer_ovt_cnt(hal->dev, speed_mode, channel, true);
ledc_ll_channel_set_maximum_timer_ovf_cnt(hal->dev, speed_mode, channel, max_ovf_cnt);
ledc_ll_channel_reset_timer_ovf_cnt(hal->dev, speed_mode, channel);
}
}
#endif
components/esp_hal_ledc/ledc_hal_iram.c
+24 -24
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,67 +11,67 @@
#include "hal/assert.h"
#include "esp_rom_sys.h"
void ledc_hal_ls_channel_update(ledc_hal_context_t *hal, ledc_channel_t channel_num)
void ledc_hal_ls_channel_update(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num)
{
ledc_ll_ls_channel_update(hal->dev, hal->speed_mode, channel_num);
ledc_ll_ls_channel_update(hal->dev, speed_mode, channel_num);
}
void ledc_hal_set_duty_start(ledc_hal_context_t *hal, ledc_channel_t channel_num)
void ledc_hal_set_duty_start(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num)
{
ledc_ll_set_duty_start(hal->dev, hal->speed_mode, channel_num);
ledc_ll_set_duty_start(hal->dev, speed_mode, channel_num);
}
void ledc_hal_set_duty_int_part(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_val)
void ledc_hal_set_duty_int_part(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_val)
{
ledc_ll_set_duty_int_part(hal->dev, hal->speed_mode, channel_num, duty_val);
ledc_ll_set_duty_int_part(hal->dev, speed_mode, channel_num, duty_val);
}
void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t hpoint_val)
void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t hpoint_val)
{
ledc_ll_set_hpoint(hal->dev, hal->speed_mode, channel_num, hpoint_val);
ledc_ll_set_hpoint(hal->dev, speed_mode, channel_num, hpoint_val);
}
void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *duty_val)
void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val)
{
ledc_ll_get_duty(hal->dev, hal->speed_mode, channel_num, duty_val);
ledc_ll_get_duty(hal->dev, speed_mode, channel_num, duty_val);
}
void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
{
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
ledc_ll_set_fade_param_range(hal->dev, hal->speed_mode, channel_num, range, dir, cycle, scale, step);
ledc_ll_set_fade_param_range(hal->dev, speed_mode, channel_num, range, dir, cycle, scale, step);
#else // !SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
HAL_ASSERT(range == 0);
ledc_ll_set_fade_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
ledc_ll_set_fade_param(hal->dev, speed_mode, channel_num, dir, cycle, scale, step);
#endif // SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
}
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
void ledc_hal_set_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range_num)
void ledc_hal_set_range_number(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range_num)
{
ledc_ll_set_range_number(hal->dev, hal->speed_mode, channel_num, range_num);
ledc_ll_set_range_number(hal->dev, speed_mode, channel_num, range_num);
}
void ledc_hal_get_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *range_num)
void ledc_hal_get_range_number(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *range_num)
{
ledc_ll_get_range_number(hal->dev, hal->speed_mode, channel_num, range_num);
ledc_ll_get_range_number(hal->dev, speed_mode, channel_num, range_num);
}
void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t start_range)
void ledc_hal_clear_left_off_fade_param(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t start_range)
{
for (int i = start_range; i < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX; i++) {
ledc_ll_set_fade_param_range(hal->dev, hal->speed_mode, channel_num, i, 0, 0, 0, 0);
ledc_ll_set_fade_param_range(hal->dev, speed_mode, channel_num, i, 0, 0, 0, 0);
}
}
#endif //SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, uint32_t *intr_status)
void ledc_hal_get_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, uint32_t *intr_status)
{
ledc_ll_get_fade_end_intr_status(hal->dev, hal->speed_mode, intr_status);
ledc_ll_get_fade_end_intr_status(hal->dev, speed_mode, intr_status);
}
void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_channel_t channel_num)
void ledc_hal_clear_fade_end_intr_status(ledc_hal_context_t *hal, ledc_mode_t speed_mode, ledc_channel_t channel_num)
{
ledc_ll_clear_fade_end_intr_status(hal->dev, hal->speed_mode, channel_num);
ledc_ll_clear_fade_end_intr_status(hal->dev, speed_mode, channel_num);
}
components/soc/esp32/register/soc/ledc_struct.h
+12 -12
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -12,9 +12,9 @@
extern "C" {
#endif
typedef volatile struct ledc_dev_s {
struct {
struct {
typedef struct ledc_dev_t {
volatile struct {
volatile struct {
union {
struct {
uint32_t timer_sel: 2; /*There are four high speed timers the two bits are used to select one of them for high speed channel. 2'b00: seletc hstimer0. 2'b01: select hstimer1. 2'b10: select hstimer2. 2'b11: select hstimer3.*/
@@ -59,8 +59,8 @@ typedef volatile struct ledc_dev_s {
} duty_rd;
} channel[8];
} channel_group[2]; /*two channel groups : 0: high-speed channels; 1: low-speed channels*/
struct {
struct {
volatile struct {
volatile struct {
union {
struct {
uint32_t duty_resolution: 5; /*This register controls resolution of PWN duty by defining the bit width of timer's counter. The max bit width of the counter is 20.*/
@@ -82,7 +82,7 @@ typedef volatile struct ledc_dev_s {
} value;
} timer[4];
} timer_group[2]; /*two channel groups : 0: high-speed channels; 1: low-speed channels*/
union {
volatile union {
struct {
uint32_t hstimer0_ovf: 1; /*The interrupt raw bit for high speed channel0 counter overflow.*/
uint32_t hstimer1_ovf: 1; /*The interrupt raw bit for high speed channel1 counter overflow.*/
@@ -112,7 +112,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t hstimer0_ovf: 1; /*The interrupt status bit for high speed channel0 counter overflow event.*/
uint32_t hstimer1_ovf: 1; /*The interrupt status bit for high speed channel1 counter overflow event.*/
@@ -142,7 +142,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t hstimer0_ovf: 1; /*The interrupt enable bit for high speed channel0 counter overflow interrupt.*/
uint32_t hstimer1_ovf: 1; /*The interrupt enable bit for high speed channel1 counter overflow interrupt.*/
@@ -172,7 +172,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t hstimer0_ovf: 1; /*Set this bit to clear high speed channel0 counter overflow interrupt.*/
uint32_t hstimer1_ovf: 1; /*Set this bit to clear high speed channel1 counter overflow interrupt.*/
@@ -202,7 +202,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t apb_clk_sel: 1; /*This bit decides the slow clock for LEDC low speed channels, so we want to replace the field name with slow_clk_sel*/
uint32_t reserved1: 31;
@@ -239,7 +239,7 @@ typedef volatile struct ledc_dev_s {
uint32_t reserved_1f0;
uint32_t reserved_1f4;
uint32_t reserved_1f8;
uint32_t date; /*This register represents the version .*/
volatile uint32_t date; /*This register represents the version .*/
} ledc_dev_t;
extern ledc_dev_t LEDC;
components/soc/esp32c3/register/soc/ledc_struct.h
+12 -12
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -10,9 +10,9 @@
extern "C" {
#endif
typedef volatile struct ledc_dev_s {
struct {
struct {
typedef struct ledc_dev_t {
volatile struct {
volatile struct {
union {
struct {
uint32_t timer_sel: 2;
@@ -69,8 +69,8 @@ typedef volatile struct ledc_dev_s {
uint32_t reserved_94;
uint32_t reserved_98;
uint32_t reserved_9c;
struct {
struct {
volatile struct {
volatile struct {
union {
struct {
uint32_t duty_resolution: 4;
@@ -92,7 +92,7 @@ typedef volatile struct ledc_dev_s {
} value;
} timer[4];
} timer_group[1];
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -114,7 +114,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -136,7 +136,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -158,7 +158,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -180,7 +180,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t apb_clk_sel: 2;
uint32_t reserved2: 29;
@@ -198,7 +198,7 @@ typedef volatile struct ledc_dev_s {
uint32_t reserved_f0;
uint32_t reserved_f4;
uint32_t reserved_f8;
union {
volatile union {
struct {
uint32_t date: 32;
};
components/soc/esp32c5/register/soc/ledc_struct.h
+1 -1
View File
@@ -1050,7 +1050,7 @@ typedef struct {
volatile ledc_timern_cnt_cap_reg_t cnt_cap[4];
} ledc_timer_cnt_cap_group_reg_t;
typedef struct {
typedef struct ledc_dev_t {
volatile ledc_ch_group_reg_t channel_group[1];
uint32_t reserved_078[10];
volatile ledc_timer_group_reg_t timer_group[1];
components/soc/esp32c61/register/soc/ledc_struct.h
+1 -1
View File
@@ -1051,7 +1051,7 @@ typedef struct {
volatile ledc_timern_cnt_cap_reg_t cnt_cap[4];
} ledc_timer_cnt_cap_group_reg_t;
typedef struct {
typedef struct ledc_dev_t {
volatile ledc_ch_group_reg_t channel_group[1];
uint32_t reserved_078[10];
volatile ledc_timer_group_reg_t timer_group[1];
components/soc/esp32p4/register/hw_ver1/soc/ledc_struct.h
+1 -1
View File
@@ -1201,7 +1201,7 @@ typedef struct {
volatile ledc_timerx_reg_t timer[4];
} ledc_timer_group_reg_t;
typedef struct {
typedef struct ledc_dev_t {
volatile ledc_ch_group_reg_t channel_group[1];
volatile ledc_timer_group_reg_t timer_group[1];
volatile ledc_int_raw_reg_t int_raw;
components/soc/esp32p4/register/hw_ver3/soc/ledc_struct.h
+1 -1
View File
@@ -1302,7 +1302,7 @@ typedef struct {
volatile ledc_timerx_reg_t timer[4];
} ledc_timer_group_reg_t;
typedef struct {
typedef struct ledc_dev_t {
volatile ledc_ch_group_reg_t channel_group[1];
volatile ledc_timer_group_reg_t timer_group[1];
volatile ledc_int_raw_reg_t int_raw;
components/soc/esp32s2/register/soc/ledc_struct.h
+12 -12
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -11,9 +11,9 @@
extern "C" {
#endif
typedef volatile struct ledc_dev_s {
struct {
struct {
typedef struct ledc_dev_t {
volatile struct {
volatile struct {
union {
struct {
uint32_t timer_sel: 2; /*There are four high speed timers the two bits are used to select one of them for high speed channel. 2'b00: seletc hstimer0. 2'b01: select hstimer1. 2'b10: select hstimer2. 2'b11: select hstimer3.*/
@@ -61,8 +61,8 @@ typedef volatile struct ledc_dev_s {
} duty_rd;
} channel[8];
} channel_group[1]; /* single channel group, low speed mode only */
struct {
struct {
volatile struct {
volatile struct {
union {
struct {
uint32_t duty_resolution: 4;
@@ -84,7 +84,7 @@ typedef volatile struct ledc_dev_s {
} value;
} timer[4];
} timer_group[1]; /* single channel group, low speed mode only */
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -110,7 +110,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -136,7 +136,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -162,7 +162,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -188,7 +188,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t apb_clk_sel: 2; // 0:invalid; 1:80MHz APB clock; 2:8MHz RTC clock; 3:XTAL clock
uint32_t reserved2: 29;
@@ -206,7 +206,7 @@ typedef volatile struct ledc_dev_s {
uint32_t reserved_f0;
uint32_t reserved_f4;
uint32_t reserved_f8;
uint32_t date; /**/
volatile uint32_t date; /**/
} ledc_dev_t;
extern ledc_dev_t LEDC;
#ifdef __cplusplus
components/soc/esp32s3/register/soc/ledc_struct.h
+12 -12
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0 OR MIT
*/
@@ -12,9 +12,9 @@ extern "C" {
#include <stdint.h>
typedef volatile struct ledc_dev_s {
struct {
struct {
typedef struct ledc_dev_t {
volatile struct {
volatile struct {
union {
struct {
uint32_t timer_sel: 2;
@@ -62,8 +62,8 @@ typedef volatile struct ledc_dev_s {
} duty_rd;
} channel[8];
} channel_group[1];
struct {
struct {
volatile struct {
volatile struct {
union {
struct {
uint32_t duty_resolution: 4;
@@ -85,7 +85,7 @@ typedef volatile struct ledc_dev_s {
} value;
} timer[4];
} timer_group[1];
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -111,7 +111,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -137,7 +137,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -163,7 +163,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t lstimer0_ovf: 1;
uint32_t lstimer1_ovf: 1;
@@ -189,7 +189,7 @@ typedef volatile struct ledc_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t apb_clk_sel: 2;
uint32_t reserved2: 29;
@@ -207,7 +207,7 @@ typedef volatile struct ledc_dev_s {
uint32_t reserved_f0;
uint32_t reserved_f4;
uint32_t reserved_f8;
uint32_t date; /**/
volatile uint32_t date; /**/
} ledc_dev_t;
extern ledc_dev_t LEDC;
components/soc/esp32s31/register/soc/ledc_struct.h
+1 -1
View File
@@ -1442,7 +1442,7 @@ typedef union {
} ledc_date_reg_t;
typedef struct {
typedef struct ledc_dev_t {
volatile ledc_chn_conf0_reg_t ch0_conf0;
volatile ledc_chn_hpoint_reg_t ch0_hpoint;
volatile ledc_chn_duty_reg_t ch0_duty;